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8234740: Harmonize parameter order in Atomic - cmpxchg
Reviewed-by: rehn, dholmes
This commit is contained in:
parent
3d426623bf
commit
0ad50c2b5c
144 changed files with 504 additions and 506 deletions
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@ -861,7 +861,7 @@ JavaThread::is_thread_fully_suspended(bool wait_for_suspend, uint32_t *bits) {
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bool Thread::claim_par_threads_do(uintx claim_token) {
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uintx token = _threads_do_token;
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if (token != claim_token) {
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uintx res = Atomic::cmpxchg(claim_token, &_threads_do_token, token);
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uintx res = Atomic::cmpxchg(&_threads_do_token, token, claim_token);
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if (res == token) {
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return true;
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}
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@ -4875,7 +4875,7 @@ void Threads::print_threads_compiling(outputStream* st, char* buf, int buflen, b
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typedef volatile int SpinLockT;
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void Thread::SpinAcquire(volatile int * adr, const char * LockName) {
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if (Atomic::cmpxchg (1, adr, 0) == 0) {
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if (Atomic::cmpxchg(adr, 0, 1) == 0) {
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return; // normal fast-path return
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}
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@ -4896,7 +4896,7 @@ void Thread::SpinAcquire(volatile int * adr, const char * LockName) {
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SpinPause();
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}
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}
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if (Atomic::cmpxchg(1, adr, 0) == 0) return;
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if (Atomic::cmpxchg(adr, 0, 1) == 0) return;
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}
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}
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@ -4968,9 +4968,9 @@ void Thread::SpinRelease(volatile int * adr) {
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const intptr_t LOCKBIT = 1;
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void Thread::muxAcquire(volatile intptr_t * Lock, const char * LockName) {
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intptr_t w = Atomic::cmpxchg(LOCKBIT, Lock, (intptr_t)0);
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intptr_t w = Atomic::cmpxchg(Lock, (intptr_t)0, LOCKBIT);
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if (w == 0) return;
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if ((w & LOCKBIT) == 0 && Atomic::cmpxchg(w|LOCKBIT, Lock, w) == w) {
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if ((w & LOCKBIT) == 0 && Atomic::cmpxchg(Lock, w, w|LOCKBIT) == w) {
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return;
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}
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@ -4982,7 +4982,7 @@ void Thread::muxAcquire(volatile intptr_t * Lock, const char * LockName) {
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// Optional spin phase: spin-then-park strategy
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while (--its >= 0) {
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w = *Lock;
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if ((w & LOCKBIT) == 0 && Atomic::cmpxchg(w|LOCKBIT, Lock, w) == w) {
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if ((w & LOCKBIT) == 0 && Atomic::cmpxchg(Lock, w, w|LOCKBIT) == w) {
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return;
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}
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}
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@ -4995,7 +4995,7 @@ void Thread::muxAcquire(volatile intptr_t * Lock, const char * LockName) {
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for (;;) {
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w = *Lock;
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if ((w & LOCKBIT) == 0) {
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if (Atomic::cmpxchg(w|LOCKBIT, Lock, w) == w) {
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if (Atomic::cmpxchg(Lock, w, w|LOCKBIT) == w) {
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Self->OnList = 0; // hygiene - allows stronger asserts
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return;
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}
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@ -5003,7 +5003,7 @@ void Thread::muxAcquire(volatile intptr_t * Lock, const char * LockName) {
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}
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assert(w & LOCKBIT, "invariant");
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Self->ListNext = (ParkEvent *) (w & ~LOCKBIT);
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if (Atomic::cmpxchg(intptr_t(Self)|LOCKBIT, Lock, w) == w) break;
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if (Atomic::cmpxchg(Lock, w, intptr_t(Self)|LOCKBIT) == w) break;
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}
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while (Self->OnList != 0) {
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@ -5039,7 +5039,7 @@ void Thread::muxAcquire(volatile intptr_t * Lock, const char * LockName) {
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// store (CAS) to the lock-word that releases the lock becomes globally visible.
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void Thread::muxRelease(volatile intptr_t * Lock) {
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for (;;) {
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const intptr_t w = Atomic::cmpxchg((intptr_t)0, Lock, LOCKBIT);
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const intptr_t w = Atomic::cmpxchg(Lock, LOCKBIT, (intptr_t)0);
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assert(w & LOCKBIT, "invariant");
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if (w == LOCKBIT) return;
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ParkEvent * const List = (ParkEvent *) (w & ~LOCKBIT);
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@ -5050,7 +5050,7 @@ void Thread::muxRelease(volatile intptr_t * Lock) {
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// The following CAS() releases the lock and pops the head element.
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// The CAS() also ratifies the previously fetched lock-word value.
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if (Atomic::cmpxchg(intptr_t(nxt), Lock, w) != w) {
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if (Atomic::cmpxchg(Lock, w, intptr_t(nxt)) != w) {
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continue;
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}
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List->OnList = 0;
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