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8216167: Update include guards to reflect correct directories

Browse source 
Use script and some manual fixup to fix directores names in include guards.

Reviewed-by: lfoltan, eosterlund, kbarrett
This commit is contained in:
Coleen Phillimore 2019-01-10 15:13:51 -05:00
parent 44ba433328
commit 154a1a02bf
1541 changed files with 5982 additions and 6040 deletions
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8
src/hotspot/cpu/aarch64/assembler_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_ASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_VM_ASSEMBLER_AARCH64_HPP
#ifndef CPU_AARCH64_ASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_ASSEMBLER_AARCH64_HPP
#include "asm/register.hpp"
@ -2754,4 +2754,4 @@ class BiasedLockingCounters;
extern "C" void das(uint64_t start, int len);
#endif // CPU_AARCH64_VM_ASSEMBLER_AARCH64_HPP
#endif // CPU_AARCH64_ASSEMBLER_AARCH64_HPP

8
src/hotspot/cpu/aarch64/assembler_aarch64.inline.hpp
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@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,11 +23,11 @@
*
*/
#ifndef CPU_AARCH64_VM_ASSEMBLER_AARCH64_INLINE_HPP
#define CPU_AARCH64_VM_ASSEMBLER_AARCH64_INLINE_HPP
#ifndef CPU_AARCH64_ASSEMBLER_AARCH64_INLINE_HPP
#define CPU_AARCH64_ASSEMBLER_AARCH64_INLINE_HPP
#include "asm/assembler.inline.hpp"
#include "asm/codeBuffer.hpp"
#include "code/codeCache.hpp"
#endif // CPU_AARCH64_VM_ASSEMBLER_AARCH64_INLINE_HPP
#endif // CPU_AARCH64_ASSEMBLER_AARCH64_INLINE_HPP

8
src/hotspot/cpu/aarch64/bytecodes_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,9 +23,9 @@
*
*/
#ifndef CPU_AARCH64_VM_BYTECODES_AARCH64_HPP
#define CPU_AARCH64_VM_BYTECODES_AARCH64_HPP
#ifndef CPU_AARCH64_BYTECODES_AARCH64_HPP
#define CPU_AARCH64_BYTECODES_AARCH64_HPP
// No aarch64 specific bytecodes
#endif // CPU_AARCH64_VM_BYTECODES_AARCH64_HPP
#endif // CPU_AARCH64_BYTECODES_AARCH64_HPP

8
src/hotspot/cpu/aarch64/bytes_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_BYTES_AARCH64_HPP
#define CPU_AARCH64_VM_BYTES_AARCH64_HPP
#ifndef CPU_AARCH64_BYTES_AARCH64_HPP
#define CPU_AARCH64_BYTES_AARCH64_HPP
#include "memory/allocation.hpp"
@ -63,4 +63,4 @@ class Bytes: AllStatic {
// The following header contains the implementations of swap_u2, swap_u4, and swap_u8[_base]
#include OS_CPU_HEADER_INLINE(bytes)
#endif // CPU_AARCH64_VM_BYTES_AARCH64_HPP
#endif // CPU_AARCH64_BYTES_AARCH64_HPP

8
src/hotspot/cpu/aarch64/c1_Defs_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_C1_DEFS_AARCH64_HPP
#define CPU_AARCH64_VM_C1_DEFS_AARCH64_HPP
#ifndef CPU_AARCH64_C1_DEFS_AARCH64_HPP
#define CPU_AARCH64_C1_DEFS_AARCH64_HPP
// native word offsets from memory address (little endian)
enum {
@ -78,4 +78,4 @@ enum {
pd_float_saved_as_double = false
};
#endif // CPU_AARCH64_VM_C1_DEFS_AARCH64_HPP
#endif // CPU_AARCH64_C1_DEFS_AARCH64_HPP

8
src/hotspot/cpu/aarch64/c1_FpuStackSim_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,10 +23,10 @@
*
*/
#ifndef CPU_AARCH64_VM_C1_FPUSTACKSIM_HPP
#define CPU_AARCH64_VM_C1_FPUSTACKSIM_HPP
#ifndef CPU_AARCH64_C1_FPUSTACKSIM_AARCH64_HPP
#define CPU_AARCH64_C1_FPUSTACKSIM_AARCH64_HPP
// No FPU stack on AARCH64
class FpuStackSim;
#endif // CPU_AARCH64_VM_C1_FPUSTACKSIM_HPP
#endif // CPU_AARCH64_C1_FPUSTACKSIM_AARCH64_HPP

9
src/hotspot/cpu/aarch64/c1_FrameMap_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_C1_FRAMEMAP_AARCH64_HPP
#define CPU_AARCH64_VM_C1_FRAMEMAP_AARCH64_HPP
#ifndef CPU_AARCH64_C1_FRAMEMAP_AARCH64_HPP
#define CPU_AARCH64_C1_FRAMEMAP_AARCH64_HPP
// On AArch64 the frame looks as follows:
//
@ -144,5 +144,4 @@
static int last_cpu_reg() { return pd_last_cpu_reg; }
static int last_byte_reg() { return pd_last_byte_reg; }
#endif // CPU_AARCH64_VM_C1_FRAMEMAP_AARCH64_HPP
#endif // CPU_AARCH64_C1_FRAMEMAP_AARCH64_HPP

8
src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_C1_LIRASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_VM_C1_LIRASSEMBLER_AARCH64_HPP
#ifndef CPU_AARCH64_C1_LIRASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_C1_LIRASSEMBLER_AARCH64_HPP
// ArrayCopyStub needs access to bailout
friend class ArrayCopyStub;
@ -81,4 +81,4 @@ public:
void store_parameter(jint c, int offset_from_esp_in_words);
void store_parameter(jobject c, int offset_from_esp_in_words);
#endif // CPU_AARCH64_VM_C1_LIRASSEMBLER_AARCH64_HPP
#endif // CPU_AARCH64_C1_LIRASSEMBLER_AARCH64_HPP

8
src/hotspot/cpu/aarch64/c1_LinearScan_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_C1_LINEARSCAN_HPP
#define CPU_AARCH64_VM_C1_LINEARSCAN_HPP
#ifndef CPU_AARCH64_C1_LINEARSCAN_AARCH64_HPP
#define CPU_AARCH64_C1_LINEARSCAN_AARCH64_HPP
inline bool LinearScan::is_processed_reg_num(int reg_num) {
return reg_num <= FrameMap::last_cpu_reg() || reg_num >= pd_nof_cpu_regs_frame_map;
@ -73,4 +73,4 @@ inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) {
}
#endif // CPU_AARCH64_VM_C1_LINEARSCAN_HPP
#endif // CPU_AARCH64_C1_LINEARSCAN_AARCH64_HPP

8
src/hotspot/cpu/aarch64/c1_MacroAssembler_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_C1_MACROASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_VM_C1_MACROASSEMBLER_AARCH64_HPP
#ifndef CPU_AARCH64_C1_MACROASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_C1_MACROASSEMBLER_AARCH64_HPP
using MacroAssembler::build_frame;
using MacroAssembler::null_check;
@ -111,4 +111,4 @@ using MacroAssembler::null_check;
void load_parameter(int offset_in_words, Register reg);
#endif // CPU_AARCH64_VM_C1_MACROASSEMBLER_AARCH64_HPP
#endif // CPU_AARCH64_C1_MACROASSEMBLER_AARCH64_HPP

8
src/hotspot/cpu/aarch64/c1_globals_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_C1_GLOBALS_AARCH64_HPP
#define CPU_AARCH64_VM_C1_GLOBALS_AARCH64_HPP
#ifndef CPU_AARCH64_C1_GLOBALS_AARCH64_HPP
#define CPU_AARCH64_C1_GLOBALS_AARCH64_HPP
#include "utilities/globalDefinitions.hpp"
#include "utilities/macros.hpp"
@ -74,4 +74,4 @@ define_pd_global(bool, OptimizeSinglePrecision, true );
define_pd_global(bool, CSEArrayLength, false);
define_pd_global(bool, TwoOperandLIRForm, false );
#endif // CPU_AARCH64_VM_C1_GLOBALS_AARCH64_HPP
#endif // CPU_AARCH64_C1_GLOBALS_AARCH64_HPP

8
src/hotspot/cpu/aarch64/c2_globals_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_C2_GLOBALS_AARCH64_HPP
#define CPU_AARCH64_VM_C2_GLOBALS_AARCH64_HPP
#ifndef CPU_AARCH64_C2_GLOBALS_AARCH64_HPP
#define CPU_AARCH64_C2_GLOBALS_AARCH64_HPP
#include "utilities/globalDefinitions.hpp"
#include "utilities/macros.hpp"
@ -87,4 +87,4 @@ define_pd_global(bool, NeverActAsServerClassMachine, false);
define_pd_global(bool, TrapBasedRangeChecks, false); // Not needed.
#endif // CPU_AARCH64_VM_C2_GLOBALS_AARCH64_HPP
#endif // CPU_AARCH64_C2_GLOBALS_AARCH64_HPP

8
src/hotspot/cpu/aarch64/codeBuffer_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_CODEBUFFER_AARCH64_HPP
#define CPU_AARCH64_VM_CODEBUFFER_AARCH64_HPP
#ifndef CPU_AARCH64_CODEBUFFER_AARCH64_HPP
#define CPU_AARCH64_CODEBUFFER_AARCH64_HPP
private:
void pd_initialize() {}
@ -32,4 +32,4 @@ private:
public:
void flush_bundle(bool start_new_bundle) {}
#endif // CPU_AARCH64_VM_CODEBUFFER_AARCH64_HPP
#endif // CPU_AARCH64_CODEBUFFER_AARCH64_HPP

8
src/hotspot/cpu/aarch64/copy_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_COPY_AARCH64_HPP
#define CPU_AARCH64_VM_COPY_AARCH64_HPP
#ifndef CPU_AARCH64_COPY_AARCH64_HPP
#define CPU_AARCH64_COPY_AARCH64_HPP
// Inline functions for memory copy and fill.
@ -56,4 +56,4 @@ static void pd_zero_to_bytes(void* to, size_t count) {
(void)memset(to, 0, count);
}
#endif // CPU_AARCH64_VM_COPY_AARCH64_HPP
#endif // CPU_AARCH64_COPY_AARCH64_HPP

8
src/hotspot/cpu/aarch64/depChecker_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,9 +23,9 @@
*
*/
#ifndef CPU_AARCH64_VM_DEPCHECKER_AARCH64_HPP
#define CPU_AARCH64_VM_DEPCHECKER_AARCH64_HPP
#ifndef CPU_AARCH64_DEPCHECKER_AARCH64_HPP
#define CPU_AARCH64_DEPCHECKER_AARCH64_HPP
// Nothing to do on aarch64
#endif // CPU_AARCH64_VM_DEPCHECKER_AARCH64_HPP
#endif // CPU_AARCH64_DEPCHECKER_AARCH64_HPP

8
src/hotspot/cpu/aarch64/disassembler_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_DISASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_VM_DISASSEMBLER_AARCH64_HPP
#ifndef CPU_AARCH64_DISASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_DISASSEMBLER_AARCH64_HPP
static int pd_instruction_alignment() {
return 1;
@ -34,4 +34,4 @@
return "";
}
#endif // CPU_AARCH64_VM_DISASSEMBLER_AARCH64_HPP
#endif // CPU_AARCH64_DISASSEMBLER_AARCH64_HPP

8
src/hotspot/cpu/aarch64/frame_aarch64.hpp
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@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_FRAME_AARCH64_HPP
#define CPU_AARCH64_VM_FRAME_AARCH64_HPP
#ifndef CPU_AARCH64_FRAME_AARCH64_HPP
#define CPU_AARCH64_FRAME_AARCH64_HPP
#include "runtime/synchronizer.hpp"
@ -160,4 +160,4 @@
static jint interpreter_frame_expression_stack_direction() { return -1; }
#endif // CPU_AARCH64_VM_FRAME_AARCH64_HPP
#endif // CPU_AARCH64_FRAME_AARCH64_HPP

8
src/hotspot/cpu/aarch64/frame_aarch64.inline.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_FRAME_AARCH64_INLINE_HPP
#define CPU_AARCH64_VM_FRAME_AARCH64_INLINE_HPP
#ifndef CPU_AARCH64_FRAME_AARCH64_INLINE_HPP
#define CPU_AARCH64_FRAME_AARCH64_INLINE_HPP
#include "code/codeCache.hpp"
#include "code/vmreg.inline.hpp"
@ -250,4 +250,4 @@ inline void frame::set_saved_oop_result(RegisterMap* map, oop obj) {
*result_adr = obj;
}
#endif // CPU_AARCH64_VM_FRAME_AARCH64_INLINE_HPP
#endif // CPU_AARCH64_FRAME_AARCH64_INLINE_HPP

4
src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.hpp
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -39,4 +39,4 @@ protected:
};
#endif // #ifndef CPU_AARCH64_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_AARCH64_HPP
#endif // CPU_AARCH64_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_AARCH64_HPP

8
src/hotspot/cpu/aarch64/globalDefinitions_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_GLOBALDEFINITIONS_AARCH64_HPP
#define CPU_AARCH64_VM_GLOBALDEFINITIONS_AARCH64_HPP
#ifndef CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP
#define CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP
const int StackAlignmentInBytes = 16;
@ -53,4 +53,4 @@ const bool CCallingConventionRequiresIntsAsLongs = false;
#define THREAD_LOCAL_POLL
#endif // CPU_AARCH64_VM_GLOBALDEFINITIONS_AARCH64_HPP
#endif // CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP

8
src/hotspot/cpu/aarch64/globals_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2015, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_GLOBALS_AARCH64_HPP
#define CPU_AARCH64_VM_GLOBALS_AARCH64_HPP
#ifndef CPU_AARCH64_GLOBALS_AARCH64_HPP
#define CPU_AARCH64_GLOBALS_AARCH64_HPP
#include "utilities/globalDefinitions.hpp"
#include "utilities/macros.hpp"
@ -166,4 +166,4 @@ define_pd_global(intx, InlineSmallCode, 1000);
#endif
#endif // CPU_AARCH64_VM_GLOBALS_AARCH64_HPP
#endif // CPU_AARCH64_GLOBALS_AARCH64_HPP

8
src/hotspot/cpu/aarch64/icache_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_ICACHE_AARCH64_HPP
#define CPU_AARCH64_VM_ICACHE_AARCH64_HPP
#ifndef CPU_AARCH64_ICACHE_AARCH64_HPP
#define CPU_AARCH64_ICACHE_AARCH64_HPP
// Interface for updating the instruction cache. Whenever the VM
// modifies code, part of the processor instruction cache potentially
@ -41,4 +41,4 @@ class ICache : public AbstractICache {
}
};
#endif // CPU_AARCH64_VM_ICACHE_AARCH64_HPP
#endif // CPU_AARCH64_ICACHE_AARCH64_HPP

8
src/hotspot/cpu/aarch64/interp_masm_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2003, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_INTERP_MASM_AARCH64_64_HPP
#define CPU_AARCH64_VM_INTERP_MASM_AARCH64_64_HPP
#ifndef CPU_AARCH64_INTERP_MASM_AARCH64_HPP
#define CPU_AARCH64_INTERP_MASM_AARCH64_HPP
#include "asm/macroAssembler.hpp"
#include "interpreter/invocationCounter.hpp"
@ -295,4 +295,4 @@ class InterpreterMacroAssembler: public MacroAssembler {
}
};
#endif // CPU_AARCH64_VM_INTERP_MASM_AARCH64_64_HPP
#endif // CPU_AARCH64_INTERP_MASM_AARCH64_HPP

8
src/hotspot/cpu/aarch64/interpreterRT_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_INTERPRETERRT_AARCH64_HPP
#define CPU_AARCH64_VM_INTERPRETERRT_AARCH64_HPP
#ifndef CPU_AARCH64_INTERPRETERRT_AARCH64_HPP
#define CPU_AARCH64_INTERPRETERRT_AARCH64_HPP
// This is included in the middle of class Interpreter.
// Do not include files here.
@ -58,4 +58,4 @@ class SignatureHandlerGenerator: public NativeSignatureIterator {
static Register temp();
};
#endif // CPU_AARCH64_VM_INTERPRETERRT_AARCH64_HPP
#endif // CPU_AARCH64_INTERPRETERRT_AARCH64_HPP

8
src/hotspot/cpu/aarch64/javaFrameAnchor_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_JAVAFRAMEANCHOR_AARCH64_HPP
#define CPU_AARCH64_VM_JAVAFRAMEANCHOR_AARCH64_HPP
#ifndef CPU_AARCH64_JAVAFRAMEANCHOR_AARCH64_HPP
#define CPU_AARCH64_JAVAFRAMEANCHOR_AARCH64_HPP
private:
@ -84,4 +84,4 @@ public:
// Assert (last_Java_sp == NULL || fp == NULL)
void set_last_Java_fp(intptr_t* fp) { OrderAccess::release(); _last_Java_fp = fp; }
#endif // CPU_AARCH64_VM_JAVAFRAMEANCHOR_AARCH64_HPP
#endif // CPU_AARCH64_JAVAFRAMEANCHOR_AARCH64_HPP

8
src/hotspot/cpu/aarch64/jniTypes_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998, 2017, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_JNITYPES_AARCH64_HPP
#define CPU_AARCH64_VM_JNITYPES_AARCH64_HPP
#ifndef CPU_AARCH64_JNITYPES_AARCH64_HPP
#define CPU_AARCH64_JNITYPES_AARCH64_HPP
#include "jni.h"
#include "memory/allocation.hpp"
@ -104,4 +104,4 @@ public:
#undef _JNI_SLOT_OFFSET
};
#endif // CPU_AARCH64_VM_JNITYPES_AARCH64_HPP
#endif // CPU_AARCH64_JNITYPES_AARCH64_HPP

8
src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_MACROASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_VM_MACROASSEMBLER_AARCH64_HPP
#ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
#define CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP
#include "asm/assembler.hpp"
@ -1391,4 +1391,4 @@ struct tableswitch {
Label _branches;
};
#endif // CPU_AARCH64_VM_MACROASSEMBLER_AARCH64_HPP
#endif // CPU_AARCH64_MACROASSEMBLER_AARCH64_HPP

8
src/hotspot/cpu/aarch64/macroAssembler_aarch64.inline.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_MACROASSEMBLER_AARCH64_INLINE_HPP
#define CPU_AARCH64_VM_MACROASSEMBLER_AARCH64_INLINE_HPP
#ifndef CPU_AARCH64_MACROASSEMBLER_AARCH64_INLINE_HPP
#define CPU_AARCH64_MACROASSEMBLER_AARCH64_INLINE_HPP
#include "asm/assembler.hpp"
@ -32,4 +32,4 @@
#endif // ndef PRODUCT
#endif // CPU_AARCH64_VM_MACROASSEMBLER_AARCH64_INLINE_HPP
#endif // CPU_AARCH64_MACROASSEMBLER_AARCH64_INLINE_HPP

6
src/hotspot/cpu/aarch64/nativeInst_aarch64.hpp
View file

@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_NATIVEINST_AARCH64_HPP
#define CPU_AARCH64_VM_NATIVEINST_AARCH64_HPP
#ifndef CPU_AARCH64_NATIVEINST_AARCH64_HPP
#define CPU_AARCH64_NATIVEINST_AARCH64_HPP
#include "asm/assembler.hpp"
#include "runtime/icache.hpp"
@ -703,4 +703,4 @@ inline NativeLdSt *NativeLdSt_at(address addr) {
assert(nativeInstruction_at(addr)->is_Imm_LdSt(), "no immediate load/store found");
return (NativeLdSt*)addr;
}
#endif // CPU_AARCH64_VM_NATIVEINST_AARCH64_HPP
#endif // CPU_AARCH64_NATIVEINST_AARCH64_HPP

8
src/hotspot/cpu/aarch64/registerMap_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1998, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_REGISTERMAP_AARCH64_HPP
#define CPU_AARCH64_VM_REGISTERMAP_AARCH64_HPP
#ifndef CPU_AARCH64_REGISTERMAP_AARCH64_HPP
#define CPU_AARCH64_REGISTERMAP_AARCH64_HPP
// machine-dependent implemention for register maps
friend class frame;
@ -42,4 +42,4 @@
void pd_initialize() {}
void pd_initialize_from(const RegisterMap* map) {}
#endif // CPU_AARCH64_VM_REGISTERMAP_AARCH64_HPP
#endif // CPU_AARCH64_REGISTERMAP_AARCH64_HPP

8
src/hotspot/cpu/aarch64/register_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_REGISTER_AARCH64_HPP
#define CPU_AARCH64_VM_REGISTER_AARCH64_HPP
#ifndef CPU_AARCH64_REGISTER_AARCH64_HPP
#define CPU_AARCH64_REGISTER_AARCH64_HPP
#include "asm/register.hpp"
@ -258,4 +258,4 @@ public:
uint32_t bits() const { return _bitset; }
};
#endif // CPU_AARCH64_VM_REGISTER_AARCH64_HPP
#endif // CPU_AARCH64_REGISTER_AARCH64_HPP

8
src/hotspot/cpu/aarch64/relocInfo_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_RELOCINFO_AARCH64_HPP
#define CPU_AARCH64_VM_RELOCINFO_AARCH64_HPP
#ifndef CPU_AARCH64_RELOCINFO_AARCH64_HPP
#define CPU_AARCH64_RELOCINFO_AARCH64_HPP
// machine-dependent parts of class relocInfo
private:
@ -41,4 +41,4 @@
// listed in the oop section.
static bool mustIterateImmediateOopsInCode() { return false; }
#endif // CPU_AARCH64_VM_RELOCINFO_AARCH64_HPP
#endif // CPU_AARCH64_RELOCINFO_AARCH64_HPP

8
src/hotspot/cpu/aarch64/stubRoutines_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_STUBROUTINES_AARCH64_HPP
#define CPU_AARCH64_VM_STUBROUTINES_AARCH64_HPP
#ifndef CPU_AARCH64_STUBROUTINES_AARCH64_HPP
#define CPU_AARCH64_STUBROUTINES_AARCH64_HPP
// This file holds the platform specific parts of the StubRoutines
// definition. See stubRoutines.hpp for a description on how to
@ -195,4 +195,4 @@ private:
// end trigonometric tables block
};
#endif // CPU_AARCH64_VM_STUBROUTINES_AARCH64_HPP
#endif // CPU_AARCH64_STUBROUTINES_AARCH64_HPP

8
src/hotspot/cpu/aarch64/templateTable_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_TEMPLATETABLE_AARCH64_64_HPP
#define CPU_AARCH64_VM_TEMPLATETABLE_AARCH64_64_HPP
#ifndef CPU_AARCH64_TEMPLATETABLE_AARCH64_HPP
#define CPU_AARCH64_TEMPLATETABLE_AARCH64_HPP
static void prepare_invoke(int byte_no,
Register method, // linked method (or i-klass)
@ -39,4 +39,4 @@ static void prepare_invoke(int byte_no,
static void index_check(Register array, Register index);
static void index_check_without_pop(Register array, Register index);
#endif // CPU_AARCH64_VM_TEMPLATETABLE_AARCH64_64_HPP
#endif // CPU_AARCH64_TEMPLATETABLE_AARCH64_HPP

8
src/hotspot/cpu/aarch64/vmStructs_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2015, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_VMSTRUCTS_AARCH64_HPP
#define CPU_AARCH64_VM_VMSTRUCTS_AARCH64_HPP
#ifndef CPU_AARCH64_VMSTRUCTS_AARCH64_HPP
#define CPU_AARCH64_VMSTRUCTS_AARCH64_HPP
// These are the CPU-specific fields, types and integer
// constants required by the Serviceability Agent. This file is
@ -39,4 +39,4 @@
#define VM_LONG_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant)
#endif // CPU_AARCH64_VM_VMSTRUCTS_AARCH64_HPP
#endif // CPU_AARCH64_VMSTRUCTS_AARCH64_HPP

8
src/hotspot/cpu/aarch64/vm_version_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_VM_VERSION_AARCH64_HPP
#define CPU_AARCH64_VM_VM_VERSION_AARCH64_HPP
#ifndef CPU_AARCH64_VM_VERSION_AARCH64_HPP
#define CPU_AARCH64_VM_VERSION_AARCH64_HPP
#include "runtime/globals_extension.hpp"
#include "runtime/vm_version.hpp"
@ -121,4 +121,4 @@ public:
}
};
#endif // CPU_AARCH64_VM_VM_VERSION_AARCH64_HPP
#endif // CPU_AARCH64_VM_VERSION_AARCH64_HPP

8
src/hotspot/cpu/aarch64/vm_version_ext_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_AARCH64_VM_VM_VERSION_EXT_AARCH64_HPP
#define CPU_AARCH64_VM_VM_VERSION_EXT_AARCH64_HPP
#ifndef CPU_AARCH64_VM_VERSION_EXT_AARCH64_HPP
#define CPU_AARCH64_VM_VERSION_EXT_AARCH64_HPP
#include "utilities/macros.hpp"
#include "vm_version_aarch64.hpp"
@ -51,4 +51,4 @@ class VM_Version_Ext : public VM_Version {
};
#endif // CPU_AARCH64_VM_VM_VERSION_EXT_AARCH64_HPP
#endif // CPU_AARCH64_VM_VERSION_EXT_AARCH64_HPP

8
src/hotspot/cpu/aarch64/vmreg_aarch64.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2006, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_VMREG_AARCH64_HPP
#define CPU_AARCH64_VM_VMREG_AARCH64_HPP
#ifndef CPU_AARCH64_VMREG_AARCH64_HPP
#define CPU_AARCH64_VMREG_AARCH64_HPP
inline bool is_Register() {
return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
@ -52,4 +52,4 @@ inline bool is_concrete() {
return is_even(value());
}
#endif // CPU_AARCH64_VM_VMREG_AARCH64_HPP
#endif // CPU_AARCH64_VMREG_AARCH64_HPP

8
src/hotspot/cpu/aarch64/vmreg_aarch64.inline.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2006, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_AARCH64_VM_VMREG_AARCH64_INLINE_HPP
#define CPU_AARCH64_VM_VMREG_AARCH64_INLINE_HPP
#ifndef CPU_AARCH64_VMREG_AARCH64_INLINE_HPP
#define CPU_AARCH64_VMREG_AARCH64_INLINE_HPP
inline VMReg RegisterImpl::as_VMReg() {
if( this==noreg ) return VMRegImpl::Bad();
@ -35,4 +35,4 @@ inline VMReg FloatRegisterImpl::as_VMReg() {
return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
}
#endif // CPU_AARCH64_VM_VMREG_AARCH64_INLINE_HPP
#endif // CPU_AARCH64_VMREG_AARCH64_INLINE_HPP

8
src/hotspot/cpu/arm/assembler_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_ASSEMBLER_ARM_HPP
#define CPU_ARM_VM_ASSEMBLER_ARM_HPP
#ifndef CPU_ARM_ASSEMBLER_ARM_HPP
#define CPU_ARM_ASSEMBLER_ARM_HPP
#include "utilities/macros.hpp"
@ -326,4 +326,4 @@ class VFP {
#include "assembler_arm_32.hpp"
#endif // CPU_ARM_VM_ASSEMBLER_ARM_HPP
#endif // CPU_ARM_ASSEMBLER_ARM_HPP

8
src/hotspot/cpu/arm/assembler_arm.inline.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_ASSEMBLER_ARM_INLINE_HPP
#define CPU_ARM_VM_ASSEMBLER_ARM_INLINE_HPP
#ifndef CPU_ARM_ASSEMBLER_ARM_INLINE_HPP
#define CPU_ARM_ASSEMBLER_ARM_INLINE_HPP
#endif // CPU_ARM_VM_ASSEMBLER_ARM_INLINE_HPP
#endif // CPU_ARM_ASSEMBLER_ARM_INLINE_HPP

8
src/hotspot/cpu/arm/assembler_arm_32.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_ASSEMBLER_ARM_32_HPP
#define CPU_ARM_VM_ASSEMBLER_ARM_32_HPP
#ifndef CPU_ARM_ASSEMBLER_ARM_32_HPP
#define CPU_ARM_ASSEMBLER_ARM_32_HPP
// ARM Addressing Mode 1 - Data processing operands
class AsmOperand {
@ -1250,4 +1250,4 @@ extern double __aeabi_dsub_glibc(double, double);
#endif // __SOFTFP__
#endif // CPU_ARM_VM_ASSEMBLER_ARM_32_HPP
#endif // CPU_ARM_ASSEMBLER_ARM_32_HPP

8
src/hotspot/cpu/arm/bytes_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_BYTES_ARM_HPP
#define CPU_ARM_VM_BYTES_ARM_HPP
#ifndef CPU_ARM_BYTES_ARM_HPP
#define CPU_ARM_BYTES_ARM_HPP
#include "memory/allocation.hpp"
#include "utilities/macros.hpp"
@ -186,4 +186,4 @@ class Bytes: AllStatic {
// The following header contains the implementations of swap_u2, swap_u4, and swap_u8
#include OS_CPU_HEADER_INLINE(bytes)
#endif // CPU_ARM_VM_BYTES_ARM_HPP
#endif // CPU_ARM_BYTES_ARM_HPP

8
src/hotspot/cpu/arm/c1_Defs_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_C1_DEFS_ARM_HPP
#define CPU_ARM_VM_C1_DEFS_ARM_HPP
#ifndef CPU_ARM_C1_DEFS_ARM_HPP
#define CPU_ARM_C1_DEFS_ARM_HPP
// native word offsets from memory address (little endian)
enum {
@ -78,4 +78,4 @@ enum {
#define CARDTABLEBARRIERSET_POST_BARRIER_HELPER
#define GENERATE_ADDRESS_IS_PREFERRED
#endif // CPU_ARM_VM_C1_DEFS_ARM_HPP
#endif // CPU_ARM_C1_DEFS_ARM_HPP

8
src/hotspot/cpu/arm/c1_FpuStackSim_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,9 +22,9 @@
*
*/
#ifndef CPU_ARM_VM_C1_FPUSTACKSIM_ARM_HPP
#define CPU_ARM_VM_C1_FPUSTACKSIM_ARM_HPP
#ifndef CPU_ARM_C1_FPUSTACKSIM_ARM_HPP
#define CPU_ARM_C1_FPUSTACKSIM_ARM_HPP
// Nothing needed here
#endif // CPU_ARM_VM_C1_FPUSTACKSIM_ARM_HPP
#endif // CPU_ARM_C1_FPUSTACKSIM_ARM_HPP

8
src/hotspot/cpu/arm/c1_FrameMap_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_C1_FRAMEMAP_ARM_HPP
#define CPU_ARM_VM_C1_FRAMEMAP_ARM_HPP
#ifndef CPU_ARM_C1_FRAMEMAP_ARM_HPP
#define CPU_ARM_C1_FRAMEMAP_ARM_HPP
public:
@ -108,4 +108,4 @@
return pd_last_cpu_reg;
}
#endif // CPU_ARM_VM_C1_FRAMEMAP_ARM_HPP
#endif // CPU_ARM_C1_FRAMEMAP_ARM_HPP

8
src/hotspot/cpu/arm/c1_LIRAssembler_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_C1_LIRASSEMBLER_ARM_HPP
#define CPU_ARM_VM_C1_LIRASSEMBLER_ARM_HPP
#ifndef CPU_ARM_C1_LIRASSEMBLER_ARM_HPP
#define CPU_ARM_C1_LIRASSEMBLER_ARM_HPP
private:
@ -65,4 +65,4 @@
void store_parameter(jint c, int offset_from_sp_in_words);
void store_parameter(Metadata* m, int offset_from_sp_in_words);
#endif // CPU_ARM_VM_C1_LIRASSEMBLER_ARM_HPP
#endif // CPU_ARM_C1_LIRASSEMBLER_ARM_HPP

8
src/hotspot/cpu/arm/c1_LinearScan_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_C1_LINEARSCAN_ARM_HPP
#define CPU_ARM_VM_C1_LINEARSCAN_ARM_HPP
#ifndef CPU_ARM_C1_LINEARSCAN_ARM_HPP
#define CPU_ARM_C1_LINEARSCAN_ARM_HPP
inline bool LinearScan::is_processed_reg_num(int reg_num) {
return reg_num < pd_nof_cpu_regs_processed_in_linearscan ||
@ -68,4 +68,4 @@ inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) {
return true;
}
#endif // CPU_ARM_VM_C1_LINEARSCAN_ARM_HPP
#endif // CPU_ARM_C1_LINEARSCAN_ARM_HPP

8
src/hotspot/cpu/arm/c1_MacroAssembler_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_C1_MACROASSEMBLER_ARM_HPP
#define CPU_ARM_VM_C1_MACROASSEMBLER_ARM_HPP
#ifndef CPU_ARM_C1_MACROASSEMBLER_ARM_HPP
#define CPU_ARM_C1_MACROASSEMBLER_ARM_HPP
private:
@ -66,4 +66,4 @@
// This platform only uses signal-based null checks. The Label is not needed.
void null_check(Register r, Label *Lnull = NULL) { MacroAssembler::null_check(r); }
#endif // CPU_ARM_VM_C1_MACROASSEMBLER_ARM_HPP
#endif // CPU_ARM_C1_MACROASSEMBLER_ARM_HPP

8
src/hotspot/cpu/arm/c1_globals_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_C1_GLOBALS_ARM_HPP
#define CPU_ARM_VM_C1_GLOBALS_ARM_HPP
#ifndef CPU_ARM_C1_GLOBALS_ARM_HPP
#define CPU_ARM_C1_GLOBALS_ARM_HPP
#include "utilities/globalDefinitions.hpp"
#include "utilities/macros.hpp"
@ -70,4 +70,4 @@ define_pd_global(bool, OptimizeSinglePrecision, true);
define_pd_global(bool, CSEArrayLength, true);
define_pd_global(bool, TwoOperandLIRForm, false);
#endif // CPU_ARM_VM_C1_GLOBALS_ARM_HPP
#endif // CPU_ARM_C1_GLOBALS_ARM_HPP

8
src/hotspot/cpu/arm/c2_globals_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_C2_GLOBALS_ARM_HPP
#define CPU_ARM_VM_C2_GLOBALS_ARM_HPP
#ifndef CPU_ARM_C2_GLOBALS_ARM_HPP
#define CPU_ARM_C2_GLOBALS_ARM_HPP
#include "utilities/globalDefinitions.hpp"
#include "utilities/macros.hpp"
@ -108,4 +108,4 @@ define_pd_global(size_t, MetaspaceSize, ScaleForWordSize(16*M));
// Ergonomics related flags
define_pd_global(bool, NeverActAsServerClassMachine, false);
#endif // CPU_ARM_VM_C2_GLOBALS_ARM_HPP
#endif // CPU_ARM_C2_GLOBALS_ARM_HPP

8
src/hotspot/cpu/arm/codeBuffer_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_CODEBUFFER_ARM_HPP
#define CPU_ARM_VM_CODEBUFFER_ARM_HPP
#ifndef CPU_ARM_CODEBUFFER_ARM_HPP
#define CPU_ARM_CODEBUFFER_ARM_HPP
private:
void pd_initialize() {}
@ -31,4 +31,4 @@ private:
public:
void flush_bundle(bool start_new_bundle) {}
#endif // CPU_ARM_VM_CODEBUFFER_ARM_HPP
#endif // CPU_ARM_CODEBUFFER_ARM_HPP

8
src/hotspot/cpu/arm/copy_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_COPY_ARM_HPP
#define CPU_ARM_VM_COPY_ARM_HPP
#ifndef CPU_ARM_COPY_ARM_HPP
#define CPU_ARM_COPY_ARM_HPP
#include "utilities/macros.hpp"
@ -56,4 +56,4 @@ static void pd_zero_to_bytes(void* to, size_t count) {
memset(to, 0, count);
}
#endif // CPU_ARM_VM_COPY_ARM_HPP
#endif // CPU_ARM_COPY_ARM_HPP

8
src/hotspot/cpu/arm/depChecker_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,9 +22,9 @@
*
*/
#ifndef CPU_ARM_VM_DEPCHECKER_ARM_HPP
#define CPU_ARM_VM_DEPCHECKER_ARM_HPP
#ifndef CPU_ARM_DEPCHECKER_ARM_HPP
#define CPU_ARM_DEPCHECKER_ARM_HPP
// Nothing to do
#endif // CPU_ARM_VM_DEPCHECKER_ARM_HPP
#endif // CPU_ARM_DEPCHECKER_ARM_HPP

8
src/hotspot/cpu/arm/disassembler_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_DISASSEMBLER_ARM_HPP
#define CPU_ARM_VM_DISASSEMBLER_ARM_HPP
#ifndef CPU_ARM_DISASSEMBLER_ARM_HPP
#define CPU_ARM_DISASSEMBLER_ARM_HPP
static int pd_instruction_alignment() {
return sizeof(int);
@ -33,4 +33,4 @@
return "";
}
#endif // CPU_ARM_VM_DISASSEMBLER_ARM_HPP
#endif // CPU_ARM_DISASSEMBLER_ARM_HPP

8
src/hotspot/cpu/arm/frame_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_FRAME_ARM_HPP
#define CPU_ARM_VM_FRAME_ARM_HPP
#ifndef CPU_ARM_FRAME_ARM_HPP
#define CPU_ARM_FRAME_ARM_HPP
#include "runtime/synchronizer.hpp"
@ -118,4 +118,4 @@
static jint interpreter_frame_expression_stack_direction() { return -1; }
#endif // CPU_ARM_VM_FRAME_ARM_HPP
#endif // CPU_ARM_FRAME_ARM_HPP

8
src/hotspot/cpu/arm/frame_arm.inline.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_FRAME_ARM_INLINE_HPP
#define CPU_ARM_VM_FRAME_ARM_INLINE_HPP
#ifndef CPU_ARM_FRAME_ARM_INLINE_HPP
#define CPU_ARM_FRAME_ARM_INLINE_HPP
#include "code/codeCache.hpp"
#include "code/vmreg.inline.hpp"
@ -228,4 +228,4 @@ inline void frame::set_saved_oop_result(RegisterMap* map, oop obj) {
*result_adr = obj;
}
#endif // CPU_ARM_VM_FRAME_ARM_INLINE_HPP
#endif // CPU_ARM_FRAME_ARM_INLINE_HPP

4
src/hotspot/cpu/arm/gc/shared/cardTableBarrierSetAssembler_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2018, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -43,4 +43,4 @@ protected:
Address obj, Register new_val, Register tmp1, Register tmp2, Register tmp3, bool is_null);
};
#endif // #ifndef CPU_ARM_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_ARM_HPP
#endif // CPU_ARM_GC_SHARED_CARDTABLEBARRIERSETASSEMBLER_ARM_HPP

8
src/hotspot/cpu/arm/globalDefinitions_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_GLOBALDEFINITIONS_ARM_HPP
#define CPU_ARM_VM_GLOBALDEFINITIONS_ARM_HPP
#ifndef CPU_ARM_GLOBALDEFINITIONS_ARM_HPP
#define CPU_ARM_GLOBALDEFINITIONS_ARM_HPP
const int StackAlignmentInBytes = 8;
@ -59,4 +59,4 @@ const bool HaveVFP = true;
#endif
#endif
#endif // CPU_ARM_VM_GLOBALDEFINITIONS_ARM_HPP
#endif // CPU_ARM_GLOBALDEFINITIONS_ARM_HPP

8
src/hotspot/cpu/arm/globals_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_GLOBALS_ARM_HPP
#define CPU_ARM_VM_GLOBALS_ARM_HPP
#ifndef CPU_ARM_GLOBALS_ARM_HPP
#define CPU_ARM_GLOBALS_ARM_HPP
//
// Sets the default values for platform dependent flags used by the runtime system.
@ -87,4 +87,4 @@ define_pd_global(bool, ThreadLocalHandshakes, false);
range, \
constraint, \
writeable)
#endif // CPU_ARM_VM_GLOBALS_ARM_HPP
#endif // CPU_ARM_GLOBALS_ARM_HPP

8
src/hotspot/cpu/arm/icache_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_ICACHE_ARM_HPP
#define CPU_ARM_VM_ICACHE_ARM_HPP
#ifndef CPU_ARM_ICACHE_ARM_HPP
#define CPU_ARM_ICACHE_ARM_HPP
// Interface for updating the instruction cache. Whenever the VM modifies
// code, part of the processor instruction cache potentially has to be flushed.
@ -37,4 +37,4 @@ class ICache : public AbstractICache {
};
};
#endif // CPU_ARM_VM_ICACHE_ARM_HPP
#endif // CPU_ARM_ICACHE_ARM_HPP

8
src/hotspot/cpu/arm/interp_masm_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_INTERP_MASM_ARM_HPP
#define CPU_ARM_VM_INTERP_MASM_ARM_HPP
#ifndef CPU_ARM_INTERP_MASM_ARM_HPP
#define CPU_ARM_INTERP_MASM_ARM_HPP
#include "asm/macroAssembler.hpp"
#include "interpreter/invocationCounter.hpp"
@ -277,4 +277,4 @@ void get_method_counters(Register method,
Register reg3 = noreg);
};
#endif // CPU_ARM_VM_INTERP_MASM_ARM_HPP
#endif // CPU_ARM_INTERP_MASM_ARM_HPP

8
src/hotspot/cpu/arm/interpreterRT_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_INTERPRETERRT_ARM_HPP
#define CPU_ARM_VM_INTERPRETERRT_ARM_HPP
#ifndef CPU_ARM_INTERPRETERRT_ARM_HPP
#define CPU_ARM_INTERPRETERRT_ARM_HPP
// native method calls
@ -60,4 +60,4 @@ class SignatureHandlerGenerator: public NativeSignatureIterator {
// sharing). See normalize_fast_native_fingerprint
#define SHARING_FAST_NATIVE_FINGERPRINTS
#endif // CPU_ARM_VM_INTERPRETERRT_ARM_HPP
#endif // CPU_ARM_INTERPRETERRT_ARM_HPP

8
src/hotspot/cpu/arm/javaFrameAnchor_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_JAVAFRAMEANCHOR_ARM_HPP
#define CPU_ARM_VM_JAVAFRAMEANCHOR_ARM_HPP
#ifndef CPU_ARM_JAVAFRAMEANCHOR_ARM_HPP
#define CPU_ARM_JAVAFRAMEANCHOR_ARM_HPP
private:
@ -83,4 +83,4 @@ public:
// Assert (last_Java_sp == NULL || fp == NULL)
void set_last_Java_fp(intptr_t* fp) { _last_Java_fp = fp; }
#endif // CPU_ARM_VM_JAVAFRAMEANCHOR_ARM_HPP
#endif // CPU_ARM_JAVAFRAMEANCHOR_ARM_HPP

8
src/hotspot/cpu/arm/jniTypes_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2017, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_JNITYPES_ARM_HPP
#define CPU_ARM_VM_JNITYPES_ARM_HPP
#ifndef CPU_ARM_JNITYPES_ARM_HPP
#define CPU_ARM_JNITYPES_ARM_HPP
#include "jni.h"
#include "memory/allocation.hpp"
@ -79,4 +79,4 @@ public:
};
#endif // CPU_ARM_VM_JNITYPES_ARM_HPP
#endif // CPU_ARM_JNITYPES_ARM_HPP

8
src/hotspot/cpu/arm/macroAssembler_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_MACROASSEMBLER_ARM_HPP
#define CPU_ARM_VM_MACROASSEMBLER_ARM_HPP
#ifndef CPU_ARM_MACROASSEMBLER_ARM_HPP
#define CPU_ARM_MACROASSEMBLER_ARM_HPP
#include "code/relocInfo.hpp"
#include "code/relocInfo_ext.hpp"
@ -1097,4 +1097,4 @@ private:
};
#endif // CPU_ARM_VM_MACROASSEMBLER_ARM_HPP
#endif // CPU_ARM_MACROASSEMBLER_ARM_HPP

8
src/hotspot/cpu/arm/macroAssembler_arm.inline.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_MACROASSEMBLER_ARM_INLINE_HPP
#define CPU_ARM_VM_MACROASSEMBLER_ARM_INLINE_HPP
#ifndef CPU_ARM_MACROASSEMBLER_ARM_INLINE_HPP
#define CPU_ARM_MACROASSEMBLER_ARM_INLINE_HPP
#include "asm/assembler.inline.hpp"
#include "asm/codeBuffer.hpp"
@ -63,4 +63,4 @@ inline void MacroAssembler::pd_patch_instruction(address branch, address target,
}
}
#endif // CPU_ARM_VM_MACROASSEMBLER_ARM_INLINE_HPP
#endif // CPU_ARM_MACROASSEMBLER_ARM_INLINE_HPP

8
src/hotspot/cpu/arm/nativeInst_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_NATIVEINST_ARM_HPP
#define CPU_ARM_VM_NATIVEINST_ARM_HPP
#ifndef CPU_ARM_NATIVEINST_ARM_HPP
#define CPU_ARM_NATIVEINST_ARM_HPP
#include "asm/macroAssembler.hpp"
#include "runtime/icache.hpp"
@ -33,4 +33,4 @@
#include "nativeInst_arm_32.hpp"
#endif // CPU_ARM_VM_NATIVEINST_ARM_HPP
#endif // CPU_ARM_NATIVEINST_ARM_HPP

6
src/hotspot/cpu/arm/nativeInst_arm_32.hpp
View file

@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_NATIVEINST_ARM_32_HPP
#define CPU_ARM_VM_NATIVEINST_ARM_32_HPP
#ifndef CPU_ARM_NATIVEINST_ARM_32_HPP
#define CPU_ARM_NATIVEINST_ARM_32_HPP
#include "asm/macroAssembler.hpp"
#include "code/codeCache.hpp"
@ -429,4 +429,4 @@ inline NativeCall* nativeCall_before(address return_address) {
return (NativeCall *) rawNativeCall_before(return_address);
}
#endif // CPU_ARM_VM_NATIVEINST_ARM_32_HPP
#endif // CPU_ARM_NATIVEINST_ARM_32_HPP

8
src/hotspot/cpu/arm/registerMap_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_REGISTERMAP_ARM_HPP
#define CPU_ARM_VM_REGISTERMAP_ARM_HPP
#ifndef CPU_ARM_REGISTERMAP_ARM_HPP
#define CPU_ARM_REGISTERMAP_ARM_HPP
// machine-dependent implemention for register maps
friend class frame;
@ -41,4 +41,4 @@
void pd_initialize() {}
void pd_initialize_from(const RegisterMap* map) {}
#endif // CPU_ARM_VM_REGISTERMAP_ARM_HPP
#endif // CPU_ARM_REGISTERMAP_ARM_HPP

8
src/hotspot/cpu/arm/register_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_REGISTER_ARM_HPP
#define CPU_ARM_VM_REGISTER_ARM_HPP
#ifndef CPU_ARM_REGISTER_ARM_HPP
#define CPU_ARM_REGISTER_ARM_HPP
#include "asm/register.hpp"
#include "vm_version_arm.hpp"
@ -437,4 +437,4 @@ class VFPSystemRegisterImpl : public AbstractRegisterImpl {
#define j_rarg3 c_rarg3
#endif // CPU_ARM_VM_REGISTER_ARM_HPP
#endif // CPU_ARM_REGISTER_ARM_HPP

8
src/hotspot/cpu/arm/relocInfo_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_RELOCINFO_ARM_HPP
#define CPU_ARM_VM_RELOCINFO_ARM_HPP
#ifndef CPU_ARM_RELOCINFO_ARM_HPP
#define CPU_ARM_RELOCINFO_ARM_HPP
private:
@ -38,4 +38,4 @@
// listed in the oop section.
static bool mustIterateImmediateOopsInCode() { return false; }
#endif // CPU_ARM_VM_RELOCINFO_ARM_HPP
#endif // CPU_ARM_RELOCINFO_ARM_HPP

8
src/hotspot/cpu/arm/stubRoutines_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_STUBROUTINES_ARM_HPP
#define CPU_ARM_VM_STUBROUTINES_ARM_HPP
#ifndef CPU_ARM_STUBROUTINES_ARM_HPP
#define CPU_ARM_STUBROUTINES_ARM_HPP
// This file holds the platform specific parts of the StubRoutines
// definition. See stubRoutines.hpp for a description on how to
@ -60,4 +60,4 @@ class Arm {
static address atomic_store_long_entry() { return _atomic_store_long_entry; }
#endif // CPU_ARM_VM_STUBROUTINES_ARM_HPP
#endif // CPU_ARM_STUBROUTINES_ARM_HPP

8
src/hotspot/cpu/arm/templateTable_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_TEMPLATETABLE_ARM_HPP
#define CPU_ARM_VM_TEMPLATETABLE_ARM_HPP
#ifndef CPU_ARM_TEMPLATETABLE_ARM_HPP
#define CPU_ARM_TEMPLATETABLE_ARM_HPP
static void prepare_invoke(int byte_no,
Register method, // linked method (or i-klass)
@ -59,4 +59,4 @@
static void jvmti_post_fast_field_mod(TosState state);
#endif // CPU_ARM_VM_TEMPLATETABLE_ARM_HPP
#endif // CPU_ARM_TEMPLATETABLE_ARM_HPP

8
src/hotspot/cpu/arm/vmStructs_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_VMSTRUCTS_ARM_HPP
#define CPU_ARM_VM_VMSTRUCTS_ARM_HPP
#ifndef CPU_ARM_VMSTRUCTS_ARM_HPP
#define CPU_ARM_VMSTRUCTS_ARM_HPP
// These are the CPU-specific fields, types and integer
// constants required by the Serviceability Agent. This file is
@ -45,4 +45,4 @@
#define VM_LONG_CONSTANTS_CPU(declare_constant, declare_preprocessor_constant, declare_c1_constant, declare_c2_constant, declare_c2_preprocessor_constant)
#endif // CPU_ARM_VM_VMSTRUCTS_ARM_HPP
#endif // CPU_ARM_VMSTRUCTS_ARM_HPP

8
src/hotspot/cpu/arm/vm_version_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_VM_VERSION_ARM_HPP
#define CPU_ARM_VM_VM_VERSION_ARM_HPP
#ifndef CPU_ARM_VM_VERSION_ARM_HPP
#define CPU_ARM_VM_VERSION_ARM_HPP
#include "runtime/globals_extension.hpp"
#include "runtime/vm_version.hpp"
@ -106,4 +106,4 @@ class VM_Version: public Abstract_VM_Version {
};
#endif // CPU_ARM_VM_VM_VERSION_ARM_HPP
#endif // CPU_ARM_VM_VERSION_ARM_HPP

8
src/hotspot/cpu/arm/vm_version_ext_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2013, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_VM_VERSION_EXT_ARM_HPP
#define CPU_ARM_VM_VM_VERSION_EXT_ARM_HPP
#ifndef CPU_ARM_VM_VERSION_EXT_ARM_HPP
#define CPU_ARM_VM_VERSION_EXT_ARM_HPP
#include "utilities/macros.hpp"
#include "vm_version_arm.hpp"
@ -51,4 +51,4 @@ class VM_Version_Ext : public VM_Version {
};
#endif // CPU_ARM_VM_VM_VERSION_EXT_ARM_HPP
#endif // CPU_ARM_VM_VERSION_EXT_ARM_HPP

8
src/hotspot/cpu/arm/vmreg_arm.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_VMREG_ARM_HPP
#define CPU_ARM_VM_VMREG_ARM_HPP
#ifndef CPU_ARM_VMREG_ARM_HPP
#define CPU_ARM_VMREG_ARM_HPP
inline bool is_Register() {
return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
@ -55,4 +55,4 @@
}
}
#endif // CPU_ARM_VM_VMREG_ARM_HPP
#endif // CPU_ARM_VMREG_ARM_HPP

8
src/hotspot/cpu/arm/vmreg_arm.inline.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2008, 2014, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2008, 2019, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -22,8 +22,8 @@
*
*/
#ifndef CPU_ARM_VM_VMREG_ARM_INLINE_HPP
#define CPU_ARM_VM_VMREG_ARM_INLINE_HPP
#ifndef CPU_ARM_VMREG_ARM_INLINE_HPP
#define CPU_ARM_VMREG_ARM_INLINE_HPP
inline VMReg RegisterImpl::as_VMReg() {
return VMRegImpl::as_VMReg(encoding() << ConcreteRegisterImpl::log_vmregs_per_gpr);
@ -32,4 +32,4 @@ inline VMReg RegisterImpl::as_VMReg() {
inline VMReg FloatRegisterImpl::as_VMReg() {
return VMRegImpl::as_VMReg((encoding() << ConcreteRegisterImpl::log_vmregs_per_fpr) + ConcreteRegisterImpl::max_gpr);
}
#endif // CPU_ARM_VM_VMREG_ARM_INLINE_HPP
#endif // CPU_ARM_VMREG_ARM_INLINE_HPP

8
src/hotspot/cpu/ppc/assembler_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2018 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_ASSEMBLER_PPC_HPP
#define CPU_PPC_VM_ASSEMBLER_PPC_HPP
#ifndef CPU_PPC_ASSEMBLER_PPC_HPP
#define CPU_PPC_ASSEMBLER_PPC_HPP
#include "asm/register.hpp"
@ -2450,4 +2450,4 @@ class Assembler : public AbstractAssembler {
};
#endif // CPU_PPC_VM_ASSEMBLER_PPC_HPP
#endif // CPU_PPC_ASSEMBLER_PPC_HPP

8
src/hotspot/cpu/ppc/assembler_ppc.inline.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2018 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_ASSEMBLER_PPC_INLINE_HPP
#define CPU_PPC_VM_ASSEMBLER_PPC_INLINE_HPP
#ifndef CPU_PPC_ASSEMBLER_PPC_INLINE_HPP
#define CPU_PPC_ASSEMBLER_PPC_INLINE_HPP
#include "asm/assembler.inline.hpp"
#include "asm/codeBuffer.hpp"
@ -1127,4 +1127,4 @@ inline void Assembler::load_const32(Register d, int i) {
ori(d, d, i & 0xFFFF);
}
#endif // CPU_PPC_VM_ASSEMBLER_PPC_INLINE_HPP
#endif // CPU_PPC_ASSEMBLER_PPC_INLINE_HPP

8
src/hotspot/cpu/ppc/bytes_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2016 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_BYTES_PPC_HPP
#define CPU_PPC_VM_BYTES_PPC_HPP
#ifndef CPU_PPC_BYTES_PPC_HPP
#define CPU_PPC_BYTES_PPC_HPP
#include "memory/allocation.hpp"
@ -268,4 +268,4 @@ class Bytes: AllStatic {
#include OS_CPU_HEADER_INLINE(bytes)
#endif // CPU_PPC_VM_BYTES_PPC_HPP
#endif // CPU_PPC_BYTES_PPC_HPP

8
src/hotspot/cpu/ppc/c1_Defs_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_C1_DEFS_PPC_HPP
#define CPU_PPC_VM_C1_DEFS_PPC_HPP
#ifndef CPU_PPC_C1_DEFS_PPC_HPP
#define CPU_PPC_C1_DEFS_PPC_HPP
// Native word offsets from memory address.
enum {
@ -73,4 +73,4 @@ enum {
pd_float_saved_as_double = true
};
#endif // CPU_PPC_VM_C1_DEFS_PPC_HPP
#endif // CPU_PPC_C1_DEFS_PPC_HPP

8
src/hotspot/cpu/ppc/c1_FpuStackSim_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,10 +23,10 @@
*
*/
#ifndef CPU_PPC_VM_C1_FPUSTACKSIM_PPC_HPP
#define CPU_PPC_VM_C1_FPUSTACKSIM_PPC_HPP
#ifndef CPU_PPC_C1_FPUSTACKSIM_PPC_HPP
#define CPU_PPC_C1_FPUSTACKSIM_PPC_HPP
// No FPU stack on PPC.
class FpuStackSim;
#endif // CPU_PPC_VM_C1_FPUSTACKSIM_PPC_HPP
#endif // CPU_PPC_C1_FPUSTACKSIM_PPC_HPP

8
src/hotspot/cpu/ppc/c1_FrameMap_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_C1_FRAMEMAP_PPC_HPP
#define CPU_PPC_VM_C1_FRAMEMAP_PPC_HPP
#ifndef CPU_PPC_C1_FRAMEMAP_PPC_HPP
#define CPU_PPC_C1_FRAMEMAP_PPC_HPP
public:
@ -199,4 +199,4 @@
// R29: global TOC
static bool reg_needs_save(Register r) { return r != R0 && r != R1 && r != R13 && r != R16 && r != R29; }
#endif // CPU_PPC_VM_C1_FRAMEMAP_PPC_HPP
#endif // CPU_PPC_C1_FRAMEMAP_PPC_HPP

8
src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_C1_LIRASSEMBLER_PPC_HPP
#define CPU_PPC_VM_C1_LIRASSEMBLER_PPC_HPP
#ifndef CPU_PPC_C1_LIRASSEMBLER_PPC_HPP
#define CPU_PPC_C1_LIRASSEMBLER_PPC_HPP
private:
@ -77,4 +77,4 @@ enum {
}
}
#endif // CPU_PPC_VM_C1_LIRASSEMBLER_PPC_HPP
#endif // CPU_PPC_C1_LIRASSEMBLER_PPC_HPP

8
src/hotspot/cpu/ppc/c1_LinearScan_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2005, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2005, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_C1_LINEARSCAN_PPC_HPP
#define CPU_PPC_VM_C1_LINEARSCAN_PPC_HPP
#ifndef CPU_PPC_C1_LINEARSCAN_PPC_HPP
#define CPU_PPC_C1_LINEARSCAN_PPC_HPP
inline bool LinearScan::is_processed_reg_num(int reg_num) {
assert(FrameMap::R0_opr->cpu_regnr() == FrameMap::last_cpu_reg() + 1, "wrong assumption below");
@ -70,4 +70,4 @@ inline bool LinearScanWalker::pd_init_regs_for_alloc(Interval* cur) {
return false;
}
#endif // CPU_PPC_VM_C1_LINEARSCAN_PPC_HPP
#endif // CPU_PPC_C1_LINEARSCAN_PPC_HPP

8
src/hotspot/cpu/ppc/c1_MacroAssembler_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_C1_MACROASSEMBLER_PPC_HPP
#define CPU_PPC_VM_C1_MACROASSEMBLER_PPC_HPP
#ifndef CPU_PPC_C1_MACROASSEMBLER_PPC_HPP
#define CPU_PPC_C1_MACROASSEMBLER_PPC_HPP
void pd_init() { /* nothing to do */ }
@ -90,4 +90,4 @@
address call_c_with_frame_resize(address dest, int frame_resize);
#endif // CPU_PPC_VM_C1_MACROASSEMBLER_PPC_HPP
#endif // CPU_PPC_C1_MACROASSEMBLER_PPC_HPP

8
src/hotspot/cpu/ppc/c1_globals_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2018 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_C1_GLOBALS_PPC_HPP
#define CPU_PPC_VM_C1_GLOBALS_PPC_HPP
#ifndef CPU_PPC_C1_GLOBALS_PPC_HPP
#define CPU_PPC_C1_GLOBALS_PPC_HPP
#include "utilities/globalDefinitions.hpp"
#include "utilities/macros.hpp"
@ -65,4 +65,4 @@ define_pd_global(bool, OptimizeSinglePrecision, false);
define_pd_global(bool, CSEArrayLength, true);
define_pd_global(bool, TwoOperandLIRForm, false);
#endif // CPU_PPC_VM_C1_GLOBALS_PPC_HPP
#endif // CPU_PPC_C1_GLOBALS_PPC_HPP

8
src/hotspot/cpu/ppc/c2_globals_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2018 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_C2_GLOBALS_PPC_HPP
#define CPU_PPC_VM_C2_GLOBALS_PPC_HPP
#ifndef CPU_PPC_C2_GLOBALS_PPC_HPP
#define CPU_PPC_C2_GLOBALS_PPC_HPP
#include "utilities/globalDefinitions.hpp"
#include "utilities/macros.hpp"
@ -101,4 +101,4 @@ define_pd_global(size_t, MetaspaceSize, ScaleForWordSize(16*M))
// Ergonomics related flags
define_pd_global(bool, NeverActAsServerClassMachine, false);
#endif // CPU_PPC_VM_C2_GLOBALS_PPC_HPP
#endif // CPU_PPC_C2_GLOBALS_PPC_HPP

8
src/hotspot/cpu/ppc/codeBuffer_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2013 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_CODEBUFFER_PPC_HPP
#define CPU_PPC_VM_CODEBUFFER_PPC_HPP
#ifndef CPU_PPC_CODEBUFFER_PPC_HPP
#define CPU_PPC_CODEBUFFER_PPC_HPP
private:
void pd_initialize() {}
@ -32,4 +32,4 @@ private:
public:
void flush_bundle(bool start_new_bundle) {}
#endif // CPU_PPC_VM_CODEBUFFER_PPC_HPP
#endif // CPU_PPC_CODEBUFFER_PPC_HPP

8
src/hotspot/cpu/ppc/copy_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2013 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_COPY_PPC_HPP
#define CPU_PPC_VM_COPY_PPC_HPP
#ifndef CPU_PPC_COPY_PPC_HPP
#define CPU_PPC_COPY_PPC_HPP
#ifndef PPC64
#error "copy currently only implemented for PPC64"
@ -168,4 +168,4 @@ static void pd_zero_to_bytes(void* to, size_t count) {
(void)memset(to, 0, count);
}
#endif // CPU_PPC_VM_COPY_PPC_HPP
#endif // CPU_PPC_COPY_PPC_HPP

8
src/hotspot/cpu/ppc/depChecker_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2013 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,9 +23,9 @@
*
*/
#ifndef CPU_PPC_VM_DEPCHECKER_PPC_HPP
#define CPU_PPC_VM_DEPCHECKER_PPC_HPP
#ifndef CPU_PPC_DEPCHECKER_PPC_HPP
#define CPU_PPC_DEPCHECKER_PPC_HPP
// Nothing to do on ppc64
#endif // CPU_PPC_VM_DEPCHECKER_PPC_HPP
#endif // CPU_PPC_DEPCHECKER_PPC_HPP

8
src/hotspot/cpu/ppc/disassembler_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2013 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_DISASSEMBLER_PPC_HPP
#define CPU_PPC_VM_DISASSEMBLER_PPC_HPP
#ifndef CPU_PPC_DISASSEMBLER_PPC_HPP
#define CPU_PPC_DISASSEMBLER_PPC_HPP
static int pd_instruction_alignment() {
return sizeof(int);
@ -34,4 +34,4 @@
return "ppc64";
}
#endif // CPU_PPC_VM_DISASSEMBLER_PPC_HPP
#endif // CPU_PPC_DISASSEMBLER_PPC_HPP

8
src/hotspot/cpu/ppc/frame_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_FRAME_PPC_HPP
#define CPU_PPC_VM_FRAME_PPC_HPP
#ifndef CPU_PPC_FRAME_PPC_HPP
#define CPU_PPC_FRAME_PPC_HPP
#include "runtime/synchronizer.hpp"
@ -427,4 +427,4 @@
static jint interpreter_frame_expression_stack_direction() { return -1; }
#endif // CPU_PPC_VM_FRAME_PPC_HPP
#endif // CPU_PPC_FRAME_PPC_HPP

8
src/hotspot/cpu/ppc/frame_ppc.inline.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2015 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_FRAME_PPC_INLINE_HPP
#define CPU_PPC_VM_FRAME_PPC_INLINE_HPP
#ifndef CPU_PPC_FRAME_PPC_INLINE_HPP
#define CPU_PPC_FRAME_PPC_INLINE_HPP
#include "code/codeCache.hpp"
#include "code/vmreg.inline.hpp"
@ -220,4 +220,4 @@ inline void frame::set_saved_oop_result(RegisterMap* map, oop obj) {
*((oop*)map->location(R3->as_VMReg())) = obj;
}
#endif // CPU_PPC_VM_FRAME_PPC_INLINE_HPP
#endif // CPU_PPC_FRAME_PPC_INLINE_HPP

8
src/hotspot/cpu/ppc/globalDefinitions_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 1999, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1999, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2016 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_GLOBALDEFINITIONS_PPC_HPP
#define CPU_PPC_VM_GLOBALDEFINITIONS_PPC_HPP
#ifndef CPU_PPC_GLOBALDEFINITIONS_PPC_HPP
#define CPU_PPC_GLOBALDEFINITIONS_PPC_HPP
#ifdef CC_INTERP
#error "CC_INTERP is no longer supported. Removed in change 8145117."
@ -60,4 +60,4 @@ const bool CCallingConventionRequiresIntsAsLongs = true;
// Define the condition to use this -XX flag.
#define USE_POLL_BIT_ONLY UseSIGTRAP
#endif // CPU_PPC_VM_GLOBALDEFINITIONS_PPC_HPP
#endif // CPU_PPC_GLOBALDEFINITIONS_PPC_HPP

8
src/hotspot/cpu/ppc/globals_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2018, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2018 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_GLOBALS_PPC_HPP
#define CPU_PPC_VM_GLOBALS_PPC_HPP
#ifndef CPU_PPC_GLOBALS_PPC_HPP
#define CPU_PPC_GLOBALS_PPC_HPP
#include "utilities/globalDefinitions.hpp"
#include "utilities/macros.hpp"
@ -207,4 +207,4 @@ define_pd_global(bool, ThreadLocalHandshakes, true);
experimental(bool, UseRTMXendForLockBusy, true, \
"Use RTM Xend instead of Xabort when lock busy") \
#endif // CPU_PPC_VM_GLOBALS_PPC_HPP
#endif // CPU_PPC_GLOBALS_PPC_HPP

8
src/hotspot/cpu/ppc/icache_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2013 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_ICACHE_PPC_HPP
#define CPU_PPC_VM_ICACHE_PPC_HPP
#ifndef CPU_PPC_ICACHE_PPC_HPP
#define CPU_PPC_ICACHE_PPC_HPP
// Interface for updating the instruction cache. Whenever the VM modifies
// code, part of the processor instruction cache potentially has to be flushed.
@ -49,4 +49,4 @@ class ICache : public AbstractICache {
}
};
#endif // CPU_PPC_VM_ICACHE_PPC_HPP
#endif // CPU_PPC_ICACHE_PPC_HPP

8
src/hotspot/cpu/ppc/interp_masm_ppc.hpp
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2002, 2017, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2012, 2017 SAP SE. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
@ -23,8 +23,8 @@
*
*/
#ifndef CPU_PPC_VM_INTERP_MASM_PPC_HPP
#define CPU_PPC_VM_INTERP_MASM_PPC_HPP
#ifndef CPU_PPC_INTERP_MASM_PPC_HPP
#define CPU_PPC_INTERP_MASM_PPC_HPP
#include "asm/macroAssembler.hpp"
#include "interpreter/invocationCounter.hpp"
@ -266,4 +266,4 @@ class InterpreterMacroAssembler: public MacroAssembler {
NotifyMethodExitMode mode, bool check_exceptions);
};
#endif // CPU_PPC_VM_INTERP_MASM_PPC_HPP
#endif // CPU_PPC_INTERP_MASM_PPC_HPP

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