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8076373: In 32-bit VM interpreter and compiled code process NaN values differently

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Change interpreter to use XMM registers on x86_32 if they are available. Add stubs for methods transforming from/to int/long float/double.

Reviewed-by: kvn, mcberg
This commit is contained in:
Zoltan Majo 2015-08-19 08:55:18 +02:00
parent df82d96834
commit 1e55e60cb1
14 changed files with 733 additions and 348 deletions
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14
hotspot/src/cpu/x86/vm/assembler_x86.cpp
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@ -1674,6 +1674,13 @@ void Assembler::cvtsi2ssl(XMMRegister dst, Address src) {
emit_simd_arith(0x2A, dst, src, VEX_SIMD_F3, true);
}
void Assembler::cvtsi2ssq(XMMRegister dst, Register src) {
NOT_LP64(assert(VM_Version::supports_sse(), ""));
int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F3, true);
emit_int8(0x2A);
emit_int8((unsigned char)(0xC0 | encode));
}
void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
NOT_LP64(assert(VM_Version::supports_sse2(), ""));
emit_simd_arith(0x5A, dst, src, VEX_SIMD_F3);
@ -6604,13 +6611,6 @@ void Assembler::cvtsi2sdq(XMMRegister dst, Address src) {
emit_operand(dst, src);
}
void Assembler::cvtsi2ssq(XMMRegister dst, Register src) {
NOT_LP64(assert(VM_Version::supports_sse(), ""));
int encode = simd_prefix_and_encode_q(dst, dst, src, VEX_SIMD_F3, true);
emit_int8(0x2A);
emit_int8((unsigned char)(0xC0 | encode));
}
void Assembler::cvtsi2ssq(XMMRegister dst, Address src) {
NOT_LP64(assert(VM_Version::supports_sse(), ""));
if (VM_Version::supports_evex()) {