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6808665: Use486InstrsOnly aborts 32-bit VM
The code supporting -XX:+/-Use486InstrsOnly was removed. Reviewed-by: dholmes, thartmann, vlivanov
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parent
a1bb5b8456
commit
1f2a9c1407
2 changed files with 12 additions and 17 deletions
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@ -175,9 +175,6 @@ define_pd_global(bool, PreserveFramePointer, false);
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"Use RTM Xend instead of Xabort when lock busy") \
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"Use RTM Xend instead of Xabort when lock busy") \
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\
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\
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/* assembler */ \
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/* assembler */ \
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product(bool, Use486InstrsOnly, false, \
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"Use 80486 Compliant instruction subset") \
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\
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product(bool, UseCountLeadingZerosInstruction, false, \
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product(bool, UseCountLeadingZerosInstruction, false, \
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"Use count leading zeros instruction") \
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"Use count leading zeros instruction") \
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\
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\
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@ -473,7 +473,6 @@ void VM_Version::get_processor_features() {
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// i486 internal cache is both I&D and has a 16-byte line size
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// i486 internal cache is both I&D and has a 16-byte line size
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_L1_data_cache_line_size = 16;
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_L1_data_cache_line_size = 16;
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if (!Use486InstrsOnly) {
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// Get raw processor info
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// Get raw processor info
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get_cpu_info_stub(&_cpuid_info);
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get_cpu_info_stub(&_cpuid_info);
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@ -490,7 +489,6 @@ void VM_Version::get_processor_features() {
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_logical_processors_per_package = logical_processor_count();
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_logical_processors_per_package = logical_processor_count();
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_L1_data_cache_line_size = L1_line_size();
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_L1_data_cache_line_size = L1_line_size();
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}
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}
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}
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_supports_cx8 = supports_cmpxchg8();
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_supports_cx8 = supports_cmpxchg8();
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// xchg and xadd instructions
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// xchg and xadd instructions
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