6808665: Use486InstrsOnly aborts 32-bit VM

The code supporting -XX:+/-Use486InstrsOnly was removed.

Reviewed-by: dholmes, thartmann, vlivanov
This commit is contained in:
Jamsheed Mohammed 2015-12-09 11:06:39 +01:00 committed by Tobias Hartmann
parent a1bb5b8456
commit 1f2a9c1407
2 changed files with 12 additions and 17 deletions

View file

@ -175,9 +175,6 @@ define_pd_global(bool, PreserveFramePointer, false);
"Use RTM Xend instead of Xabort when lock busy") \ "Use RTM Xend instead of Xabort when lock busy") \
\ \
/* assembler */ \ /* assembler */ \
product(bool, Use486InstrsOnly, false, \
"Use 80486 Compliant instruction subset") \
\
product(bool, UseCountLeadingZerosInstruction, false, \ product(bool, UseCountLeadingZerosInstruction, false, \
"Use count leading zeros instruction") \ "Use count leading zeros instruction") \
\ \

View file

@ -473,7 +473,6 @@ void VM_Version::get_processor_features() {
// i486 internal cache is both I&D and has a 16-byte line size // i486 internal cache is both I&D and has a 16-byte line size
_L1_data_cache_line_size = 16; _L1_data_cache_line_size = 16;
if (!Use486InstrsOnly) {
// Get raw processor info // Get raw processor info
get_cpu_info_stub(&_cpuid_info); get_cpu_info_stub(&_cpuid_info);
@ -490,7 +489,6 @@ void VM_Version::get_processor_features() {
_logical_processors_per_package = logical_processor_count(); _logical_processors_per_package = logical_processor_count();
_L1_data_cache_line_size = L1_line_size(); _L1_data_cache_line_size = L1_line_size();
} }
}
_supports_cx8 = supports_cmpxchg8(); _supports_cx8 = supports_cmpxchg8();
// xchg and xadd instructions // xchg and xadd instructions