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5108146: Merge i486 and amd64 cpu directories
6459804: Want client (c1) compiler for x86_64 (amd64) for faster start-up Reviewed-by: kvn
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parent
2697216f3a
commit
26c780da72
85 changed files with 18308 additions and 15496 deletions
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@ -135,6 +135,13 @@ class LIR_Const: public LIR_OprPtr {
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return as_jint_hi();
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}
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}
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jlong as_jlong_bits() const {
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if (type() == T_DOUBLE) {
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return jlong_cast(_value.get_jdouble());
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} else {
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return as_jlong();
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}
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}
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virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
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@ -302,6 +309,7 @@ class LIR_OprDesc: public CompilationResourceObj {
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default:
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ShouldNotReachHere();
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return single_size;
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}
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}
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@ -417,12 +425,12 @@ class LIR_OprDesc: public CompilationResourceObj {
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return as_register();
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}
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#ifdef IA32
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#ifdef X86
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XMMRegister as_xmm_float_reg() const;
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XMMRegister as_xmm_double_reg() const;
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// for compatibility with RInfo
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int fpu () const { return lo_reg_half(); }
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#endif
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#endif // X86
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#ifdef SPARC
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FloatRegister as_float_reg () const;
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@ -503,14 +511,14 @@ class LIR_Address: public LIR_OprPtr {
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, _type(type)
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, _disp(disp) { verify(); }
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#ifdef IA32
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#ifdef X86
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LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, int disp, BasicType type):
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_base(base)
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, _index(index)
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, _scale(scale)
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, _type(type)
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, _disp(disp) { verify(); }
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#endif
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#endif // X86
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LIR_Opr base() const { return _base; }
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LIR_Opr index() const { return _index; }
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@ -535,31 +543,93 @@ class LIR_OprFact: public AllStatic {
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static LIR_Opr illegalOpr;
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static LIR_Opr single_cpu(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
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static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
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static LIR_Opr double_cpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::long_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
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static LIR_Opr single_cpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
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static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
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static LIR_Opr double_cpu(int reg1, int reg2) {
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LP64_ONLY(assert(reg1 == reg2, "must be identical"));
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return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
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(reg2 << LIR_OprDesc::reg2_shift) |
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LIR_OprDesc::long_type |
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LIR_OprDesc::cpu_register |
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LIR_OprDesc::double_size);
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}
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static LIR_Opr single_fpu(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::fpu_register | LIR_OprDesc::single_size); }
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static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
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LIR_OprDesc::float_type |
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LIR_OprDesc::fpu_register |
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LIR_OprDesc::single_size); }
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#ifdef SPARC
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static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
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#endif
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#ifdef IA32
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static LIR_Opr double_fpu(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | (reg << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
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static LIR_Opr single_xmm(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::fpu_register | LIR_OprDesc::single_size | LIR_OprDesc::is_xmm_mask); }
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static LIR_Opr double_xmm(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | (reg << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size | LIR_OprDesc::is_xmm_mask); }
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static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
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(reg2 << LIR_OprDesc::reg2_shift) |
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LIR_OprDesc::double_type |
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LIR_OprDesc::fpu_register |
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LIR_OprDesc::double_size); }
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#endif
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#ifdef X86
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static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
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(reg << LIR_OprDesc::reg2_shift) |
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LIR_OprDesc::double_type |
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LIR_OprDesc::fpu_register |
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LIR_OprDesc::double_size); }
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static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
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LIR_OprDesc::float_type |
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LIR_OprDesc::fpu_register |
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LIR_OprDesc::single_size |
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LIR_OprDesc::is_xmm_mask); }
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static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
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(reg << LIR_OprDesc::reg2_shift) |
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LIR_OprDesc::double_type |
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LIR_OprDesc::fpu_register |
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LIR_OprDesc::double_size |
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LIR_OprDesc::is_xmm_mask); }
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#endif // X86
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static LIR_Opr virtual_register(int index, BasicType type) {
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LIR_Opr res;
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switch (type) {
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case T_OBJECT: // fall through
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case T_ARRAY: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size | LIR_OprDesc::virtual_mask); break;
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case T_INT: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size | LIR_OprDesc::virtual_mask); break;
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case T_LONG: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::long_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size | LIR_OprDesc::virtual_mask); break;
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case T_FLOAT: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::float_type | LIR_OprDesc::fpu_register | LIR_OprDesc::single_size | LIR_OprDesc::virtual_mask); break;
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case T_DOUBLE: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size | LIR_OprDesc::virtual_mask); break;
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case T_ARRAY:
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res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::object_type |
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LIR_OprDesc::cpu_register |
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LIR_OprDesc::single_size |
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LIR_OprDesc::virtual_mask);
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break;
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case T_INT:
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res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::int_type |
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LIR_OprDesc::cpu_register |
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LIR_OprDesc::single_size |
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LIR_OprDesc::virtual_mask);
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break;
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case T_LONG:
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res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::long_type |
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LIR_OprDesc::cpu_register |
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LIR_OprDesc::double_size |
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LIR_OprDesc::virtual_mask);
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break;
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case T_FLOAT:
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res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::float_type |
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LIR_OprDesc::fpu_register |
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LIR_OprDesc::single_size |
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LIR_OprDesc::virtual_mask);
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break;
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case
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T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::double_type |
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LIR_OprDesc::fpu_register |
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LIR_OprDesc::double_size |
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LIR_OprDesc::virtual_mask);
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break;
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default: ShouldNotReachHere(); res = illegalOpr;
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}
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// old-style calculation; check if old and new method are equal
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LIR_OprDesc::OprType t = as_OprType(type);
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LIR_Opr old_res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | t |
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((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
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LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
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((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
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LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
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assert(res == old_res, "old and new method not equal");
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#endif
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@ -588,11 +658,39 @@ class LIR_OprFact: public AllStatic {
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LIR_Opr res;
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switch (type) {
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case T_OBJECT: // fall through
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case T_ARRAY: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::object_type | LIR_OprDesc::stack_value | LIR_OprDesc::single_size); break;
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case T_INT: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::int_type | LIR_OprDesc::stack_value | LIR_OprDesc::single_size); break;
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case T_LONG: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::long_type | LIR_OprDesc::stack_value | LIR_OprDesc::double_size); break;
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case T_FLOAT: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::float_type | LIR_OprDesc::stack_value | LIR_OprDesc::single_size); break;
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case T_DOUBLE: res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::double_type | LIR_OprDesc::stack_value | LIR_OprDesc::double_size); break;
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case T_ARRAY:
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res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::object_type |
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LIR_OprDesc::stack_value |
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LIR_OprDesc::single_size);
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break;
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case T_INT:
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res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::int_type |
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LIR_OprDesc::stack_value |
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LIR_OprDesc::single_size);
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break;
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case T_LONG:
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res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::long_type |
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LIR_OprDesc::stack_value |
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LIR_OprDesc::double_size);
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break;
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case T_FLOAT:
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res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::float_type |
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LIR_OprDesc::stack_value |
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LIR_OprDesc::single_size);
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break;
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case T_DOUBLE:
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res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::double_type |
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LIR_OprDesc::stack_value |
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LIR_OprDesc::double_size);
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break;
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default: ShouldNotReachHere(); res = illegalOpr;
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}
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assert(index >= 0, "index must be positive");
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assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
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LIR_Opr old_res = (LIR_Opr)((index << LIR_OprDesc::data_shift) | LIR_OprDesc::stack_value | as_OprType(type) | LIR_OprDesc::size_for(type));
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LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
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LIR_OprDesc::stack_value |
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as_OprType(type) |
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LIR_OprDesc::size_for(type));
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assert(res == old_res, "old and new method not equal");
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#endif
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