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6991512: G1 barriers fail with 64bit C1

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Fix compare-and-swap intrinsic problem with G1 post-barriers and issue with branch ranges in G1 stubs on sparc

Reviewed-by: never, kvn
This commit is contained in:
Igor Veresov 2010-10-12 23:51:20 -07:00
parent e870866699
commit 28a13e88e7
6 changed files with 23 additions and 8 deletions
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2
hotspot/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp
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@ -1941,8 +1941,6 @@ void LIR_Assembler::emit_compare_and_swap(LIR_OpCompareAndSwap* op) {
__ cmpxchgptr(newval, Address(addr, 0));
} else if (op->code() == lir_cas_int) {
__ cmpxchgl(newval, Address(addr, 0));
} else {
LP64_ONLY(__ cmpxchgq(newval, Address(addr, 0)));
}
#ifdef _LP64
} else if (op->code() == lir_cas_long) {