8240248: Extend superword reduction optimizations for x86

Add support for and, or, xor reduction

Co-authored-by: Shravya Rukmannagari <shravya.rukmannagari@intel.com>
Reviewed-by: vlivanov, thartmann
This commit is contained in:
Sandhya Viswanathan 2020-03-23 10:26:40 -07:00
parent 75a8b7fa83
commit 398ce2948c
13 changed files with 1089 additions and 702 deletions

View file

@ -1820,8 +1820,11 @@ typedef HashtableEntry<InstanceKlass*, mtClass> KlassHashtableEntry;
declare_c2_type(URShiftVINode, VectorNode) \
declare_c2_type(URShiftVLNode, VectorNode) \
declare_c2_type(AndVNode, VectorNode) \
declare_c2_type(AndReductionVNode, ReductionNode) \
declare_c2_type(OrVNode, VectorNode) \
declare_c2_type(OrReductionVNode, ReductionNode) \
declare_c2_type(XorVNode, VectorNode) \
declare_c2_type(XorReductionVNode, ReductionNode) \
declare_c2_type(MaxVNode, VectorNode) \
declare_c2_type(MinVNode, VectorNode) \
declare_c2_type(MaxReductionVNode, ReductionNode) \