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6796746: rename LoadC (char) opcode class to LoadUS (unsigned short)
Renaming LoadC to LoadUS would round up the planned introduction of LoadUB and LoadUI. Reviewed-by: phh, kvn
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parent
ae8aa00398
commit
3b8452da93
15 changed files with 49 additions and 49 deletions
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@ -442,7 +442,7 @@ Node *AndINode::Identity( PhaseTransform *phase ) {
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return load;
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}
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uint lop = load->Opcode();
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if( lop == Op_LoadC &&
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if( lop == Op_LoadUS &&
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con == 0x0000FFFF ) // Already zero-extended
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return load;
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// Masking off the high bits of a unsigned-shift-right is not
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@ -470,19 +470,19 @@ Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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uint lop = load->Opcode();
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// Masking bits off of a Character? Hi bits are already zero.
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if( lop == Op_LoadC &&
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if( lop == Op_LoadUS &&
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(mask & 0xFFFF0000) ) // Can we make a smaller mask?
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return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF));
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// Masking bits off of a Short? Loading a Character does some masking
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if( lop == Op_LoadS &&
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(mask & 0xFFFF0000) == 0 ) {
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Node *ldc = new (phase->C, 3) LoadCNode(load->in(MemNode::Control),
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Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control),
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load->in(MemNode::Memory),
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load->in(MemNode::Address),
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load->adr_type());
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ldc = phase->transform(ldc);
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return new (phase->C, 3) AndINode(ldc,phase->intcon(mask&0xFFFF));
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ldus = phase->transform(ldus);
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return new (phase->C, 3) AndINode(ldus, phase->intcon(mask&0xFFFF));
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}
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// Masking sign bits off of a Byte? Let the matcher use an unsigned load
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@ -913,7 +913,7 @@ Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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set_req(2, phase->intcon(0));
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return this;
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}
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else if( ld->Opcode() == Op_LoadC )
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else if( ld->Opcode() == Op_LoadUS )
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// Replace zero-extension-load with sign-extension-load
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return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control),
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ld->in(MemNode::Memory),
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