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6796746: rename LoadC (char) opcode class to LoadUS (unsigned short)

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Renaming LoadC to LoadUS would round up the planned introduction of LoadUB and LoadUI.

Reviewed-by: phh, kvn
This commit is contained in:
Christian Thalinger 2009-01-26 16:22:12 +01:00
parent ae8aa00398
commit 3b8452da93
15 changed files with 49 additions and 49 deletions
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14
hotspot/src/cpu/sparc/vm/sparc.ad
View file

@ -762,7 +762,7 @@ void emit_form3_mem_reg(CodeBuffer &cbuf, const MachNode* n, int primary, int te
case Assembler::stdf_op3: st_op = Op_StoreD; break; case Assembler::stdf_op3: st_op = Op_StoreD; break;
case Assembler::ldsb_op3: ld_op = Op_LoadB; break; case Assembler::ldsb_op3: ld_op = Op_LoadB; break;
case Assembler::lduh_op3: ld_op = Op_LoadC; break; case Assembler::lduh_op3: ld_op = Op_LoadUS; break;
case Assembler::ldsh_op3: ld_op = Op_LoadS; break; case Assembler::ldsh_op3: ld_op = Op_LoadS; break;
case Assembler::ldx_op3: // may become LoadP or stay LoadI case Assembler::ldx_op3: // may become LoadP or stay LoadI
case Assembler::ldsw_op3: // may become LoadP or stay LoadI case Assembler::ldsw_op3: // may become LoadP or stay LoadI
@ -5316,9 +5316,9 @@ instruct loadUBL(iRegL dst, memory mem, immL_FF bytemask) %{
ins_pipe(iload_mask_mem); ins_pipe(iload_mask_mem);
%} %}
// Load Char (16bit UNsigned) into a Long Register // Load Unsigned Short/Char (16bit UNsigned) into a Long Register
instruct loadUCL(iRegL dst, memory mem, immL_FFFF bytemask) %{ instruct loadUS2L(iRegL dst, memory mem, immL_FFFF bytemask) %{
match(Set dst (AndL (ConvI2L (LoadC mem)) bytemask)); match(Set dst (AndL (ConvI2L (LoadUS mem)) bytemask));
ins_cost(MEMORY_REF_COST); ins_cost(MEMORY_REF_COST);
size(4); size(4);
@ -5328,9 +5328,9 @@ instruct loadUCL(iRegL dst, memory mem, immL_FFFF bytemask) %{
ins_pipe(iload_mask_mem); ins_pipe(iload_mask_mem);
%} %}
// Load Char (16bit unsigned) // Load Unsigned Short/Char (16bit unsigned)
instruct loadC(iRegI dst, memory mem) %{ instruct loadUS(iRegI dst, memory mem) %{
match(Set dst (LoadC mem)); match(Set dst (LoadUS mem));
ins_cost(MEMORY_REF_COST); ins_cost(MEMORY_REF_COST);
size(4); size(4);

6
hotspot/src/cpu/x86/vm/x86_32.ad
View file

@ -6413,9 +6413,9 @@ instruct loadUB(xRegI dst, memory mem, immI_255 bytemask) %{
ins_pipe( ialu_reg_mem ); ins_pipe( ialu_reg_mem );
%} %}
// Load Char (16bit unsigned) // Load Unsigned Short/Char (16bit unsigned)
instruct loadC(eRegI dst, memory mem) %{ instruct loadUS(eRegI dst, memory mem) %{
match(Set dst (LoadC mem)); match(Set dst (LoadUS mem));
ins_cost(125); ins_cost(125);
format %{ "MOVZX $dst,$mem" %} format %{ "MOVZX $dst,$mem" %}

16
hotspot/src/cpu/x86/vm/x86_64.ad
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@ -6096,25 +6096,25 @@ instruct loadS(rRegI dst, memory mem)
// ins_pipe(ialu_reg_mem); // ins_pipe(ialu_reg_mem);
// %} // %}
// Load Char (16 bit UNsigned) // Load Unsigned Short/Char (16 bit UNsigned)
instruct loadC(rRegI dst, memory mem) instruct loadUS(rRegI dst, memory mem)
%{ %{
match(Set dst (LoadC mem)); match(Set dst (LoadUS mem));
ins_cost(125); ins_cost(125);
format %{ "movzwl $dst, $mem\t# char" %} format %{ "movzwl $dst, $mem\t# ushort/char" %}
opcode(0x0F, 0xB7); opcode(0x0F, 0xB7);
ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem));
ins_pipe(ialu_reg_mem); ins_pipe(ialu_reg_mem);
%} %}
// Load Char (16 bit UNsigned) into long // Load Unsigned Short/Char (16 bit UNsigned) into long
// instruct loadC2L(rRegL dst, memory mem) // instruct loadUS2L(rRegL dst, memory mem)
// %{ // %{
// match(Set dst (ConvI2L (LoadC mem))); // match(Set dst (ConvI2L (LoadUS mem)));
// ins_cost(125); // ins_cost(125);
// format %{ "movzwl $dst, $mem\t# char -> long" %} // format %{ "movzwl $dst, $mem\t# ushort/char -> long" %}
// opcode(0x0F, 0xB7); // opcode(0x0F, 0xB7);
// ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem)); // ins_encode(REX_reg_mem(dst, mem), OpcP, OpcS, reg_mem(dst, mem));
// ins_pipe(ialu_reg_mem); // ins_pipe(ialu_reg_mem);

2
hotspot/src/share/vm/adlc/forms.cpp
View file

@ -248,7 +248,7 @@ Form::DataType Form::ideal_to_Reg_type(const char *name) const {
// True if 'opType', an ideal name, loads or stores. // True if 'opType', an ideal name, loads or stores.
Form::DataType Form::is_load_from_memory(const char *opType) const { Form::DataType Form::is_load_from_memory(const char *opType) const {
if( strcmp(opType,"LoadB")==0 ) return Form::idealB; if( strcmp(opType,"LoadB")==0 ) return Form::idealB;
if( strcmp(opType,"LoadC")==0 ) return Form::idealC; if( strcmp(opType,"LoadUS")==0 ) return Form::idealC;
if( strcmp(opType,"LoadD")==0 ) return Form::idealD; if( strcmp(opType,"LoadD")==0 ) return Form::idealD;
if( strcmp(opType,"LoadD_unaligned")==0 ) return Form::idealD; if( strcmp(opType,"LoadD_unaligned")==0 ) return Form::idealD;
if( strcmp(opType,"LoadF")==0 ) return Form::idealF; if( strcmp(opType,"LoadF")==0 ) return Form::idealF;

2
hotspot/src/share/vm/adlc/formssel.cpp
View file

@ -3314,7 +3314,7 @@ int MatchNode::needs_ideal_memory_edge(FormDict &globals) const {
"StoreI","StoreL","StoreP","StoreN","StoreD","StoreF" , "StoreI","StoreL","StoreP","StoreN","StoreD","StoreF" ,
"StoreB","StoreC","Store" ,"StoreFP", "StoreB","StoreC","Store" ,"StoreFP",
"LoadI" ,"LoadL", "LoadP" ,"LoadN", "LoadD" ,"LoadF" , "LoadI" ,"LoadL", "LoadP" ,"LoadN", "LoadD" ,"LoadF" ,
"LoadB" ,"LoadC" ,"LoadS" ,"Load" , "LoadB" ,"LoadUS" ,"LoadS" ,"Load" ,
"Store4I","Store2I","Store2L","Store2D","Store4F","Store2F","Store16B", "Store4I","Store2I","Store2L","Store2D","Store4F","Store2F","Store16B",
"Store8B","Store4B","Store8C","Store4C","Store2C", "Store8B","Store4B","Store8C","Store4C","Store2C",
"Load4I" ,"Load2I" ,"Load2L" ,"Load2D" ,"Load4F" ,"Load2F" ,"Load16B" , "Load4I" ,"Load2I" ,"Load2L" ,"Load2D" ,"Load4F" ,"Load2F" ,"Load16B" ,

2
hotspot/src/share/vm/opto/classes.hpp
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@ -129,7 +129,7 @@ macro(JumpProj)
macro(LShiftI) macro(LShiftI)
macro(LShiftL) macro(LShiftL)
macro(LoadB) macro(LoadB)
macro(LoadC) macro(LoadUS)
macro(LoadD) macro(LoadD)
macro(LoadD_unaligned) macro(LoadD_unaligned)
macro(LoadF) macro(LoadF)

2
hotspot/src/share/vm/opto/compile.cpp
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@ -2005,7 +2005,7 @@ static void final_graph_reshaping_impl( Node *n, Final_Reshape_Counts &fpu ) {
case Op_StoreP: case Op_StoreP:
case Op_StoreN: case Op_StoreN:
case Op_LoadB: case Op_LoadB:
case Op_LoadC: case Op_LoadUS:
case Op_LoadI: case Op_LoadI:
case Op_LoadKlass: case Op_LoadKlass:
case Op_LoadNKlass: case Op_LoadNKlass:

2
hotspot/src/share/vm/opto/lcm.cpp
View file

@ -107,7 +107,7 @@ void Block::implicit_null_check(PhaseCFG *cfg, Node *proj, Node *val, int allowe
was_store = false; was_store = false;
switch( mach->ideal_Opcode() ) { switch( mach->ideal_Opcode() ) {
case Op_LoadB: case Op_LoadB:
case Op_LoadC: case Op_LoadUS:
case Op_LoadD: case Op_LoadD:
case Op_LoadF: case Op_LoadF:
case Op_LoadI: case Op_LoadI:

2
hotspot/src/share/vm/opto/loopnode.cpp
View file

@ -2654,7 +2654,7 @@ void PhaseIdealLoop::build_loop_late_post( Node *n, const PhaseIdealLoop *verify
case Op_ModF: case Op_ModF:
case Op_ModD: case Op_ModD:
case Op_LoadB: // Same with Loads; they can sink case Op_LoadB: // Same with Loads; they can sink
case Op_LoadC: // during loop optimizations. case Op_LoadUS: // during loop optimizations.
case Op_LoadD: case Op_LoadD:
case Op_LoadF: case Op_LoadF:
case Op_LoadI: case Op_LoadI:

2
hotspot/src/share/vm/opto/matcher.cpp
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@ -1824,7 +1824,7 @@ void Matcher::find_shared( Node *n ) {
mem_op = true; mem_op = true;
break; break;
case Op_LoadB: case Op_LoadB:
case Op_LoadC: case Op_LoadUS:
case Op_LoadD: case Op_LoadD:
case Op_LoadF: case Op_LoadF:
case Op_LoadI: case Op_LoadI:

22
hotspot/src/share/vm/opto/memnode.cpp
View file

@ -779,14 +779,14 @@ Node *LoadNode::make( PhaseGVN& gvn, Node *ctl, Node *mem, Node *adr, const Type
"use LoadRangeNode instead"); "use LoadRangeNode instead");
switch (bt) { switch (bt) {
case T_BOOLEAN: case T_BOOLEAN:
case T_BYTE: return new (C, 3) LoadBNode(ctl, mem, adr, adr_type, rt->is_int() ); case T_BYTE: return new (C, 3) LoadBNode (ctl, mem, adr, adr_type, rt->is_int() );
case T_INT: return new (C, 3) LoadINode(ctl, mem, adr, adr_type, rt->is_int() ); case T_INT: return new (C, 3) LoadINode (ctl, mem, adr, adr_type, rt->is_int() );
case T_CHAR: return new (C, 3) LoadCNode(ctl, mem, adr, adr_type, rt->is_int() ); case T_CHAR: return new (C, 3) LoadUSNode(ctl, mem, adr, adr_type, rt->is_int() );
case T_SHORT: return new (C, 3) LoadSNode(ctl, mem, adr, adr_type, rt->is_int() ); case T_SHORT: return new (C, 3) LoadSNode (ctl, mem, adr, adr_type, rt->is_int() );
case T_LONG: return new (C, 3) LoadLNode(ctl, mem, adr, adr_type, rt->is_long() ); case T_LONG: return new (C, 3) LoadLNode (ctl, mem, adr, adr_type, rt->is_long() );
case T_FLOAT: return new (C, 3) LoadFNode(ctl, mem, adr, adr_type, rt ); case T_FLOAT: return new (C, 3) LoadFNode (ctl, mem, adr, adr_type, rt );
case T_DOUBLE: return new (C, 3) LoadDNode(ctl, mem, adr, adr_type, rt ); case T_DOUBLE: return new (C, 3) LoadDNode (ctl, mem, adr, adr_type, rt );
case T_ADDRESS: return new (C, 3) LoadPNode(ctl, mem, adr, adr_type, rt->is_ptr() ); case T_ADDRESS: return new (C, 3) LoadPNode (ctl, mem, adr, adr_type, rt->is_ptr() );
case T_OBJECT: case T_OBJECT:
#ifdef _LP64 #ifdef _LP64
if (adr->bottom_type()->is_ptr_to_narrowoop()) { if (adr->bottom_type()->is_ptr_to_narrowoop()) {
@ -1357,7 +1357,7 @@ Node *LoadNode::Ideal(PhaseGVN *phase, bool can_reshape) {
// Steps (a), (b): Walk past independent stores to find an exact match. // Steps (a), (b): Walk past independent stores to find an exact match.
if (prev_mem != NULL && prev_mem != in(MemNode::Memory)) { if (prev_mem != NULL && prev_mem != in(MemNode::Memory)) {
// (c) See if we can fold up on the spot, but don't fold up here. // (c) See if we can fold up on the spot, but don't fold up here.
// Fold-up might require truncation (for LoadB/LoadS/LoadC) or // Fold-up might require truncation (for LoadB/LoadS/LoadUS) or
// just return a prior value, which is done by Identity calls. // just return a prior value, which is done by Identity calls.
if (can_see_stored_value(prev_mem, phase)) { if (can_see_stored_value(prev_mem, phase)) {
// Make ready for step (d): // Make ready for step (d):
@ -1606,14 +1606,14 @@ Node *LoadBNode::Ideal(PhaseGVN *phase, bool can_reshape) {
return LoadNode::Ideal(phase, can_reshape); return LoadNode::Ideal(phase, can_reshape);
} }
//--------------------------LoadCNode::Ideal-------------------------------------- //--------------------------LoadUSNode::Ideal-------------------------------------
// //
// If the previous store is to the same address as this load, // If the previous store is to the same address as this load,
// and the value stored was larger than a char, replace this load // and the value stored was larger than a char, replace this load
// with the value stored truncated to a char. If no truncation is // with the value stored truncated to a char. If no truncation is
// needed, the replacement is done in LoadNode::Identity(). // needed, the replacement is done in LoadNode::Identity().
// //
Node *LoadCNode::Ideal(PhaseGVN *phase, bool can_reshape) { Node *LoadUSNode::Ideal(PhaseGVN *phase, bool can_reshape) {
Node* mem = in(MemNode::Memory); Node* mem = in(MemNode::Memory);
Node* value = can_see_stored_value(mem,phase); Node* value = can_see_stored_value(mem,phase);
if( value && !phase->type(value)->higher_equal( _type ) ) if( value && !phase->type(value)->higher_equal( _type ) )

8
hotspot/src/share/vm/opto/memnode.hpp
View file

@ -207,11 +207,11 @@ public:
virtual BasicType memory_type() const { return T_BYTE; } virtual BasicType memory_type() const { return T_BYTE; }
}; };
//------------------------------LoadCNode-------------------------------------- //------------------------------LoadUSNode-------------------------------------
// Load a char (16bits unsigned) from memory // Load an unsigned short/char (16bits unsigned) from memory
class LoadCNode : public LoadNode { class LoadUSNode : public LoadNode {
public: public:
LoadCNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR ) LoadUSNode( Node *c, Node *mem, Node *adr, const TypePtr* at, const TypeInt *ti = TypeInt::CHAR )
: LoadNode(c,mem,adr,at,ti) {} : LoadNode(c,mem,adr,at,ti) {}
virtual int Opcode() const; virtual int Opcode() const;
virtual uint ideal_reg() const { return Op_RegI; } virtual uint ideal_reg() const { return Op_RegI; }

12
hotspot/src/share/vm/opto/mulnode.cpp
View file

@ -442,7 +442,7 @@ Node *AndINode::Identity( PhaseTransform *phase ) {
return load; return load;
} }
uint lop = load->Opcode(); uint lop = load->Opcode();
if( lop == Op_LoadC && if( lop == Op_LoadUS &&
con == 0x0000FFFF ) // Already zero-extended con == 0x0000FFFF ) // Already zero-extended
return load; return load;
// Masking off the high bits of a unsigned-shift-right is not // Masking off the high bits of a unsigned-shift-right is not
@ -470,19 +470,19 @@ Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
uint lop = load->Opcode(); uint lop = load->Opcode();
// Masking bits off of a Character? Hi bits are already zero. // Masking bits off of a Character? Hi bits are already zero.
if( lop == Op_LoadC && if( lop == Op_LoadUS &&
(mask & 0xFFFF0000) ) // Can we make a smaller mask? (mask & 0xFFFF0000) ) // Can we make a smaller mask?
return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF)); return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF));
// Masking bits off of a Short? Loading a Character does some masking // Masking bits off of a Short? Loading a Character does some masking
if( lop == Op_LoadS && if( lop == Op_LoadS &&
(mask & 0xFFFF0000) == 0 ) { (mask & 0xFFFF0000) == 0 ) {
Node *ldc = new (phase->C, 3) LoadCNode(load->in(MemNode::Control), Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control),
load->in(MemNode::Memory), load->in(MemNode::Memory),
load->in(MemNode::Address), load->in(MemNode::Address),
load->adr_type()); load->adr_type());
ldc = phase->transform(ldc); ldus = phase->transform(ldus);
return new (phase->C, 3) AndINode(ldc,phase->intcon(mask&0xFFFF)); return new (phase->C, 3) AndINode(ldus, phase->intcon(mask&0xFFFF));
} }
// Masking sign bits off of a Byte? Let the matcher use an unsigned load // Masking sign bits off of a Byte? Let the matcher use an unsigned load
@ -913,7 +913,7 @@ Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
set_req(2, phase->intcon(0)); set_req(2, phase->intcon(0));
return this; return this;
} }
else if( ld->Opcode() == Op_LoadC ) else if( ld->Opcode() == Op_LoadUS )
// Replace zero-extension-load with sign-extension-load // Replace zero-extension-load with sign-extension-load
return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control), return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control),
ld->in(MemNode::Memory), ld->in(MemNode::Memory),

2
hotspot/src/share/vm/opto/superword.cpp
View file

@ -1444,7 +1444,7 @@ const Type* SuperWord::container_type(const Type* t) {
// (Start, end] half-open range defining which operands are vector // (Start, end] half-open range defining which operands are vector
void SuperWord::vector_opd_range(Node* n, uint* start, uint* end) { void SuperWord::vector_opd_range(Node* n, uint* start, uint* end) {
switch (n->Opcode()) { switch (n->Opcode()) {
case Op_LoadB: case Op_LoadC: case Op_LoadB: case Op_LoadUS:
case Op_LoadI: case Op_LoadL: case Op_LoadI: case Op_LoadL:
case Op_LoadF: case Op_LoadD: case Op_LoadF: case Op_LoadD:
case Op_LoadP: case Op_LoadP:

4
hotspot/src/share/vm/opto/vectornode.cpp
View file

@ -239,7 +239,7 @@ int VectorNode::opcode(int sopc, uint vlen, const Type* opd_t) {
return Op_XorV; return Op_XorV;
case Op_LoadB: case Op_LoadB:
case Op_LoadC: case Op_LoadUS:
case Op_LoadS: case Op_LoadS:
case Op_LoadI: case Op_LoadI:
case Op_LoadL: case Op_LoadL:
@ -269,7 +269,7 @@ int VectorLoadNode::opcode(int sopc, uint vlen) {
case 16: return Op_Load16B; case 16: return Op_Load16B;
} }
break; break;
case Op_LoadC: case Op_LoadUS:
switch (vlen) { switch (vlen) {
case 2: return Op_Load2C; case 2: return Op_Load2C;
case 4: return Op_Load4C; case 4: return Op_Load4C;