8293524: RISC-V: Use macro-assembler functions as appropriate

Reviewed-by: shade, fjiang
This commit is contained in:
Fei Yang 2022-09-09 00:18:48 +00:00
parent 14eb5ad0dc
commit 43e191d64b
13 changed files with 78 additions and 78 deletions

View file

@ -738,7 +738,7 @@ void MacroAssembler::la(Register Rd, const Address &adr) {
switch (adr.getMode()) {
case Address::literal: {
if (rtype == relocInfo::none) {
li(Rd, (intptr_t)(adr.target()));
mv(Rd, (intptr_t)(adr.target()));
} else {
movptr(Rd, adr.target());
}
@ -1602,7 +1602,7 @@ void MacroAssembler::andi(Register Rd, Register Rn, int64_t imm, Register tmp) {
and_imm12(Rd, Rn, imm);
} else {
assert_different_registers(Rn, tmp);
li(tmp, imm);
mv(tmp, imm);
andr(Rd, Rn, tmp);
}
}
@ -1616,7 +1616,7 @@ void MacroAssembler::orptr(Address adr, RegisterOrConstant src, Register tmp1, R
ori(tmp1, tmp1, src.as_constant());
} else {
assert_different_registers(tmp1, tmp2);
li(tmp2, src.as_constant());
mv(tmp2, src.as_constant());
orr(tmp1, tmp1, tmp2);
}
}
@ -1858,7 +1858,7 @@ void MacroAssembler::decode_klass_not_null(Register dst, Register src, Register
}
assert_different_registers(src, xbase);
li(xbase, (uintptr_t)CompressedKlassPointers::base());
mv(xbase, (uintptr_t)CompressedKlassPointers::base());
if (CompressedKlassPointers::shift() != 0) {
assert(LogKlassAlignmentInBytes == CompressedKlassPointers::shift(), "decode alg wrong");
@ -1900,7 +1900,7 @@ void MacroAssembler::encode_klass_not_null(Register dst, Register src, Register
}
assert_different_registers(src, xbase);
li(xbase, (intptr_t)CompressedKlassPointers::base());
mv(xbase, (intptr_t)CompressedKlassPointers::base());
sub(dst, src, xbase);
if (CompressedKlassPointers::shift() != 0) {
assert(LogKlassAlignmentInBytes == CompressedKlassPointers::shift(), "decode alg wrong");
@ -2053,7 +2053,7 @@ void MacroAssembler::lookup_interface_method(Register recv_klass,
if (itable_index.is_register()) {
slli(t0, itable_index.as_register(), 3);
} else {
li(t0, itable_index.as_constant() << 3);
mv(t0, itable_index.as_constant() << 3);
}
add(recv_klass, recv_klass, t0);
if (itentry_off) {
@ -2243,10 +2243,10 @@ void MacroAssembler::cmpxchg_narrow_value_helper(Register addr, Register expecte
andi(aligned_addr, addr, ~3);
if (size == int8) {
addi(mask, zr, 0xff);
mv(mask, 0xff);
} else {
// size == int16 case
addi(mask, zr, -1);
mv(mask, -1);
zero_extend(mask, mask, 16);
}
sll(mask, mask, shift);
@ -2286,7 +2286,7 @@ void MacroAssembler::cmpxchg_narrow_value(Register addr, Register expected,
bnez(tmp, retry);
if (result_as_bool) {
li(result, 1);
mv(result, 1);
j(done);
bind(fail);
@ -2333,7 +2333,7 @@ void MacroAssembler::weak_cmpxchg_narrow_value(Register addr, Register expected,
bnez(tmp, fail);
// Success
li(result, 1);
mv(result, 1);
j(done);
// Fail
@ -2359,7 +2359,7 @@ void MacroAssembler::cmpxchg(Register addr, Register expected,
// equal, succeed
if (result_as_bool) {
li(result, 1);
mv(result, 1);
} else {
mv(result, expected);
}
@ -2388,7 +2388,7 @@ void MacroAssembler::cmpxchg_weak(Register addr, Register expected,
bnez(t0, fail);
// Success
li(result, 1);
mv(result, 1);
j(done);
// Fail
@ -2636,7 +2636,7 @@ void MacroAssembler::check_klass_subtype_slow_path(Register sub_klass,
add(x15, x15, Array<Klass*>::base_offset_in_bytes());
// Set t0 to an obvious invalid value, falling through by default
li(t0, -1);
mv(t0, -1);
// Scan X12 words at [X15] for an occurrence of X10.
repne_scan(x15, x10, x12, t0);
@ -2694,7 +2694,7 @@ void MacroAssembler::get_thread(Register thread) {
void MacroAssembler::load_byte_map_base(Register reg) {
CardTable::CardValue* byte_map_base =
((CardTableBarrierSet*)(BarrierSet::barrier_set()))->card_table()->byte_map_base();
li(reg, (uint64_t)byte_map_base);
mv(reg, (uint64_t)byte_map_base);
}
void MacroAssembler::la_patchable(Register reg1, const Address &dest, int32_t &offset) {
@ -3056,7 +3056,7 @@ void MacroAssembler::mul_add(Register out, Register in, Register offset,
add(in, in, t0);
const int unroll = 8;
li(tmp, unroll);
mv(tmp, unroll);
blt(len, tmp, L_tail_loop);
bind(L_unroll);
for (int i = 0; i < unroll; i++) {
@ -3546,7 +3546,7 @@ void MacroAssembler::ctzc_bit(Register Rd, Register Rs, bool isLL, Register tmp1
assert_different_registers(Rd, Rs, tmp1, tmp2);
Label Loop;
int step = isLL ? 8 : 16;
li(Rd, -step);
mv(Rd, -step);
mv(tmp2, Rs);
bind(Loop);
@ -3563,7 +3563,7 @@ void MacroAssembler::ctzc_bit(Register Rd, Register Rs, bool isLL, Register tmp1
void MacroAssembler::inflate_lo32(Register Rd, Register Rs, Register tmp1, Register tmp2)
{
assert_different_registers(Rd, Rs, tmp1, tmp2);
li(tmp1, 0xFF);
mv(tmp1, 0xFF);
mv(Rd, zr);
for (int i = 0; i <= 3; i++)
{
@ -3585,7 +3585,7 @@ void MacroAssembler::inflate_lo32(Register Rd, Register Rs, Register tmp1, Regis
void MacroAssembler::inflate_hi32(Register Rd, Register Rs, Register tmp1, Register tmp2)
{
assert_different_registers(Rd, Rs, tmp1, tmp2);
li(tmp1, 0xFF00000000);
mv(tmp1, 0xFF00000000);
mv(Rd, zr);
for (int i = 0; i <= 3; i++)
{
@ -3683,7 +3683,7 @@ void MacroAssembler::zero_words(Register base, u_int64_t cnt)
Register cnt_reg = t0;
Register loop_base = t1;
cnt = cnt - remainder;
li(cnt_reg, cnt);
mv(cnt_reg, cnt);
add(loop_base, base, remainder * wordSize);
bind(loop);
sub(cnt_reg, cnt_reg, unroll);