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8241040: Support for AVX-512 Ternary Logic Instruction
A new pass has been added which folds expression tree involving vector boolean logic operations into a MacroLogic node. Reviewed-by: vlivanov, neliasso
This commit is contained in:
Jatin Bhateja
parent
fb56759d08
commit
5532b27d22
15 changed files with 842 additions and 1 deletions
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@ -76,6 +76,7 @@
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#include "utilities/align.hpp"
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#include "utilities/copy.hpp"
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#include "utilities/macros.hpp"
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#include "utilities/resourceHash.hpp"
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// -------------------- Compile::mach_constant_base_node -----------------------
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@ -2228,6 +2229,11 @@ void Compile::Optimize() {
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igvn.optimize();
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}
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if (C->max_vector_size() > 0) {
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C->optimize_logic_cones(igvn);
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igvn.optimize();
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}
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DEBUG_ONLY( _modified_nodes = NULL; )
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} // (End scope of igvn; run destructor if necessary for asserts.)
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@ -2244,6 +2250,317 @@ void Compile::Optimize() {
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print_method(PHASE_OPTIMIZE_FINISHED, 2);
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}
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//---------------------------- Bitwise operation packing optimization ---------------------------
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static bool is_vector_unary_bitwise_op(Node* n) {
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return n->Opcode() == Op_XorV &&
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VectorNode::is_vector_bitwise_not_pattern(n);
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}
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static bool is_vector_binary_bitwise_op(Node* n) {
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switch (n->Opcode()) {
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case Op_AndV:
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case Op_OrV:
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return true;
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case Op_XorV:
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return !is_vector_unary_bitwise_op(n);
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default:
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return false;
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}
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}
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static bool is_vector_ternary_bitwise_op(Node* n) {
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return n->Opcode() == Op_MacroLogicV;
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}
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static bool is_vector_bitwise_op(Node* n) {
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return is_vector_unary_bitwise_op(n) ||
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is_vector_binary_bitwise_op(n) ||
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is_vector_ternary_bitwise_op(n);
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}
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static bool is_vector_bitwise_cone_root(Node* n) {
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if (!is_vector_bitwise_op(n)) {
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return false;
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}
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for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
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if (is_vector_bitwise_op(n->fast_out(i))) {
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return false;
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}
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}
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return true;
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}
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static uint collect_unique_inputs(Node* n, Unique_Node_List& partition, Unique_Node_List& inputs) {
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uint cnt = 0;
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if (is_vector_bitwise_op(n)) {
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if (VectorNode::is_vector_bitwise_not_pattern(n)) {
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for (uint i = 1; i < n->req(); i++) {
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Node* in = n->in(i);
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bool skip = VectorNode::is_all_ones_vector(in);
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if (!skip && !inputs.member(in)) {
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inputs.push(in);
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cnt++;
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}
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}
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assert(cnt <= 1, "not unary");
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} else {
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uint last_req = n->req();
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if (is_vector_ternary_bitwise_op(n)) {
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last_req = n->req() - 1; // skip last input
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}
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for (uint i = 1; i < last_req; i++) {
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Node* def = n->in(i);
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if (!inputs.member(def)) {
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inputs.push(def);
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cnt++;
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}
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}
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}
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partition.push(n);
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} else { // not a bitwise operations
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if (!inputs.member(n)) {
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inputs.push(n);
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cnt++;
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}
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}
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return cnt;
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}
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void Compile::collect_logic_cone_roots(Unique_Node_List& list) {
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Unique_Node_List useful_nodes;
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C->identify_useful_nodes(useful_nodes);
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for (uint i = 0; i < useful_nodes.size(); i++) {
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Node* n = useful_nodes.at(i);
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if (is_vector_bitwise_cone_root(n)) {
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list.push(n);
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}
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}
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}
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Node* Compile::xform_to_MacroLogicV(PhaseIterGVN& igvn,
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const TypeVect* vt,
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Unique_Node_List& partition,
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Unique_Node_List& inputs) {
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assert(partition.size() == 2 || partition.size() == 3, "not supported");
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assert(inputs.size() == 2 || inputs.size() == 3, "not supported");
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assert(Matcher::match_rule_supported_vector(Op_MacroLogicV, vt->length(), vt->element_basic_type()), "not supported");
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Node* in1 = inputs.at(0);
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Node* in2 = inputs.at(1);
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Node* in3 = (inputs.size() == 3 ? inputs.at(2) : in2);
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uint func = compute_truth_table(partition, inputs);
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return igvn.transform(MacroLogicVNode::make(igvn, in3, in2, in1, func, vt));
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}
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static uint extract_bit(uint func, uint pos) {
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return (func & (1 << pos)) >> pos;
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}
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//
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// A macro logic node represents a truth table. It has 4 inputs,
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// First three inputs corresponds to 3 columns of a truth table
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// and fourth input captures the logic function.
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//
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// eg. fn = (in1 AND in2) OR in3;
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//
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// MacroNode(in1,in2,in3,fn)
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//
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// -----------------
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// in1 in2 in3 fn
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// -----------------
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// 0 0 0 0
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// 0 0 1 1
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// 0 1 0 0
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// 0 1 1 1
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// 1 0 0 0
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// 1 0 1 1
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// 1 1 0 1
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// 1 1 1 1
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//
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uint Compile::eval_macro_logic_op(uint func, uint in1 , uint in2, uint in3) {
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int res = 0;
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for (int i = 0; i < 8; i++) {
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int bit1 = extract_bit(in1, i);
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int bit2 = extract_bit(in2, i);
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int bit3 = extract_bit(in3, i);
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int func_bit_pos = (bit1 << 2 | bit2 << 1 | bit3);
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int func_bit = extract_bit(func, func_bit_pos);
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res |= func_bit << i;
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}
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return res;
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}
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static uint eval_operand(Node* n, ResourceHashtable<Node*,uint>& eval_map) {
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assert(n != NULL, "");
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assert(eval_map.contains(n), "absent");
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return *(eval_map.get(n));
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}
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static void eval_operands(Node* n,
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uint& func1, uint& func2, uint& func3,
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ResourceHashtable<Node*,uint>& eval_map) {
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assert(is_vector_bitwise_op(n), "");
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func1 = eval_operand(n->in(1), eval_map);
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if (is_vector_binary_bitwise_op(n)) {
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func2 = eval_operand(n->in(2), eval_map);
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} else if (is_vector_ternary_bitwise_op(n)) {
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func2 = eval_operand(n->in(2), eval_map);
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func3 = eval_operand(n->in(3), eval_map);
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} else {
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assert(is_vector_unary_bitwise_op(n), "not unary");
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}
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}
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uint Compile::compute_truth_table(Unique_Node_List& partition, Unique_Node_List& inputs) {
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assert(inputs.size() <= 3, "sanity");
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ResourceMark rm;
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uint res = 0;
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ResourceHashtable<Node*,uint> eval_map;
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// Populate precomputed functions for inputs.
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// Each input corresponds to one column of 3 input truth-table.
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uint input_funcs[] = { 0xAA, // (_, _, a) -> a
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0xCC, // (_, b, _) -> b
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0xF0 }; // (c, _, _) -> c
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for (uint i = 0; i < inputs.size(); i++) {
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eval_map.put(inputs.at(i), input_funcs[i]);
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}
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for (uint i = 0; i < partition.size(); i++) {
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Node* n = partition.at(i);
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uint func1 = 0, func2 = 0, func3 = 0;
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eval_operands(n, func1, func2, func3, eval_map);
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switch (n->Opcode()) {
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case Op_OrV:
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assert(func3 == 0, "not binary");
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res = func1 | func2;
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break;
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case Op_AndV:
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assert(func3 == 0, "not binary");
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res = func1 & func2;
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break;
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case Op_XorV:
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if (VectorNode::is_vector_bitwise_not_pattern(n)) {
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assert(func2 == 0 && func3 == 0, "not unary");
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res = (~func1) & 0xFF;
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} else {
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assert(func3 == 0, "not binary");
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res = func1 ^ func2;
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}
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break;
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case Op_MacroLogicV:
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// Ordering of inputs may change during evaluation of sub-tree
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// containing MacroLogic node as a child node, thus a re-evaluation
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// makes sure that function is evaluated in context of current
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// inputs.
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res = eval_macro_logic_op(n->in(4)->get_int(), func1, func2, func3);
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break;
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default: assert(false, "not supported: %s", n->Name());
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}
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assert(res <= 0xFF, "invalid");
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eval_map.put(n, res);
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}
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return res;
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}
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bool Compile::compute_logic_cone(Node* n, Unique_Node_List& partition, Unique_Node_List& inputs) {
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assert(partition.size() == 0, "not empty");
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assert(inputs.size() == 0, "not empty");
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assert(!is_vector_ternary_bitwise_op(n), "not supported");
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bool is_unary_op = is_vector_unary_bitwise_op(n);
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if (is_unary_op) {
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assert(collect_unique_inputs(n, partition, inputs) == 1, "not unary");
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return false; // too few inputs
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}
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assert(is_vector_binary_bitwise_op(n), "not binary");
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Node* in1 = n->in(1);
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Node* in2 = n->in(2);
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int in1_unique_inputs_cnt = collect_unique_inputs(in1, partition, inputs);
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int in2_unique_inputs_cnt = collect_unique_inputs(in2, partition, inputs);
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partition.push(n);
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// Too many inputs?
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if (inputs.size() > 3) {
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partition.clear();
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inputs.clear();
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{ // Recompute in2 inputs
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Unique_Node_List not_used;
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in2_unique_inputs_cnt = collect_unique_inputs(in2, not_used, not_used);
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}
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// Pick the node with minimum number of inputs.
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if (in1_unique_inputs_cnt >= 3 && in2_unique_inputs_cnt >= 3) {
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return false; // still too many inputs
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}
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// Recompute partition & inputs.
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Node* child = (in1_unique_inputs_cnt < in2_unique_inputs_cnt ? in1 : in2);
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collect_unique_inputs(child, partition, inputs);
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Node* other_input = (in1_unique_inputs_cnt < in2_unique_inputs_cnt ? in2 : in1);
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inputs.push(other_input);
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partition.push(n);
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}
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return (partition.size() == 2 || partition.size() == 3) &&
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(inputs.size() == 2 || inputs.size() == 3);
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}
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void Compile::process_logic_cone_root(PhaseIterGVN &igvn, Node *n, VectorSet &visited) {
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assert(is_vector_bitwise_op(n), "not a root");
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visited.set(n->_idx);
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// 1) Do a DFS walk over the logic cone.
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for (uint i = 1; i < n->req(); i++) {
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Node* in = n->in(i);
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if (!visited.test(in->_idx) && is_vector_bitwise_op(in)) {
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process_logic_cone_root(igvn, in, visited);
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}
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}
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// 2) Bottom up traversal: Merge node[s] with
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// the parent to form macro logic node.
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Unique_Node_List partition;
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Unique_Node_List inputs;
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if (compute_logic_cone(n, partition, inputs)) {
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const TypeVect* vt = n->bottom_type()->is_vect();
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Node* macro_logic = xform_to_MacroLogicV(igvn, vt, partition, inputs);
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igvn.replace_node(n, macro_logic);
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}
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}
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void Compile::optimize_logic_cones(PhaseIterGVN &igvn) {
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ResourceMark rm;
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if (Matcher::match_rule_supported(Op_MacroLogicV)) {
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Unique_Node_List list;
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collect_logic_cone_roots(list);
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while (list.size() > 0) {
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Node* n = list.pop();
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const TypeVect* vt = n->bottom_type()->is_vect();
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bool supported = Matcher::match_rule_supported_vector(Op_MacroLogicV, vt->length(), vt->element_basic_type());
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if (supported) {
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VectorSet visited(comp_arena());
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process_logic_cone_root(igvn, n, visited);
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}
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}
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}
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}
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//------------------------------Code_Gen---------------------------------------
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// Given a graph, generate code for it
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@ -4225,6 +4542,7 @@ void CloneMap::dump(node_idx_t key) const {
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}
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}
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// Move Allocate nodes to the start of the list
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void Compile::sort_macro_nodes() {
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int count = macro_count();
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