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8241040: Support for AVX-512 Ternary Logic Instruction

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A new pass has been added which folds expression tree involving vector boolean logic operations into a MacroLogic node.

Reviewed-by: vlivanov, neliasso
This commit is contained in:
Jatin Bhateja 2020-04-02 22:38:23 +05:30
parent fb56759d08
commit 5532b27d22
15 changed files with 842 additions and 1 deletions
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10
src/hotspot/share/opto/compile.hpp
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@ -83,6 +83,7 @@ class TypeInt;
class TypePtr;
class TypeOopPtr;
class TypeFunc;
class TypeVect;
class Unique_Node_List;
class nmethod;
class WarmCallInfo;
@ -1106,6 +1107,15 @@ class Compile : public Phase {
void final_graph_reshaping_walk( Node_Stack &nstack, Node *root, Final_Reshape_Counts &frc );
void eliminate_redundant_card_marks(Node* n);
// Logic cone optimization.
void optimize_logic_cones(PhaseIterGVN &igvn);
void collect_logic_cone_roots(Unique_Node_List& list);
void process_logic_cone_root(PhaseIterGVN &igvn, Node* n, VectorSet& visited);
bool compute_logic_cone(Node* n, Unique_Node_List& partition, Unique_Node_List& inputs);
uint compute_truth_table(Unique_Node_List& partition, Unique_Node_List& inputs);
uint eval_macro_logic_op(uint func, uint op1, uint op2, uint op3);
Node* xform_to_MacroLogicV(PhaseIterGVN &igvn, const TypeVect* vt, Unique_Node_List& partitions, Unique_Node_List& inputs);
public:
// Note: Histogram array size is about 1 Kb.