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8266317: Vector API enhancements

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Co-authored-by: Paul Sandoz <psandoz@openjdk.org>
Co-authored-by: Sandhya Viswanathan <sviswanathan@openjdk.org>
Reviewed-by: jbhateja, vlivanov
This commit is contained in:
Paul Sandoz 2021-06-03 15:16:58 +00:00
parent eb385c0de2
commit 5982cfc856
121 changed files with 9631 additions and 736 deletions
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50
src/hotspot/cpu/x86/assembler_x86.cpp
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@ -3916,16 +3916,6 @@ void Assembler::evpcmpuw(KRegister kdst, XMMRegister nds, XMMRegister src, Compa
emit_int24(0x3E, (0xC0 | encode), vcc);
}
void Assembler::evpcmpuw(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src, ComparisonPredicate vcc, int vector_len) {
assert(VM_Version::supports_avx512vlbw(), "");
InstructionAttr attributes(vector_len, /* rex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ false, /* uses_vl */ true);
attributes.reset_is_clear_context();
attributes.set_embedded_opmask_register_specifier(mask);
attributes.set_is_evex_instruction();
int encode = vex_prefix_and_encode(kdst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
emit_int24(0x3E, (0xC0 | encode), vcc);
}
void Assembler::evpcmpuw(KRegister kdst, XMMRegister nds, Address src, ComparisonPredicate vcc, int vector_len) {
assert(VM_Version::supports_avx512vlbw(), "");
InstructionMark im(this);
@ -9163,7 +9153,7 @@ void Assembler::vpcmpgtq(XMMRegister dst, XMMRegister nds, XMMRegister src, int
}
void Assembler::evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
int comparison, int vector_len) {
int comparison, bool is_signed, int vector_len) {
assert(VM_Version::supports_evex(), "");
assert(comparison >= Assembler::eq && comparison <= Assembler::_true, "");
// Encoding: EVEX.NDS.XXX.66.0F3A.W0 1F /r ib
@ -9172,11 +9162,12 @@ void Assembler::evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegi
attributes.set_embedded_opmask_register_specifier(mask);
attributes.reset_is_clear_context();
int encode = vex_prefix_and_encode(kdst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
emit_int24(0x1F, (0xC0 | encode), comparison);
int opcode = is_signed ? 0x1F : 0x1E;
emit_int24(opcode, (0xC0 | encode), comparison);
}
void Assembler::evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, Address src,
int comparison, int vector_len) {
int comparison, bool is_signed, int vector_len) {
assert(VM_Version::supports_evex(), "");
assert(comparison >= Assembler::eq && comparison <= Assembler::_true, "");
// Encoding: EVEX.NDS.XXX.66.0F3A.W0 1F /r ib
@ -9188,13 +9179,14 @@ void Assembler::evpcmpd(KRegister kdst, KRegister mask, XMMRegister nds, Address
attributes.reset_is_clear_context();
int dst_enc = kdst->encoding();
vex_prefix(src, nds->encoding(), dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
emit_int8((unsigned char)0x1F);
int opcode = is_signed ? 0x1F : 0x1E;
emit_int8((unsigned char)opcode);
emit_operand(as_Register(dst_enc), src);
emit_int8((unsigned char)comparison);
}
void Assembler::evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
int comparison, int vector_len) {
int comparison, bool is_signed, int vector_len) {
assert(VM_Version::supports_evex(), "");
assert(comparison >= Assembler::eq && comparison <= Assembler::_true, "");
// Encoding: EVEX.NDS.XXX.66.0F3A.W1 1F /r ib
@ -9203,11 +9195,12 @@ void Assembler::evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegi
attributes.set_embedded_opmask_register_specifier(mask);
attributes.reset_is_clear_context();
int encode = vex_prefix_and_encode(kdst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
emit_int24(0x1F, (0xC0 | encode), comparison);
int opcode = is_signed ? 0x1F : 0x1E;
emit_int24(opcode, (0xC0 | encode), comparison);
}
void Assembler::evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, Address src,
int comparison, int vector_len) {
int comparison, bool is_signed, int vector_len) {
assert(VM_Version::supports_evex(), "");
assert(comparison >= Assembler::eq && comparison <= Assembler::_true, "");
// Encoding: EVEX.NDS.XXX.66.0F3A.W1 1F /r ib
@ -9219,13 +9212,14 @@ void Assembler::evpcmpq(KRegister kdst, KRegister mask, XMMRegister nds, Address
attributes.reset_is_clear_context();
int dst_enc = kdst->encoding();
vex_prefix(src, nds->encoding(), dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
emit_int8((unsigned char)0x1F);
int opcode = is_signed ? 0x1F : 0x1E;
emit_int8((unsigned char)opcode);
emit_operand(as_Register(dst_enc), src);
emit_int8((unsigned char)comparison);
}
void Assembler::evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
int comparison, int vector_len) {
int comparison, bool is_signed, int vector_len) {
assert(VM_Version::supports_evex(), "");
assert(VM_Version::supports_avx512bw(), "");
assert(comparison >= Assembler::eq && comparison <= Assembler::_true, "");
@ -9235,11 +9229,12 @@ void Assembler::evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegi
attributes.set_embedded_opmask_register_specifier(mask);
attributes.reset_is_clear_context();
int encode = vex_prefix_and_encode(kdst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
emit_int24(0x3F, (0xC0 | encode), comparison);
int opcode = is_signed ? 0x3F : 0x3E;
emit_int24(opcode, (0xC0 | encode), comparison);
}
void Assembler::evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, Address src,
int comparison, int vector_len) {
int comparison, bool is_signed, int vector_len) {
assert(VM_Version::supports_evex(), "");
assert(VM_Version::supports_avx512bw(), "");
assert(comparison >= Assembler::eq && comparison <= Assembler::_true, "");
@ -9252,13 +9247,14 @@ void Assembler::evpcmpb(KRegister kdst, KRegister mask, XMMRegister nds, Address
attributes.reset_is_clear_context();
int dst_enc = kdst->encoding();
vex_prefix(src, nds->encoding(), dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
emit_int8((unsigned char)0x3F);
int opcode = is_signed ? 0x3F : 0x3E;
emit_int8((unsigned char)opcode);
emit_operand(as_Register(dst_enc), src);
emit_int8((unsigned char)comparison);
}
void Assembler::evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegister src,
int comparison, int vector_len) {
int comparison, bool is_signed, int vector_len) {
assert(VM_Version::supports_evex(), "");
assert(VM_Version::supports_avx512bw(), "");
assert(comparison >= Assembler::eq && comparison <= Assembler::_true, "");
@ -9268,11 +9264,12 @@ void Assembler::evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, XMMRegi
attributes.set_embedded_opmask_register_specifier(mask);
attributes.reset_is_clear_context();
int encode = vex_prefix_and_encode(kdst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
emit_int24(0x3F, (0xC0 | encode), comparison);
int opcode = is_signed ? 0x3F : 0x3E;
emit_int24(opcode, (0xC0 | encode), comparison);
}
void Assembler::evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, Address src,
int comparison, int vector_len) {
int comparison, bool is_signed, int vector_len) {
assert(VM_Version::supports_evex(), "");
assert(VM_Version::supports_avx512bw(), "");
assert(comparison >= Assembler::eq && comparison <= Assembler::_true, "");
@ -9285,7 +9282,8 @@ void Assembler::evpcmpw(KRegister kdst, KRegister mask, XMMRegister nds, Address
attributes.reset_is_clear_context();
int dst_enc = kdst->encoding();
vex_prefix(src, nds->encoding(), dst_enc, VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
emit_int8((unsigned char)0x3F);
int opcode = is_signed ? 0x3F : 0x3E;
emit_int8((unsigned char)opcode);
emit_operand(as_Register(dst_enc), src);
emit_int8((unsigned char)comparison);
}