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8131778: java disables UseAES flag when using VIS=2 on sparc
Reviewed-by: iignatyev, kvn
This commit is contained in:
parent
eee22b283d
commit
6de50f10f5
2 changed files with 50 additions and 38 deletions
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@ -229,35 +229,35 @@ void VM_Version::initialize() {
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// SPARC T4 and above should have support for AES instructions
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if (has_aes()) {
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if (UseVIS > 2) { // AES intrinsics use MOVxTOd/MOVdTOx which are VIS3
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if (FLAG_IS_DEFAULT(UseAES)) {
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FLAG_SET_DEFAULT(UseAES, true);
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if (FLAG_IS_DEFAULT(UseAES)) {
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FLAG_SET_DEFAULT(UseAES, true);
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}
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if (!UseAES) {
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if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
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warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled.");
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}
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if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
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FLAG_SET_DEFAULT(UseAESIntrinsics, true);
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}
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// we disable both the AES flags if either of them is disabled on the command line
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if (!UseAES || !UseAESIntrinsics) {
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FLAG_SET_DEFAULT(UseAES, false);
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FLAG_SET_DEFAULT(UseAESIntrinsics, false);
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} else {
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// The AES intrinsic stubs require AES instruction support (of course)
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// but also require VIS3 mode or higher for instructions it use.
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if (UseVIS > 2) {
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if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
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FLAG_SET_DEFAULT(UseAESIntrinsics, true);
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}
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} else {
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if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
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warning("SPARC AES intrinsics require VIS3 instructions. Intrinsics will be disabled.");
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}
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FLAG_SET_DEFAULT(UseAESIntrinsics, false);
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}
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} else {
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if (UseAES || UseAESIntrinsics) {
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warning("SPARC AES intrinsics require VIS3 instruction support. Intrinsics will be disabled.");
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if (UseAES) {
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FLAG_SET_DEFAULT(UseAES, false);
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}
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if (UseAESIntrinsics) {
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FLAG_SET_DEFAULT(UseAESIntrinsics, false);
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}
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}
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}
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} else if (UseAES || UseAESIntrinsics) {
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warning("AES instructions are not available on this CPU");
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if (UseAES) {
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if (UseAES && !FLAG_IS_DEFAULT(UseAES)) {
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warning("AES instructions are not available on this CPU");
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FLAG_SET_DEFAULT(UseAES, false);
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}
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if (UseAESIntrinsics) {
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if (UseAESIntrinsics && !FLAG_IS_DEFAULT(UseAESIntrinsics)) {
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warning("AES intrinsics are not available on this CPU");
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FLAG_SET_DEFAULT(UseAESIntrinsics, false);
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}
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}
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