diff --git a/src/hotspot/cpu/aarch64/aarch64_sve.ad b/src/hotspot/cpu/aarch64/aarch64_sve.ad index fe920d63ce5..c3c8be05732 100644 --- a/src/hotspot/cpu/aarch64/aarch64_sve.ad +++ b/src/hotspot/cpu/aarch64/aarch64_sve.ad @@ -1165,30 +1165,30 @@ instruct vnotL(vReg dst, vReg src, immL_M1 m1) %{ // vector not - predicated -instruct vnotI_masked(vReg dst, vReg src, immI_M1 m1, pRegGov pg) %{ +instruct vnotI_masked(vReg dst_src, immI_M1 m1, pRegGov pg) %{ predicate(UseSVE > 0); - match(Set dst (XorV (Binary src (ReplicateB m1)) pg)); - match(Set dst (XorV (Binary src (ReplicateS m1)) pg)); - match(Set dst (XorV (Binary src (ReplicateI m1)) pg)); + match(Set dst_src (XorV (Binary dst_src (ReplicateB m1)) pg)); + match(Set dst_src (XorV (Binary dst_src (ReplicateS m1)) pg)); + match(Set dst_src (XorV (Binary dst_src (ReplicateI m1)) pg)); ins_cost(SVE_COST); - format %{ "sve_not $dst, $pg, $src\t# vector (sve) B/H/S" %} + format %{ "sve_not $dst_src, $pg, $dst_src\t# vector (sve) B/H/S" %} ins_encode %{ BasicType bt = Matcher::vector_element_basic_type(this); - __ sve_not(as_FloatRegister($dst$$reg), __ elemType_to_regVariant(bt), - as_PRegister($pg$$reg), as_FloatRegister($src$$reg)); + __ sve_not(as_FloatRegister($dst_src$$reg), __ elemType_to_regVariant(bt), + as_PRegister($pg$$reg), as_FloatRegister($dst_src$$reg)); %} ins_pipe(pipe_slow); %} -instruct vnotL_masked(vReg dst, vReg src, immL_M1 m1, pRegGov pg) %{ +instruct vnotL_masked(vReg dst_src, immL_M1 m1, pRegGov pg) %{ predicate(UseSVE > 0); - match(Set dst (XorV (Binary src (ReplicateL m1)) pg)); + match(Set dst_src (XorV (Binary dst_src (ReplicateL m1)) pg)); ins_cost(SVE_COST); - format %{ "sve_not $dst, $pg, $src\t# vector (sve) D" %} + format %{ "sve_not $dst_src, $pg, $dst_src\t# vector (sve) D" %} ins_encode %{ BasicType bt = Matcher::vector_element_basic_type(this); - __ sve_not(as_FloatRegister($dst$$reg), __ elemType_to_regVariant(bt), - as_PRegister($pg$$reg), as_FloatRegister($src$$reg)); + __ sve_not(as_FloatRegister($dst_src$$reg), __ elemType_to_regVariant(bt), + as_PRegister($pg$$reg), as_FloatRegister($dst_src$$reg)); %} ins_pipe(pipe_slow); %} @@ -5256,18 +5256,19 @@ instruct gatherI(vReg dst, indirect mem, vReg idx) %{ ins_pipe(pipe_slow); %} -instruct gatherL(vReg dst, indirect mem, vReg idx) %{ +instruct gatherL(vReg dst, indirect mem, vReg idx, vReg tmp) %{ predicate(UseSVE > 0 && n->as_LoadVectorGather()->memory_size() == MaxVectorSize && (n->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set dst (LoadVectorGather mem idx)); + effect(TEMP tmp); ins_cost(2 * SVE_COST); format %{ "load_vector_gather $dst, $mem, $idx\t# vector load gather (D)" %} ins_encode %{ - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($tmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_ld1d_gather(as_FloatRegister($dst$$reg), ptrue, as_Register($mem$$base), - as_FloatRegister($idx$$reg)); + as_FloatRegister($tmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -5291,20 +5292,20 @@ instruct gatherI_partial(vReg dst, indirect mem, vReg idx, pRegGov ptmp, rFlagsR ins_pipe(pipe_slow); %} -instruct gatherL_partial(vReg dst, indirect mem, vReg idx, pRegGov ptmp, rFlagsReg cr) %{ +instruct gatherL_partial(vReg dst, indirect mem, vReg idx, vReg vtmp, pRegGov ptmp, rFlagsReg cr) %{ predicate(UseSVE > 0 && n->as_LoadVectorGather()->memory_size() < MaxVectorSize && (n->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set dst (LoadVectorGather mem idx)); - effect(TEMP ptmp, KILL cr); + effect(TEMP vtmp, TEMP ptmp, KILL cr); ins_cost(3 * SVE_COST + INSN_COST); format %{ "load_vector_gather $dst, $ptmp, $mem, $idx\t# vector load gather partial (D)" %} ins_encode %{ __ sve_ptrue_lanecnt(as_PRegister($ptmp$$reg), __ D, Matcher::vector_length(this)); - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($vtmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_ld1d_gather(as_FloatRegister($dst$$reg), as_PRegister($ptmp$$reg), - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($vtmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -5325,17 +5326,18 @@ instruct gatherI_masked(vReg dst, indirect mem, vReg idx, pRegGov pg) %{ ins_pipe(pipe_slow); %} -instruct gatherL_masked(vReg dst, indirect mem, vReg idx, pRegGov pg) %{ +instruct gatherL_masked(vReg dst, indirect mem, vReg idx, pRegGov pg, vReg tmp) %{ predicate(UseSVE > 0 && (n->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set dst (LoadVectorGatherMasked mem (Binary idx pg))); + effect(TEMP tmp); ins_cost(2 * SVE_COST); format %{ "load_vector_gather $dst, $pg, $mem, $idx\t# vector load gather predicated (D)" %} ins_encode %{ - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($tmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_ld1d_gather(as_FloatRegister($dst$$reg), as_PRegister($pg$$reg), - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($tmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -5357,18 +5359,19 @@ instruct scatterI(indirect mem, vReg src, vReg idx) %{ ins_pipe(pipe_slow); %} -instruct scatterL(indirect mem, vReg src, vReg idx) %{ +instruct scatterL(indirect mem, vReg src, vReg idx, vReg tmp) %{ predicate(UseSVE > 0 && n->as_StoreVectorScatter()->memory_size() == MaxVectorSize && (n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set mem (StoreVectorScatter mem (Binary src idx))); + effect(TEMP tmp); ins_cost(2 * SVE_COST); format %{ "store_vector_scatter $mem, $idx, $src\t# vector store scatter (D)" %} ins_encode %{ - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($tmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_st1d_scatter(as_FloatRegister($src$$reg), ptrue, - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($tmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -5392,20 +5395,20 @@ instruct scatterI_partial(indirect mem, vReg src, vReg idx, pRegGov ptmp, rFlags ins_pipe(pipe_slow); %} -instruct scatterL_partial(indirect mem, vReg src, vReg idx, pRegGov ptmp, rFlagsReg cr) %{ +instruct scatterL_partial(indirect mem, vReg src, vReg idx, vReg vtmp, pRegGov ptmp, rFlagsReg cr) %{ predicate(UseSVE > 0 && n->as_StoreVectorScatter()->memory_size() < MaxVectorSize && (n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set mem (StoreVectorScatter mem (Binary src idx))); - effect(TEMP ptmp, KILL cr); + effect(TEMP vtmp, TEMP ptmp, KILL cr); ins_cost(3 * SVE_COST + INSN_COST); format %{ "store_vector_scatter $mem, $ptmp, $idx, $src\t# vector store scatter partial (D)" %} ins_encode %{ __ sve_ptrue_lanecnt(as_PRegister($ptmp$$reg), __ D, Matcher::vector_length(this, $src)); - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($vtmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_st1d_scatter(as_FloatRegister($src$$reg), as_PRegister($ptmp$$reg), - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($vtmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -5426,17 +5429,18 @@ instruct scatterI_masked(indirect mem, vReg src, vReg idx, pRegGov pg) %{ ins_pipe(pipe_slow); %} -instruct scatterL_masked(indirect mem, vReg src, vReg idx, pRegGov pg) %{ +instruct scatterL_masked(indirect mem, vReg src, vReg idx, pRegGov pg, vReg tmp) %{ predicate(UseSVE > 0 && (n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set mem (StoreVectorScatterMasked mem (Binary src (Binary idx pg)))); + effect(TEMP tmp); ins_cost(2 * SVE_COST); format %{ "store_vector_scatter $mem, $pg, $idx, $src\t# vector store scatter predicated (D)" %} ins_encode %{ - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($tmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_st1d_scatter(as_FloatRegister($src$$reg), as_PRegister($pg$$reg), - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($tmp$$reg)); %} ins_pipe(pipe_slow); %} diff --git a/src/hotspot/cpu/aarch64/aarch64_sve_ad.m4 b/src/hotspot/cpu/aarch64/aarch64_sve_ad.m4 index af1c096e9aa..9a845b6a09c 100644 --- a/src/hotspot/cpu/aarch64/aarch64_sve_ad.m4 +++ b/src/hotspot/cpu/aarch64/aarch64_sve_ad.m4 @@ -659,21 +659,21 @@ dnl // vector not - predicated dnl define(`MATCH_RULE', `ifelse($1, I, -`match(Set dst (XorV (Binary src (ReplicateB m1)) pg)); - match(Set dst (XorV (Binary src (ReplicateS m1)) pg)); - match(Set dst (XorV (Binary src (ReplicateI m1)) pg));', -`match(Set dst (XorV (Binary src (ReplicateL m1)) pg));')')dnl +`match(Set dst_src (XorV (Binary dst_src (ReplicateB m1)) pg)); + match(Set dst_src (XorV (Binary dst_src (ReplicateS m1)) pg)); + match(Set dst_src (XorV (Binary dst_src (ReplicateI m1)) pg));', +`match(Set dst_src (XorV (Binary dst_src (ReplicateL m1)) pg));')')dnl dnl define(`VECTOR_NOT_PREDICATE', ` -instruct vnot$1_masked`'(vReg dst, vReg src, imm$1_M1 m1, pRegGov pg) %{ +instruct vnot$1_masked`'(vReg dst_src, imm$1_M1 m1, pRegGov pg) %{ predicate(UseSVE > 0); MATCH_RULE($1) ins_cost(SVE_COST); - format %{ "sve_not $dst, $pg, $src\t# vector (sve) $2" %} + format %{ "sve_not $dst_src, $pg, $dst_src\t# vector (sve) $2" %} ins_encode %{ BasicType bt = Matcher::vector_element_basic_type(this); - __ sve_not(as_FloatRegister($dst$$reg), __ elemType_to_regVariant(bt), - as_PRegister($pg$$reg), as_FloatRegister($src$$reg)); + __ sve_not(as_FloatRegister($dst_src$$reg), __ elemType_to_regVariant(bt), + as_PRegister($pg$$reg), as_FloatRegister($dst_src$$reg)); %} ins_pipe(pipe_slow); %}')dnl @@ -2826,18 +2826,19 @@ instruct gatherI(vReg dst, indirect mem, vReg idx) %{ ins_pipe(pipe_slow); %} -instruct gatherL(vReg dst, indirect mem, vReg idx) %{ +instruct gatherL(vReg dst, indirect mem, vReg idx, vReg tmp) %{ predicate(UseSVE > 0 && n->as_LoadVectorGather()->memory_size() == MaxVectorSize && (n->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set dst (LoadVectorGather mem idx)); + effect(TEMP tmp); ins_cost(2 * SVE_COST); format %{ "load_vector_gather $dst, $mem, $idx\t# vector load gather (D)" %} ins_encode %{ - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($tmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_ld1d_gather(as_FloatRegister($dst$$reg), ptrue, as_Register($mem$$base), - as_FloatRegister($idx$$reg)); + as_FloatRegister($tmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -2861,20 +2862,20 @@ instruct gatherI_partial(vReg dst, indirect mem, vReg idx, pRegGov ptmp, rFlagsR ins_pipe(pipe_slow); %} -instruct gatherL_partial(vReg dst, indirect mem, vReg idx, pRegGov ptmp, rFlagsReg cr) %{ +instruct gatherL_partial(vReg dst, indirect mem, vReg idx, vReg vtmp, pRegGov ptmp, rFlagsReg cr) %{ predicate(UseSVE > 0 && n->as_LoadVectorGather()->memory_size() < MaxVectorSize && (n->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set dst (LoadVectorGather mem idx)); - effect(TEMP ptmp, KILL cr); + effect(TEMP vtmp, TEMP ptmp, KILL cr); ins_cost(3 * SVE_COST + INSN_COST); format %{ "load_vector_gather $dst, $ptmp, $mem, $idx\t# vector load gather partial (D)" %} ins_encode %{ __ sve_ptrue_lanecnt(as_PRegister($ptmp$$reg), __ D, Matcher::vector_length(this)); - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($vtmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_ld1d_gather(as_FloatRegister($dst$$reg), as_PRegister($ptmp$$reg), - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($vtmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -2895,17 +2896,18 @@ instruct gatherI_masked(vReg dst, indirect mem, vReg idx, pRegGov pg) %{ ins_pipe(pipe_slow); %} -instruct gatherL_masked(vReg dst, indirect mem, vReg idx, pRegGov pg) %{ +instruct gatherL_masked(vReg dst, indirect mem, vReg idx, pRegGov pg, vReg tmp) %{ predicate(UseSVE > 0 && (n->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set dst (LoadVectorGatherMasked mem (Binary idx pg))); + effect(TEMP tmp); ins_cost(2 * SVE_COST); format %{ "load_vector_gather $dst, $pg, $mem, $idx\t# vector load gather predicated (D)" %} ins_encode %{ - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($tmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_ld1d_gather(as_FloatRegister($dst$$reg), as_PRegister($pg$$reg), - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($tmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -2927,18 +2929,19 @@ instruct scatterI(indirect mem, vReg src, vReg idx) %{ ins_pipe(pipe_slow); %} -instruct scatterL(indirect mem, vReg src, vReg idx) %{ +instruct scatterL(indirect mem, vReg src, vReg idx, vReg tmp) %{ predicate(UseSVE > 0 && n->as_StoreVectorScatter()->memory_size() == MaxVectorSize && (n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set mem (StoreVectorScatter mem (Binary src idx))); + effect(TEMP tmp); ins_cost(2 * SVE_COST); format %{ "store_vector_scatter $mem, $idx, $src\t# vector store scatter (D)" %} ins_encode %{ - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($tmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_st1d_scatter(as_FloatRegister($src$$reg), ptrue, - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($tmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -2962,20 +2965,20 @@ instruct scatterI_partial(indirect mem, vReg src, vReg idx, pRegGov ptmp, rFlags ins_pipe(pipe_slow); %} -instruct scatterL_partial(indirect mem, vReg src, vReg idx, pRegGov ptmp, rFlagsReg cr) %{ +instruct scatterL_partial(indirect mem, vReg src, vReg idx, vReg vtmp, pRegGov ptmp, rFlagsReg cr) %{ predicate(UseSVE > 0 && n->as_StoreVectorScatter()->memory_size() < MaxVectorSize && (n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set mem (StoreVectorScatter mem (Binary src idx))); - effect(TEMP ptmp, KILL cr); + effect(TEMP vtmp, TEMP ptmp, KILL cr); ins_cost(3 * SVE_COST + INSN_COST); format %{ "store_vector_scatter $mem, $ptmp, $idx, $src\t# vector store scatter partial (D)" %} ins_encode %{ __ sve_ptrue_lanecnt(as_PRegister($ptmp$$reg), __ D, Matcher::vector_length(this, $src)); - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($vtmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_st1d_scatter(as_FloatRegister($src$$reg), as_PRegister($ptmp$$reg), - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($vtmp$$reg)); %} ins_pipe(pipe_slow); %} @@ -2996,17 +2999,18 @@ instruct scatterI_masked(indirect mem, vReg src, vReg idx, pRegGov pg) %{ ins_pipe(pipe_slow); %} -instruct scatterL_masked(indirect mem, vReg src, vReg idx, pRegGov pg) %{ +instruct scatterL_masked(indirect mem, vReg src, vReg idx, pRegGov pg, vReg tmp) %{ predicate(UseSVE > 0 && (n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_LONG || n->in(3)->in(1)->bottom_type()->is_vect()->element_basic_type() == T_DOUBLE)); match(Set mem (StoreVectorScatterMasked mem (Binary src (Binary idx pg)))); + effect(TEMP tmp); ins_cost(2 * SVE_COST); format %{ "store_vector_scatter $mem, $pg, $idx, $src\t# vector store scatter predicated (D)" %} ins_encode %{ - __ sve_uunpklo(as_FloatRegister($idx$$reg), __ D, as_FloatRegister($idx$$reg)); + __ sve_uunpklo(as_FloatRegister($tmp$$reg), __ D, as_FloatRegister($idx$$reg)); __ sve_st1d_scatter(as_FloatRegister($src$$reg), as_PRegister($pg$$reg), - as_Register($mem$$base), as_FloatRegister($idx$$reg)); + as_Register($mem$$base), as_FloatRegister($tmp$$reg)); %} ins_pipe(pipe_slow); %} diff --git a/src/hotspot/share/jfr/jni/jfrJniMethod.cpp b/src/hotspot/share/jfr/jni/jfrJniMethod.cpp index d085e738c1d..a6788b7fcb6 100644 --- a/src/hotspot/share/jfr/jni/jfrJniMethod.cpp +++ b/src/hotspot/share/jfr/jni/jfrJniMethod.cpp @@ -61,6 +61,10 @@ #include "runtime/thread.hpp" #include "utilities/debug.hpp" +#ifdef LINUX +#include "osContainer_linux.hpp" +#endif + #define NO_TRANSITION(result_type, header) extern "C" { result_type JNICALL header { #define NO_TRANSITION_END } } @@ -381,3 +385,11 @@ JVM_END JVM_ENTRY_NO_ENV(jboolean, jfr_is_class_instrumented(JNIEnv* env, jobject jvm, jclass clazz)) return JfrJavaSupport::is_instrumented(clazz, thread); JVM_END + +JVM_ENTRY_NO_ENV(jboolean, jfr_is_containerized(JNIEnv* env, jobject jvm)) +#ifdef LINUX + return OSContainer::is_containerized(); +#else + return false; +#endif +JVM_END diff --git a/src/hotspot/share/jfr/jni/jfrJniMethod.hpp b/src/hotspot/share/jfr/jni/jfrJniMethod.hpp index cc6c728a30f..2fcadb1c357 100644 --- a/src/hotspot/share/jfr/jni/jfrJniMethod.hpp +++ b/src/hotspot/share/jfr/jni/jfrJniMethod.hpp @@ -158,9 +158,10 @@ jboolean JNICALL jfr_is_class_excluded(JNIEnv* env, jobject jvm, jclass clazz); jboolean JNICALL jfr_is_class_instrumented(JNIEnv* env, jobject jvm, jclass clazz); +jboolean JNICALL jfr_is_containerized(JNIEnv* env, jobject jvm); + #ifdef __cplusplus } #endif #endif // SHARE_JFR_JNI_JFRJNIMETHOD_HPP - diff --git a/src/hotspot/share/jfr/jni/jfrJniMethodRegistration.cpp b/src/hotspot/share/jfr/jni/jfrJniMethodRegistration.cpp index 8b0604eedd9..b71224c6589 100644 --- a/src/hotspot/share/jfr/jni/jfrJniMethodRegistration.cpp +++ b/src/hotspot/share/jfr/jni/jfrJniMethodRegistration.cpp @@ -93,7 +93,8 @@ JfrJniMethodRegistration::JfrJniMethodRegistration(JNIEnv* env) { (char*)"setConfiguration", (char*)"(Ljava/lang/Class;Ljdk/jfr/internal/event/EventConfiguration;)Z", (void*)jfr_set_configuration, (char*)"getTypeId", (char*)"(Ljava/lang/String;)J", (void*)jfr_get_type_id_from_string, (char*)"isExcluded", (char*)"(Ljava/lang/Class;)Z", (void*)jfr_is_class_excluded, - (char*)"isInstrumented", (char*)"(Ljava/lang/Class;)Z", (void*) jfr_is_class_instrumented + (char*)"isInstrumented", (char*)"(Ljava/lang/Class;)Z", (void*) jfr_is_class_instrumented, + (char*)"isContainerized", (char*)"()Z", (void*) jfr_is_containerized }; const size_t method_array_length = sizeof(method) / sizeof(JNINativeMethod); diff --git a/src/hotspot/share/opto/mulnode.cpp b/src/hotspot/share/opto/mulnode.cpp index cc204897f91..9f2fb9a3d1a 100644 --- a/src/hotspot/share/opto/mulnode.cpp +++ b/src/hotspot/share/opto/mulnode.cpp @@ -813,6 +813,8 @@ Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { // Left input is an add of the same number? if (add1->in(1) == add1->in(2)) { // Convert "(x + x) << c0" into "x << (c0 + 1)" + // In general, this optimization cannot be applied for c0 == 31 since + // 2x << 31 != x << 32 = x << 0 = x (e.g. x = 1: 2 << 31 = 0 != 1) return new LShiftINode(add1->in(1), phase->intcon(con + 1)); } @@ -930,8 +932,13 @@ Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) { assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" ); // Left input is an add of the same number? - if (add1->in(1) == add1->in(2)) { + if (con != (BitsPerJavaLong - 1) && add1->in(1) == add1->in(2)) { // Convert "(x + x) << c0" into "x << (c0 + 1)" + // Can only be applied if c0 != 63 because: + // (x + x) << 63 = 2x << 63, while + // (x + x) << 63 --transform--> x << 64 = x << 0 = x (!= 2x << 63, for example for x = 1) + // According to the Java spec, chapter 15.19, we only consider the six lowest-order bits of the right-hand operand + // (i.e. "right-hand operand" & 0b111111). Therefore, x << 64 is the same as x << 0 (64 = 0b10000000 & 0b0111111 = 0). return new LShiftLNode(add1->in(1), phase->intcon(con + 1)); } diff --git a/src/java.base/share/classes/java/util/zip/package-info.java b/src/java.base/share/classes/java/util/zip/package-info.java index f4a38d6b026..8f46fdb9edb 100644 --- a/src/java.base/share/classes/java/util/zip/package-info.java +++ b/src/java.base/share/classes/java/util/zip/package-info.java @@ -1,5 +1,5 @@ /* - * Copyright (c) 1998, 2017, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 1998, 2022, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -39,12 +39,12 @@ * are based. *
+ * If -XX:-UseContainerSupport has been specified, this method returns {@code false},
+ * which is questionable, but Container.metrics() returns {@code null}, so events
+ * can't be emitted anyway.
+ */
+ public native boolean isContainerized();
}
diff --git a/src/jdk.jfr/share/classes/jdk/jfr/internal/JVMUpcalls.java b/src/jdk.jfr/share/classes/jdk/jfr/internal/JVMUpcalls.java
index ca97b4dbd33..23a9936746c 100644
--- a/src/jdk.jfr/share/classes/jdk/jfr/internal/JVMUpcalls.java
+++ b/src/jdk.jfr/share/classes/jdk/jfr/internal/JVMUpcalls.java
@@ -59,6 +59,10 @@ final class JVMUpcalls {
static byte[] onRetransform(long traceId, boolean dummy1, boolean dummy2, Class> clazz, byte[] oldBytes) throws Throwable {
try {
if (jdk.internal.event.Event.class.isAssignableFrom(clazz) && !Modifier.isAbstract(clazz.getModifiers())) {
+ if (!Utils.shouldInstrument(clazz.getClassLoader() == null, clazz.getName())) {
+ Logger.log(LogTag.JFR_SYSTEM, LogLevel.INFO, "Skipping instrumentation for " + clazz.getName() + " since container support is missing");
+ return oldBytes;
+ }
EventWriterKey.ensureEventWriterFactory();
EventConfiguration configuration = Utils.getConfiguration(clazz.asSubclass(jdk.internal.event.Event.class));
if (configuration == null) {
@@ -103,6 +107,10 @@ final class JVMUpcalls {
try {
EventInstrumentation ei = new EventInstrumentation(superClass, oldBytes, traceId, bootClassLoader, true);
eventName = ei.getEventName();
+ if (!Utils.shouldInstrument(bootClassLoader, ei.getEventName())) {
+ Logger.log(LogTag.JFR_SYSTEM, LogLevel.INFO, "Skipping instrumentation for " + eventName + " since container support is missing");
+ return oldBytes;
+ }
if (!forceInstrumentation) {
// Assume we are recording
MetadataRepository mr = MetadataRepository.getInstance();
diff --git a/src/jdk.jfr/share/classes/jdk/jfr/internal/MetadataRepository.java b/src/jdk.jfr/share/classes/jdk/jfr/internal/MetadataRepository.java
index 2ebbf1c4c8a..9dc06292981 100644
--- a/src/jdk.jfr/share/classes/jdk/jfr/internal/MetadataRepository.java
+++ b/src/jdk.jfr/share/classes/jdk/jfr/internal/MetadataRepository.java
@@ -218,7 +218,8 @@ public final class MetadataRepository {
EventConfiguration configuration = newEventConfiguration(eventType, ec, settings);
PlatformEventType pe = configuration.getPlatformEventType();
pe.setRegistered(true);
- if (jvm.isInstrumented(eventClass)) {
+ // If class is instrumented or should not be instrumented, mark as instrumented.
+ if (jvm.isInstrumented(eventClass) || !Utils.shouldInstrument(pe.isJDK(), pe.getName())) {
pe.setInstrumented();
}
Utils.setConfiguration(eventClass, configuration);
diff --git a/src/jdk.jfr/share/classes/jdk/jfr/internal/Utils.java b/src/jdk.jfr/share/classes/jdk/jfr/internal/Utils.java
index 367cc6a0a30..22eeca56a85 100644
--- a/src/jdk.jfr/share/classes/jdk/jfr/internal/Utils.java
+++ b/src/jdk.jfr/share/classes/jdk/jfr/internal/Utils.java
@@ -96,7 +96,6 @@ public final class Utils {
* This field will be lazily initialized and the access is not synchronized.
* The possible data race is benign and is worth of not introducing any contention here.
*/
- private static Metrics[] metrics;
private static Instant lastTimestamp;
public static void checkAccessFlightRecorder() throws SecurityException {
@@ -700,18 +699,15 @@ public final class Utils {
}
}
- public static boolean shouldSkipBytecode(String eventName, Class> superClass) {
- if (superClass.getClassLoader() != null || !superClass.getName().equals("jdk.jfr.events.AbstractJDKEvent")) {
- return false;
+ public static boolean shouldInstrument(boolean isJDK, String name) {
+ if (!isJDK) {
+ return true;
}
- return eventName.startsWith("jdk.Container") && getMetrics() == null;
- }
-
- private static Metrics getMetrics() {
- if (metrics == null) {
- metrics = new Metrics[]{Metrics.systemMetrics()};
+ if (!name.contains(".Container")) {
+ // Didn't match @Name("jdk.jfr.Container*") or class name "jdk.jfr.events.Container*"
+ return true;
}
- return metrics[0];
+ return JVM.getJVM().isContainerized();
}
private static String formatPositiveDuration(Duration d){
diff --git a/src/jdk.jfr/share/classes/jdk/jfr/internal/dcmd/DCmdStart.java b/src/jdk.jfr/share/classes/jdk/jfr/internal/dcmd/DCmdStart.java
index 5d7f70c2a34..cd9bb0c9d1f 100644
--- a/src/jdk.jfr/share/classes/jdk/jfr/internal/dcmd/DCmdStart.java
+++ b/src/jdk.jfr/share/classes/jdk/jfr/internal/dcmd/DCmdStart.java
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012, 2021, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2022, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -24,7 +24,6 @@
*/
package jdk.jfr.internal.dcmd;
-import java.io.FileNotFoundException;
import java.io.IOException;
import java.nio.file.Files;
import java.nio.file.InvalidPathException;
@@ -32,7 +31,6 @@ import java.nio.file.Path;
import java.nio.file.Paths;
import java.text.ParseException;
import java.time.Duration;
-import java.util.ArrayList;
import java.util.HashSet;
import java.util.LinkedHashMap;
import java.util.List;
@@ -53,6 +51,7 @@ import jdk.jfr.internal.SecuritySupport;
import jdk.jfr.internal.Type;
import jdk.jfr.internal.jfc.JFC;
import jdk.jfr.internal.jfc.model.JFCModel;
+import jdk.jfr.internal.jfc.model.JFCModelException;
import jdk.jfr.internal.jfc.model.XmlInput;
/**
@@ -229,22 +228,23 @@ final class DCmdStart extends AbstractDCmd {
for (String configName : settings) {
try {
s.putAll(JFC.createKnown(configName).getSettings());
- } catch(FileNotFoundException e) {
- throw new DCmdException("Could not find settings file'" + configName + "'", e);
- } catch (IOException | ParseException e) {
- throw new DCmdException("Could not parse settings file '" + settings[0] + "'", e);
+ } catch (InvalidPathException | IOException | ParseException e) {
+ throw new DCmdException(JFC.formatException("Could not", e, configName), e);
}
}
return s;
}
private LinkedHashMap