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7056380: VM crashes with SIGSEGV in compiled code

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Code was using andq reg, imm instead of addq addr, imm

Reviewed-by: kvn, jrose, twisti
This commit is contained in:
Tom Rodriguez 2011-06-21 09:04:55 -07:00
parent d19a8f6e35
commit 7c1d16f7d3
3 changed files with 25 additions and 35 deletions
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8
hotspot/src/cpu/x86/vm/assembler_x86.cpp
View file

@ -3804,6 +3804,14 @@ void Assembler::addq(Register dst, Register src) {
emit_arith(0x03, 0xC0, dst, src); emit_arith(0x03, 0xC0, dst, src);
} }
void Assembler::andq(Address dst, int32_t imm32) {
InstructionMark im(this);
prefixq(dst);
emit_byte(0x81);
emit_operand(rsp, dst, 4);
emit_long(imm32);
}
void Assembler::andq(Register dst, int32_t imm32) { void Assembler::andq(Register dst, int32_t imm32) {
(void) prefixq_and_encode(dst->encoding()); (void) prefixq_and_encode(dst->encoding());
emit_arith(0x81, 0xE0, dst, imm32); emit_arith(0x81, 0xE0, dst, imm32);

1
hotspot/src/cpu/x86/vm/assembler_x86.hpp
View file

@ -779,6 +779,7 @@ private:
void andl(Register dst, Address src); void andl(Register dst, Address src);
void andl(Register dst, Register src); void andl(Register dst, Register src);
void andq(Address dst, int32_t imm32);
void andq(Register dst, int32_t imm32); void andq(Register dst, int32_t imm32);
void andq(Register dst, Address src); void andq(Register dst, Address src);
void andq(Register dst, Register src); void andq(Register dst, Register src);

51
hotspot/src/cpu/x86/vm/x86_64.ad
View file

@ -830,6 +830,17 @@ void encode_CopyXD( CodeBuffer &cbuf, int dst_encoding, int src_encoding ) {
} }
} }
// This could be in MacroAssembler but it's fairly C2 specific
void emit_cmpfp_fixup(MacroAssembler& _masm) {
Label exit;
__ jccb(Assembler::noParity, exit);
__ pushf();
__ andq(Address(rsp, 0), 0xffffff2b);
__ popf();
__ bind(exit);
__ nop(); // (target for branch to avoid branch to branch)
}
//============================================================================= //=============================================================================
const bool Matcher::constant_table_absolute_addressing = true; const bool Matcher::constant_table_absolute_addressing = true;
@ -2173,27 +2184,9 @@ encode %{
emit_rm(cbuf, 0x3, $dst$$reg & 7, $src$$reg & 7); emit_rm(cbuf, 0x3, $dst$$reg & 7, $src$$reg & 7);
%} %}
enc_class cmpfp_fixup() enc_class cmpfp_fixup() %{
%{ MacroAssembler _masm(&cbuf);
// jnp,s exit emit_cmpfp_fixup(_masm);
emit_opcode(cbuf, 0x7B);
emit_d8(cbuf, 0x0A);
// pushfq
emit_opcode(cbuf, 0x9C);
// andq $0xffffff2b, (%rsp)
emit_opcode(cbuf, Assembler::REX_W);
emit_opcode(cbuf, 0x81);
emit_opcode(cbuf, 0x24);
emit_opcode(cbuf, 0x24);
emit_d32(cbuf, 0xffffff2b);
// popfq
emit_opcode(cbuf, 0x9D);
// nop (target for branch to avoid branch to branch)
emit_opcode(cbuf, 0x90);
%} %}
enc_class cmpfp3(rRegI dst) enc_class cmpfp3(rRegI dst)
@ -10253,14 +10246,8 @@ instruct cmpF_cc_imm(rFlagsRegU cr, regF src, immF con) %{
"popfq\n" "popfq\n"
"exit: nop\t# avoid branch to branch" %} "exit: nop\t# avoid branch to branch" %}
ins_encode %{ ins_encode %{
Label L_exit;
__ ucomiss($src$$XMMRegister, $constantaddress($con)); __ ucomiss($src$$XMMRegister, $constantaddress($con));
__ jcc(Assembler::noParity, L_exit); emit_cmpfp_fixup(_masm);
__ pushf();
__ andq(rsp, 0xffffff2b);
__ popf();
__ bind(L_exit);
__ nop();
%} %}
ins_pipe(pipe_slow); ins_pipe(pipe_slow);
%} %}
@ -10341,14 +10328,8 @@ instruct cmpD_cc_imm(rFlagsRegU cr, regD src, immD con) %{
"popfq\n" "popfq\n"
"exit: nop\t# avoid branch to branch" %} "exit: nop\t# avoid branch to branch" %}
ins_encode %{ ins_encode %{
Label L_exit;
__ ucomisd($src$$XMMRegister, $constantaddress($con)); __ ucomisd($src$$XMMRegister, $constantaddress($con));
__ jcc(Assembler::noParity, L_exit); emit_cmpfp_fixup(_masm);
__ pushf();
__ andq(rsp, 0xffffff2b);
__ popf();
__ bind(L_exit);
__ nop();
%} %}
ins_pipe(pipe_slow); ins_pipe(pipe_slow);
%} %}