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6518907: cleanup IA64 specific code in Hotspot
Removed unused IA64 specific code Reviewed-by: twisti, kvn, dholmes
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parent
89b8658977
commit
7d8f623180
11 changed files with 171 additions and 212 deletions
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@ -349,6 +349,33 @@ address os::current_stack_base() {
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#ifdef _M_IA64
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// IA64 has memory and register stacks
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//
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// This is the stack layout you get on NT/IA64 if you specify 1MB stack limit
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// at thread creation (1MB backing store growing upwards, 1MB memory stack
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// growing downwards, 2MB summed up)
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//
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// ...
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// ------- top of stack (high address) -----
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// |
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// | 1MB
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// | Backing Store (Register Stack)
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// |
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// | / \
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// | |
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// | |
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// | |
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// ------------------------ stack base -----
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// | 1MB
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// | Memory Stack
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// |
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// | |
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// | |
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// | |
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// | \ /
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// |
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// ----- bottom of stack (low address) -----
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// ...
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stack_size = stack_size / 2;
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#endif
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return stack_bottom + stack_size;
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@ -2005,17 +2032,34 @@ LONG Handle_Exception(struct _EXCEPTION_POINTERS* exceptionInfo, address handler
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JavaThread* thread = JavaThread::current();
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// Save pc in thread
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#ifdef _M_IA64
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thread->set_saved_exception_pc((address)exceptionInfo->ContextRecord->StIIP);
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// Do not blow up if no thread info available.
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if (thread) {
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// Saving PRECISE pc (with slot information) in thread.
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uint64_t precise_pc = (uint64_t) exceptionInfo->ExceptionRecord->ExceptionAddress;
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// Convert precise PC into "Unix" format
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precise_pc = (precise_pc & 0xFFFFFFFFFFFFFFF0) | ((precise_pc & 0xF) >> 2);
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thread->set_saved_exception_pc((address)precise_pc);
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}
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// Set pc to handler
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exceptionInfo->ContextRecord->StIIP = (DWORD64)handler;
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// Clear out psr.ri (= Restart Instruction) in order to continue
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// at the beginning of the target bundle.
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exceptionInfo->ContextRecord->StIPSR &= 0xFFFFF9FFFFFFFFFF;
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assert(((DWORD64)handler & 0xF) == 0, "Target address must point to the beginning of a bundle!");
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#elif _M_AMD64
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thread->set_saved_exception_pc((address)exceptionInfo->ContextRecord->Rip);
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// Do not blow up if no thread info available.
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if (thread) {
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thread->set_saved_exception_pc((address)(DWORD_PTR)exceptionInfo->ContextRecord->Rip);
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}
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// Set pc to handler
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exceptionInfo->ContextRecord->Rip = (DWORD64)handler;
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#else
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thread->set_saved_exception_pc((address)exceptionInfo->ContextRecord->Eip);
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// Do not blow up if no thread info available.
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if (thread) {
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thread->set_saved_exception_pc((address)(DWORD_PTR)exceptionInfo->ContextRecord->Eip);
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}
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// Set pc to handler
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exceptionInfo->ContextRecord->Eip = (LONG)handler;
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exceptionInfo->ContextRecord->Eip = (DWORD)(DWORD_PTR)handler;
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#endif
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// Continue the execution
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@ -2040,6 +2084,14 @@ extern "C" void events();
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// included or copied here.
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#define EXCEPTION_INFO_EXEC_VIOLATION 0x08
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// Handle NAT Bit consumption on IA64.
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#ifdef _M_IA64
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#define EXCEPTION_REG_NAT_CONSUMPTION STATUS_REG_NAT_CONSUMPTION
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#endif
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// Windows Vista/2008 heap corruption check
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#define EXCEPTION_HEAP_CORRUPTION 0xC0000374
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#define def_excpt(val) #val, val
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struct siglabel {
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@ -2082,6 +2134,10 @@ struct siglabel exceptlabels[] = {
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def_excpt(EXCEPTION_GUARD_PAGE),
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def_excpt(EXCEPTION_INVALID_HANDLE),
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def_excpt(EXCEPTION_UNCAUGHT_CXX_EXCEPTION),
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def_excpt(EXCEPTION_HEAP_CORRUPTION),
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#ifdef _M_IA64
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def_excpt(EXCEPTION_REG_NAT_CONSUMPTION),
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#endif
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NULL, 0
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};
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@ -2206,7 +2262,14 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
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if (InterceptOSException) return EXCEPTION_CONTINUE_SEARCH;
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DWORD exception_code = exceptionInfo->ExceptionRecord->ExceptionCode;
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#ifdef _M_IA64
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address pc = (address) exceptionInfo->ContextRecord->StIIP;
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// On Itanium, we need the "precise pc", which has the slot number coded
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// into the least 4 bits: 0000=slot0, 0100=slot1, 1000=slot2 (Windows format).
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address pc = (address) exceptionInfo->ExceptionRecord->ExceptionAddress;
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// Convert the pc to "Unix format", which has the slot number coded
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// into the least 2 bits: 0000=slot0, 0001=slot1, 0010=slot2
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// This is needed for IA64 because "relocation" / "implicit null check" / "poll instruction"
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// information is saved in the Unix format.
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address pc_unix_format = (address) ((((uint64_t)pc) & 0xFFFFFFFFFFFFFFF0) | ((((uint64_t)pc) & 0xF) >> 2));
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#elif _M_AMD64
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address pc = (address) exceptionInfo->ContextRecord->Rip;
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#else
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@ -2321,29 +2384,40 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
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if (exception_code == EXCEPTION_STACK_OVERFLOW) {
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if (os::uses_stack_guard_pages()) {
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#ifdef _M_IA64
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//
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// If it's a legal stack address continue, Windows will map it in.
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//
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// Use guard page for register stack.
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PEXCEPTION_RECORD exceptionRecord = exceptionInfo->ExceptionRecord;
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address addr = (address) exceptionRecord->ExceptionInformation[1];
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if (addr > thread->stack_yellow_zone_base() && addr < thread->stack_base() )
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return EXCEPTION_CONTINUE_EXECUTION;
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// Check for a register stack overflow on Itanium
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if (thread->addr_inside_register_stack_red_zone(addr)) {
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// Fatal red zone violation happens if the Java program
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// catches a StackOverflow error and does so much processing
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// that it runs beyond the unprotected yellow guard zone. As
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// a result, we are out of here.
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fatal("ERROR: Unrecoverable stack overflow happened. JVM will exit.");
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} else if(thread->addr_inside_register_stack(addr)) {
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// Disable the yellow zone which sets the state that
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// we've got a stack overflow problem.
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if (thread->stack_yellow_zone_enabled()) {
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thread->disable_stack_yellow_zone();
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}
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// Give us some room to process the exception.
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thread->disable_register_stack_guard();
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// Tracing with +Verbose.
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if (Verbose) {
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tty->print_cr("SOF Compiled Register Stack overflow at " INTPTR_FORMAT " (SIGSEGV)", pc);
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tty->print_cr("Register Stack access at " INTPTR_FORMAT, addr);
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tty->print_cr("Register Stack base " INTPTR_FORMAT, thread->register_stack_base());
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tty->print_cr("Register Stack [" INTPTR_FORMAT "," INTPTR_FORMAT "]",
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thread->register_stack_base(),
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thread->register_stack_base() + thread->stack_size());
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}
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// The register save area is the same size as the memory stack
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// and starts at the page just above the start of the memory stack.
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// If we get a fault in this area, we've run out of register
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// stack. If we are in java, try throwing a stack overflow exception.
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if (addr > thread->stack_base() &&
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addr <= (thread->stack_base()+thread->stack_size()) ) {
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char buf[256];
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jio_snprintf(buf, sizeof(buf),
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"Register stack overflow, addr:%p, stack_base:%p\n",
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addr, thread->stack_base() );
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tty->print_raw_cr(buf);
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// If not in java code, return and hope for the best.
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return in_java ? Handle_Exception(exceptionInfo,
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SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW))
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: EXCEPTION_CONTINUE_EXECUTION;
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// Reguard the permanent register stack red zone just to be sure.
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// We saw Windows silently disabling this without telling us.
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thread->enable_register_stack_red_zone();
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return Handle_Exception(exceptionInfo,
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SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW));
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}
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#endif
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if (thread->stack_yellow_zone_enabled()) {
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@ -2418,50 +2492,33 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
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{
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// Null pointer exception.
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#ifdef _M_IA64
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// We catch register stack overflows in compiled code by doing
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// an explicit compare and executing a st8(G0, G0) if the
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// BSP enters into our guard area. We test for the overflow
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// condition and fall into the normal null pointer exception
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// code if BSP hasn't overflowed.
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if ( in_java ) {
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if(thread->register_stack_overflow()) {
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assert((address)exceptionInfo->ContextRecord->IntS3 ==
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thread->register_stack_limit(),
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"GR7 doesn't contain register_stack_limit");
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// Disable the yellow zone which sets the state that
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// we've got a stack overflow problem.
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if (thread->stack_yellow_zone_enabled()) {
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thread->disable_stack_yellow_zone();
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// Process implicit null checks in compiled code. Note: Implicit null checks
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// can happen even if "ImplicitNullChecks" is disabled, e.g. in vtable stubs.
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if (CodeCache::contains((void*) pc_unix_format) && !MacroAssembler::needs_explicit_null_check((intptr_t) addr)) {
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CodeBlob *cb = CodeCache::find_blob_unsafe(pc_unix_format);
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// Handle implicit null check in UEP method entry
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if (cb && (cb->is_frame_complete_at(pc) ||
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(cb->is_nmethod() && ((nmethod *)cb)->inlinecache_check_contains(pc)))) {
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if (Verbose) {
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intptr_t *bundle_start = (intptr_t*) ((intptr_t) pc_unix_format & 0xFFFFFFFFFFFFFFF0);
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tty->print_cr("trap: null_check at " INTPTR_FORMAT " (SIGSEGV)", pc_unix_format);
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tty->print_cr(" to addr " INTPTR_FORMAT, addr);
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tty->print_cr(" bundle is " INTPTR_FORMAT " (high), " INTPTR_FORMAT " (low)",
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*(bundle_start + 1), *bundle_start);
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}
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// Give us some room to process the exception
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thread->disable_register_stack_guard();
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// Update GR7 with the new limit so we can continue running
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// compiled code.
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exceptionInfo->ContextRecord->IntS3 =
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(ULONGLONG)thread->register_stack_limit();
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return Handle_Exception(exceptionInfo,
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SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW));
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} else {
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//
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// Check for implicit null
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// We only expect null pointers in the stubs (vtable)
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// the rest are checked explicitly now.
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//
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if (((uintptr_t)addr) < os::vm_page_size() ) {
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// an access to the first page of VM--assume it is a null pointer
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address stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
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if (stub != NULL) return Handle_Exception(exceptionInfo, stub);
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}
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SharedRuntime::continuation_for_implicit_exception(thread, pc_unix_format, SharedRuntime::IMPLICIT_NULL));
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}
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} // in_java
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}
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// IA64 doesn't use implicit null checking yet. So we shouldn't
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// get here.
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tty->print_raw_cr("Access violation, possible null pointer exception");
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// Implicit null checks were processed above. Hence, we should not reach
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// here in the usual case => die!
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if (Verbose) tty->print_raw_cr("Access violation, possible null pointer exception");
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report_error(t, exception_code, pc, exceptionInfo->ExceptionRecord,
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exceptionInfo->ContextRecord);
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return EXCEPTION_CONTINUE_SEARCH;
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#else /* !IA64 */
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#else // !IA64
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// Windows 98 reports faulting addresses incorrectly
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if (!MacroAssembler::needs_explicit_null_check((intptr_t)addr) ||
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@ -2493,7 +2550,24 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
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report_error(t, exception_code, pc, exceptionInfo->ExceptionRecord,
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exceptionInfo->ContextRecord);
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return EXCEPTION_CONTINUE_SEARCH;
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}
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} // /EXCEPTION_ACCESS_VIOLATION
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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#if defined _M_IA64
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else if ((exception_code == EXCEPTION_ILLEGAL_INSTRUCTION ||
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exception_code == EXCEPTION_ILLEGAL_INSTRUCTION_2)) {
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M37 handle_wrong_method_break(0, NativeJump::HANDLE_WRONG_METHOD, PR0);
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// Compiled method patched to be non entrant? Following conditions must apply:
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// 1. must be first instruction in bundle
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// 2. must be a break instruction with appropriate code
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if((((uint64_t) pc & 0x0F) == 0) &&
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(((IPF_Bundle*) pc)->get_slot0() == handle_wrong_method_break.bits())) {
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return Handle_Exception(exceptionInfo,
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(address)SharedRuntime::get_handle_wrong_method_stub());
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}
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} // /EXCEPTION_ILLEGAL_INSTRUCTION
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#endif
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if (in_java) {
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switch (exception_code) {
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