mirror of
https://github.com/openjdk/jdk.git
synced 2025-08-26 14:24:46 +02:00
6518907: cleanup IA64 specific code in Hotspot
Removed unused IA64 specific code Reviewed-by: twisti, kvn, dholmes
This commit is contained in:
parent
89b8658977
commit
7d8f623180
11 changed files with 171 additions and 212 deletions
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@ -280,7 +280,7 @@ JNIEXPORT jbyteArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo
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return (err == PS_OK)? array : 0;
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return (err == PS_OK)? array : 0;
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}
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}
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#if defined(i386) || defined(ia64) || defined(amd64) || defined(sparc) || defined(sparcv9)
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#if defined(i386) || defined(amd64) || defined(sparc) || defined(sparcv9)
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JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0
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JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLocal_getThreadIntegerRegisterSet0
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(JNIEnv *env, jobject this_obj, jint lwp_id) {
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(JNIEnv *env, jobject this_obj, jint lwp_id) {
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@ -299,9 +299,6 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo
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#ifdef i386
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#ifdef i386
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#define NPRGREG sun_jvm_hotspot_debugger_x86_X86ThreadContext_NPRGREG
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#define NPRGREG sun_jvm_hotspot_debugger_x86_X86ThreadContext_NPRGREG
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#endif
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#endif
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#ifdef ia64
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#define NPRGREG IA64_REG_COUNT
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#endif
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#ifdef amd64
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#ifdef amd64
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#define NPRGREG sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_NPRGREG
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#define NPRGREG sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_NPRGREG
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#endif
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#endif
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@ -336,13 +333,6 @@ JNIEXPORT jlongArray JNICALL Java_sun_jvm_hotspot_debugger_linux_LinuxDebuggerLo
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#endif /* i386 */
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#endif /* i386 */
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#if ia64
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regs = (*env)->GetLongArrayElements(env, array, &isCopy);
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for (i = 0; i < NPRGREG; i++ ) {
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regs[i] = 0xDEADDEAD;
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}
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#endif /* ia64 */
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#ifdef amd64
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#ifdef amd64
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#define REG_INDEX(reg) sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_##reg
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#define REG_INDEX(reg) sun_jvm_hotspot_debugger_amd64_AMD64ThreadContext_##reg
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@ -79,14 +79,6 @@ combination of ptrace and /proc calls.
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*************************************************************************************/
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*************************************************************************************/
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#ifdef ia64
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struct user_regs_struct {
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/* copied from user.h which doesn't define this in a struct */
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#define IA64_REG_COUNT (EF_SIZE/8+32) /* integer and fp regs */
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unsigned long regs[IA64_REG_COUNT]; /* integer and fp regs */
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};
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#endif
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#if defined(sparc) || defined(sparcv9)
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#if defined(sparc) || defined(sparcv9)
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#define user_regs_struct pt_regs
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#define user_regs_struct pt_regs
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@ -27,10 +27,7 @@
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#include "sun_jvm_hotspot_debugger_windbg_WindbgDebuggerLocal.h"
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#include "sun_jvm_hotspot_debugger_windbg_WindbgDebuggerLocal.h"
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#ifdef _M_IA64
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#ifdef _M_IX86
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#include "sun_jvm_hotspot_debugger_ia64_IA64ThreadContext.h"
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#define NPRGREG sun_jvm_hotspot_debugger_ia64_IA64ThreadContext_NPRGREG
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#elif _M_IX86
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#include "sun_jvm_hotspot_debugger_x86_X86ThreadContext.h"
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#include "sun_jvm_hotspot_debugger_x86_X86ThreadContext.h"
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#define NPRGREG sun_jvm_hotspot_debugger_x86_X86ThreadContext_NPRGREG
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#define NPRGREG sun_jvm_hotspot_debugger_x86_X86ThreadContext_NPRGREG
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#elif _M_AMD64
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#elif _M_AMD64
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@ -491,92 +488,7 @@ static bool addThreads(JNIEnv* env, jobject obj) {
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memset(&context, 0, sizeof(CONTEXT));
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memset(&context, 0, sizeof(CONTEXT));
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#undef REG_INDEX
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#undef REG_INDEX
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#ifdef _M_IA64
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#ifdef _M_IX86
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#define REG_INDEX(x) sun_jvm_hotspot_debugger_ia64_IA64ThreadContext_##x
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context.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG;
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ptrIDebugAdvanced->GetThreadContext(&context, sizeof(CONTEXT));
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ptrRegs[REG_INDEX(GR0)] = 0; // always 0
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ptrRegs[REG_INDEX(GR1)] = context.IntGp; // r1
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ptrRegs[REG_INDEX(GR2)] = context.IntT0; // r2-r3
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ptrRegs[REG_INDEX(GR3)] = context.IntT1;
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ptrRegs[REG_INDEX(GR4)] = context.IntS0; // r4-r7
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ptrRegs[REG_INDEX(GR5)] = context.IntS1;
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ptrRegs[REG_INDEX(GR6)] = context.IntS2;
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ptrRegs[REG_INDEX(GR7)] = context.IntS3;
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ptrRegs[REG_INDEX(GR8)] = context.IntV0; // r8
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ptrRegs[REG_INDEX(GR9)] = context.IntT2; // r9-r11
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ptrRegs[REG_INDEX(GR10)] = context.IntT3;
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ptrRegs[REG_INDEX(GR11)] = context.IntT4;
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ptrRegs[REG_INDEX(GR12)] = context.IntSp; // r12 stack pointer
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ptrRegs[REG_INDEX(GR13)] = context.IntTeb; // r13 teb
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ptrRegs[REG_INDEX(GR14)] = context.IntT5; // r14-r31
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ptrRegs[REG_INDEX(GR15)] = context.IntT6;
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ptrRegs[REG_INDEX(GR16)] = context.IntT7;
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ptrRegs[REG_INDEX(GR17)] = context.IntT8;
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ptrRegs[REG_INDEX(GR18)] = context.IntT9;
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ptrRegs[REG_INDEX(GR19)] = context.IntT10;
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ptrRegs[REG_INDEX(GR20)] = context.IntT11;
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ptrRegs[REG_INDEX(GR21)] = context.IntT12;
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ptrRegs[REG_INDEX(GR22)] = context.IntT13;
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ptrRegs[REG_INDEX(GR23)] = context.IntT14;
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ptrRegs[REG_INDEX(GR24)] = context.IntT15;
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ptrRegs[REG_INDEX(GR25)] = context.IntT16;
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ptrRegs[REG_INDEX(GR26)] = context.IntT17;
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ptrRegs[REG_INDEX(GR27)] = context.IntT18;
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ptrRegs[REG_INDEX(GR28)] = context.IntT19;
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ptrRegs[REG_INDEX(GR29)] = context.IntT20;
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ptrRegs[REG_INDEX(GR30)] = context.IntT21;
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ptrRegs[REG_INDEX(GR31)] = context.IntT22;
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ptrRegs[REG_INDEX(INT_NATS)] = context.IntNats;
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ptrRegs[REG_INDEX(PREDS)] = context.Preds;
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ptrRegs[REG_INDEX(BR_RP)] = context.BrRp;
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ptrRegs[REG_INDEX(BR1)] = context.BrS0; // b1-b5
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ptrRegs[REG_INDEX(BR2)] = context.BrS1;
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ptrRegs[REG_INDEX(BR3)] = context.BrS2;
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ptrRegs[REG_INDEX(BR4)] = context.BrS3;
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ptrRegs[REG_INDEX(BR5)] = context.BrS4;
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ptrRegs[REG_INDEX(BR6)] = context.BrT0; // b6-b7
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ptrRegs[REG_INDEX(BR7)] = context.BrT1;
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ptrRegs[REG_INDEX(AP_UNAT)] = context.ApUNAT;
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ptrRegs[REG_INDEX(AP_LC)] = context.ApLC;
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ptrRegs[REG_INDEX(AP_EC)] = context.ApEC;
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ptrRegs[REG_INDEX(AP_CCV)] = context.ApCCV;
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ptrRegs[REG_INDEX(AP_DCR)] = context.ApDCR;
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ptrRegs[REG_INDEX(RS_PFS)] = context.RsPFS;
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ptrRegs[REG_INDEX(RS_BSP)] = context.RsBSP;
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ptrRegs[REG_INDEX(RS_BSPSTORE)] = context.RsBSPSTORE;
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ptrRegs[REG_INDEX(RS_RSC)] = context.RsRSC;
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ptrRegs[REG_INDEX(RS_RNAT)] = context.RsRNAT;
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ptrRegs[REG_INDEX(ST_IPSR)] = context.StIPSR;
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ptrRegs[REG_INDEX(ST_IIP)] = context.StIIP;
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ptrRegs[REG_INDEX(ST_IFS)] = context.StIFS;
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ptrRegs[REG_INDEX(DB_I0)] = context.DbI0;
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ptrRegs[REG_INDEX(DB_I1)] = context.DbI1;
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ptrRegs[REG_INDEX(DB_I2)] = context.DbI2;
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ptrRegs[REG_INDEX(DB_I3)] = context.DbI3;
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ptrRegs[REG_INDEX(DB_I4)] = context.DbI4;
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ptrRegs[REG_INDEX(DB_I5)] = context.DbI5;
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ptrRegs[REG_INDEX(DB_I6)] = context.DbI6;
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ptrRegs[REG_INDEX(DB_I7)] = context.DbI7;
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ptrRegs[REG_INDEX(DB_D0)] = context.DbD0;
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ptrRegs[REG_INDEX(DB_D1)] = context.DbD1;
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ptrRegs[REG_INDEX(DB_D2)] = context.DbD2;
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ptrRegs[REG_INDEX(DB_D3)] = context.DbD3;
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ptrRegs[REG_INDEX(DB_D4)] = context.DbD4;
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ptrRegs[REG_INDEX(DB_D5)] = context.DbD5;
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ptrRegs[REG_INDEX(DB_D6)] = context.DbD6;
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ptrRegs[REG_INDEX(DB_D7)] = context.DbD7;
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#elif _M_IX86
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#define REG_INDEX(x) sun_jvm_hotspot_debugger_x86_X86ThreadContext_##x
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#define REG_INDEX(x) sun_jvm_hotspot_debugger_x86_X86ThreadContext_##x
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context.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG_REGISTERS;
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context.ContextFlags = CONTEXT_FULL | CONTEXT_DEBUG_REGISTERS;
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@ -1155,13 +1155,9 @@ void os::Linux::capture_initial_stack(size_t max_size) {
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// for initial thread if its stack size exceeds 6M. Cap it at 2M,
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// for initial thread if its stack size exceeds 6M. Cap it at 2M,
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// in case other parts in glibc still assumes 2M max stack size.
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// in case other parts in glibc still assumes 2M max stack size.
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// FIXME: alt signal stack is gone, maybe we can relax this constraint?
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// FIXME: alt signal stack is gone, maybe we can relax this constraint?
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#ifndef IA64
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if (stack_size > 2 * K * K) stack_size = 2 * K * K;
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#else
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// Problem still exists RH7.2 (IA64 anyway) but 2MB is a little small
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// Problem still exists RH7.2 (IA64 anyway) but 2MB is a little small
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if (stack_size > 4 * K * K) stack_size = 4 * K * K;
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if (stack_size > 2 * K * K IA64_ONLY(*2))
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#endif
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stack_size = 2 * K * K IA64_ONLY(*2);
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// Try to figure out where the stack base (top) is. This is harder.
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// Try to figure out where the stack base (top) is. This is harder.
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//
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//
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// When an application is started, glibc saves the initial stack pointer in
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// When an application is started, glibc saves the initial stack pointer in
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if (is_NPTL()) {
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if (is_NPTL()) {
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return pthread_cond_timedwait(_cond, _mutex, _abstime);
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return pthread_cond_timedwait(_cond, _mutex, _abstime);
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} else {
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} else {
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#ifndef IA64
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// 6292965: LinuxThreads pthread_cond_timedwait() resets FPU control
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// 6292965: LinuxThreads pthread_cond_timedwait() resets FPU control
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// word back to default 64bit precision if condvar is signaled. Java
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// word back to default 64bit precision if condvar is signaled. Java
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// wants 53bit precision. Save and restore current value.
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// wants 53bit precision. Save and restore current value.
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int fpu = get_fpu_control_word();
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int fpu = get_fpu_control_word();
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#endif // IA64
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int status = pthread_cond_timedwait(_cond, _mutex, _abstime);
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int status = pthread_cond_timedwait(_cond, _mutex, _abstime);
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#ifndef IA64
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set_fpu_control_word(fpu);
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set_fpu_control_word(fpu);
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#endif // IA64
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return status;
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return status;
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}
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}
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}
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}
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@ -349,6 +349,33 @@ address os::current_stack_base() {
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#ifdef _M_IA64
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#ifdef _M_IA64
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// IA64 has memory and register stacks
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// IA64 has memory and register stacks
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//
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// This is the stack layout you get on NT/IA64 if you specify 1MB stack limit
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// at thread creation (1MB backing store growing upwards, 1MB memory stack
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// growing downwards, 2MB summed up)
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//
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// ...
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// ------- top of stack (high address) -----
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// |
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// | 1MB
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// | Backing Store (Register Stack)
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// |
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// | / \
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// | |
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// | |
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// | |
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// ------------------------ stack base -----
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// | 1MB
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// | Memory Stack
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// |
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// | |
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// | |
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// | |
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// | \ /
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// |
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// ----- bottom of stack (low address) -----
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// ...
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stack_size = stack_size / 2;
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stack_size = stack_size / 2;
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#endif
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#endif
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return stack_bottom + stack_size;
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return stack_bottom + stack_size;
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@ -2005,17 +2032,34 @@ LONG Handle_Exception(struct _EXCEPTION_POINTERS* exceptionInfo, address handler
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JavaThread* thread = JavaThread::current();
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JavaThread* thread = JavaThread::current();
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// Save pc in thread
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// Save pc in thread
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#ifdef _M_IA64
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#ifdef _M_IA64
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thread->set_saved_exception_pc((address)exceptionInfo->ContextRecord->StIIP);
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// Do not blow up if no thread info available.
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if (thread) {
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// Saving PRECISE pc (with slot information) in thread.
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uint64_t precise_pc = (uint64_t) exceptionInfo->ExceptionRecord->ExceptionAddress;
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// Convert precise PC into "Unix" format
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precise_pc = (precise_pc & 0xFFFFFFFFFFFFFFF0) | ((precise_pc & 0xF) >> 2);
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thread->set_saved_exception_pc((address)precise_pc);
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}
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// Set pc to handler
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// Set pc to handler
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exceptionInfo->ContextRecord->StIIP = (DWORD64)handler;
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exceptionInfo->ContextRecord->StIIP = (DWORD64)handler;
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// Clear out psr.ri (= Restart Instruction) in order to continue
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// at the beginning of the target bundle.
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exceptionInfo->ContextRecord->StIPSR &= 0xFFFFF9FFFFFFFFFF;
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assert(((DWORD64)handler & 0xF) == 0, "Target address must point to the beginning of a bundle!");
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#elif _M_AMD64
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#elif _M_AMD64
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thread->set_saved_exception_pc((address)exceptionInfo->ContextRecord->Rip);
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// Do not blow up if no thread info available.
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if (thread) {
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thread->set_saved_exception_pc((address)(DWORD_PTR)exceptionInfo->ContextRecord->Rip);
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}
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// Set pc to handler
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// Set pc to handler
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exceptionInfo->ContextRecord->Rip = (DWORD64)handler;
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exceptionInfo->ContextRecord->Rip = (DWORD64)handler;
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#else
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#else
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thread->set_saved_exception_pc((address)exceptionInfo->ContextRecord->Eip);
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// Do not blow up if no thread info available.
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if (thread) {
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thread->set_saved_exception_pc((address)(DWORD_PTR)exceptionInfo->ContextRecord->Eip);
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}
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// Set pc to handler
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// Set pc to handler
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exceptionInfo->ContextRecord->Eip = (LONG)handler;
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exceptionInfo->ContextRecord->Eip = (DWORD)(DWORD_PTR)handler;
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#endif
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#endif
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// Continue the execution
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// Continue the execution
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@ -2040,6 +2084,14 @@ extern "C" void events();
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// included or copied here.
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// included or copied here.
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#define EXCEPTION_INFO_EXEC_VIOLATION 0x08
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#define EXCEPTION_INFO_EXEC_VIOLATION 0x08
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// Handle NAT Bit consumption on IA64.
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#ifdef _M_IA64
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#define EXCEPTION_REG_NAT_CONSUMPTION STATUS_REG_NAT_CONSUMPTION
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#endif
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// Windows Vista/2008 heap corruption check
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#define EXCEPTION_HEAP_CORRUPTION 0xC0000374
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#define def_excpt(val) #val, val
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#define def_excpt(val) #val, val
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struct siglabel {
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struct siglabel {
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@ -2082,6 +2134,10 @@ struct siglabel exceptlabels[] = {
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def_excpt(EXCEPTION_GUARD_PAGE),
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def_excpt(EXCEPTION_GUARD_PAGE),
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def_excpt(EXCEPTION_INVALID_HANDLE),
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def_excpt(EXCEPTION_INVALID_HANDLE),
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def_excpt(EXCEPTION_UNCAUGHT_CXX_EXCEPTION),
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def_excpt(EXCEPTION_UNCAUGHT_CXX_EXCEPTION),
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def_excpt(EXCEPTION_HEAP_CORRUPTION),
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#ifdef _M_IA64
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def_excpt(EXCEPTION_REG_NAT_CONSUMPTION),
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|
#endif
|
||||||
NULL, 0
|
NULL, 0
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -2206,7 +2262,14 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
|
||||||
if (InterceptOSException) return EXCEPTION_CONTINUE_SEARCH;
|
if (InterceptOSException) return EXCEPTION_CONTINUE_SEARCH;
|
||||||
DWORD exception_code = exceptionInfo->ExceptionRecord->ExceptionCode;
|
DWORD exception_code = exceptionInfo->ExceptionRecord->ExceptionCode;
|
||||||
#ifdef _M_IA64
|
#ifdef _M_IA64
|
||||||
address pc = (address) exceptionInfo->ContextRecord->StIIP;
|
// On Itanium, we need the "precise pc", which has the slot number coded
|
||||||
|
// into the least 4 bits: 0000=slot0, 0100=slot1, 1000=slot2 (Windows format).
|
||||||
|
address pc = (address) exceptionInfo->ExceptionRecord->ExceptionAddress;
|
||||||
|
// Convert the pc to "Unix format", which has the slot number coded
|
||||||
|
// into the least 2 bits: 0000=slot0, 0001=slot1, 0010=slot2
|
||||||
|
// This is needed for IA64 because "relocation" / "implicit null check" / "poll instruction"
|
||||||
|
// information is saved in the Unix format.
|
||||||
|
address pc_unix_format = (address) ((((uint64_t)pc) & 0xFFFFFFFFFFFFFFF0) | ((((uint64_t)pc) & 0xF) >> 2));
|
||||||
#elif _M_AMD64
|
#elif _M_AMD64
|
||||||
address pc = (address) exceptionInfo->ContextRecord->Rip;
|
address pc = (address) exceptionInfo->ContextRecord->Rip;
|
||||||
#else
|
#else
|
||||||
|
@ -2321,29 +2384,40 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
|
||||||
if (exception_code == EXCEPTION_STACK_OVERFLOW) {
|
if (exception_code == EXCEPTION_STACK_OVERFLOW) {
|
||||||
if (os::uses_stack_guard_pages()) {
|
if (os::uses_stack_guard_pages()) {
|
||||||
#ifdef _M_IA64
|
#ifdef _M_IA64
|
||||||
//
|
// Use guard page for register stack.
|
||||||
// If it's a legal stack address continue, Windows will map it in.
|
|
||||||
//
|
|
||||||
PEXCEPTION_RECORD exceptionRecord = exceptionInfo->ExceptionRecord;
|
PEXCEPTION_RECORD exceptionRecord = exceptionInfo->ExceptionRecord;
|
||||||
address addr = (address) exceptionRecord->ExceptionInformation[1];
|
address addr = (address) exceptionRecord->ExceptionInformation[1];
|
||||||
if (addr > thread->stack_yellow_zone_base() && addr < thread->stack_base() )
|
// Check for a register stack overflow on Itanium
|
||||||
return EXCEPTION_CONTINUE_EXECUTION;
|
if (thread->addr_inside_register_stack_red_zone(addr)) {
|
||||||
|
// Fatal red zone violation happens if the Java program
|
||||||
|
// catches a StackOverflow error and does so much processing
|
||||||
|
// that it runs beyond the unprotected yellow guard zone. As
|
||||||
|
// a result, we are out of here.
|
||||||
|
fatal("ERROR: Unrecoverable stack overflow happened. JVM will exit.");
|
||||||
|
} else if(thread->addr_inside_register_stack(addr)) {
|
||||||
|
// Disable the yellow zone which sets the state that
|
||||||
|
// we've got a stack overflow problem.
|
||||||
|
if (thread->stack_yellow_zone_enabled()) {
|
||||||
|
thread->disable_stack_yellow_zone();
|
||||||
|
}
|
||||||
|
// Give us some room to process the exception.
|
||||||
|
thread->disable_register_stack_guard();
|
||||||
|
// Tracing with +Verbose.
|
||||||
|
if (Verbose) {
|
||||||
|
tty->print_cr("SOF Compiled Register Stack overflow at " INTPTR_FORMAT " (SIGSEGV)", pc);
|
||||||
|
tty->print_cr("Register Stack access at " INTPTR_FORMAT, addr);
|
||||||
|
tty->print_cr("Register Stack base " INTPTR_FORMAT, thread->register_stack_base());
|
||||||
|
tty->print_cr("Register Stack [" INTPTR_FORMAT "," INTPTR_FORMAT "]",
|
||||||
|
thread->register_stack_base(),
|
||||||
|
thread->register_stack_base() + thread->stack_size());
|
||||||
|
}
|
||||||
|
|
||||||
// The register save area is the same size as the memory stack
|
// Reguard the permanent register stack red zone just to be sure.
|
||||||
// and starts at the page just above the start of the memory stack.
|
// We saw Windows silently disabling this without telling us.
|
||||||
// If we get a fault in this area, we've run out of register
|
thread->enable_register_stack_red_zone();
|
||||||
// stack. If we are in java, try throwing a stack overflow exception.
|
|
||||||
if (addr > thread->stack_base() &&
|
return Handle_Exception(exceptionInfo,
|
||||||
addr <= (thread->stack_base()+thread->stack_size()) ) {
|
SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW));
|
||||||
char buf[256];
|
|
||||||
jio_snprintf(buf, sizeof(buf),
|
|
||||||
"Register stack overflow, addr:%p, stack_base:%p\n",
|
|
||||||
addr, thread->stack_base() );
|
|
||||||
tty->print_raw_cr(buf);
|
|
||||||
// If not in java code, return and hope for the best.
|
|
||||||
return in_java ? Handle_Exception(exceptionInfo,
|
|
||||||
SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW))
|
|
||||||
: EXCEPTION_CONTINUE_EXECUTION;
|
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
if (thread->stack_yellow_zone_enabled()) {
|
if (thread->stack_yellow_zone_enabled()) {
|
||||||
|
@ -2418,50 +2492,33 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
|
||||||
{
|
{
|
||||||
// Null pointer exception.
|
// Null pointer exception.
|
||||||
#ifdef _M_IA64
|
#ifdef _M_IA64
|
||||||
// We catch register stack overflows in compiled code by doing
|
// Process implicit null checks in compiled code. Note: Implicit null checks
|
||||||
// an explicit compare and executing a st8(G0, G0) if the
|
// can happen even if "ImplicitNullChecks" is disabled, e.g. in vtable stubs.
|
||||||
// BSP enters into our guard area. We test for the overflow
|
if (CodeCache::contains((void*) pc_unix_format) && !MacroAssembler::needs_explicit_null_check((intptr_t) addr)) {
|
||||||
// condition and fall into the normal null pointer exception
|
CodeBlob *cb = CodeCache::find_blob_unsafe(pc_unix_format);
|
||||||
// code if BSP hasn't overflowed.
|
// Handle implicit null check in UEP method entry
|
||||||
if ( in_java ) {
|
if (cb && (cb->is_frame_complete_at(pc) ||
|
||||||
if(thread->register_stack_overflow()) {
|
(cb->is_nmethod() && ((nmethod *)cb)->inlinecache_check_contains(pc)))) {
|
||||||
assert((address)exceptionInfo->ContextRecord->IntS3 ==
|
if (Verbose) {
|
||||||
thread->register_stack_limit(),
|
intptr_t *bundle_start = (intptr_t*) ((intptr_t) pc_unix_format & 0xFFFFFFFFFFFFFFF0);
|
||||||
"GR7 doesn't contain register_stack_limit");
|
tty->print_cr("trap: null_check at " INTPTR_FORMAT " (SIGSEGV)", pc_unix_format);
|
||||||
// Disable the yellow zone which sets the state that
|
tty->print_cr(" to addr " INTPTR_FORMAT, addr);
|
||||||
// we've got a stack overflow problem.
|
tty->print_cr(" bundle is " INTPTR_FORMAT " (high), " INTPTR_FORMAT " (low)",
|
||||||
if (thread->stack_yellow_zone_enabled()) {
|
*(bundle_start + 1), *bundle_start);
|
||||||
thread->disable_stack_yellow_zone();
|
|
||||||
}
|
}
|
||||||
// Give us some room to process the exception
|
|
||||||
thread->disable_register_stack_guard();
|
|
||||||
// Update GR7 with the new limit so we can continue running
|
|
||||||
// compiled code.
|
|
||||||
exceptionInfo->ContextRecord->IntS3 =
|
|
||||||
(ULONGLONG)thread->register_stack_limit();
|
|
||||||
return Handle_Exception(exceptionInfo,
|
return Handle_Exception(exceptionInfo,
|
||||||
SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::STACK_OVERFLOW));
|
SharedRuntime::continuation_for_implicit_exception(thread, pc_unix_format, SharedRuntime::IMPLICIT_NULL));
|
||||||
} else {
|
|
||||||
//
|
|
||||||
// Check for implicit null
|
|
||||||
// We only expect null pointers in the stubs (vtable)
|
|
||||||
// the rest are checked explicitly now.
|
|
||||||
//
|
|
||||||
if (((uintptr_t)addr) < os::vm_page_size() ) {
|
|
||||||
// an access to the first page of VM--assume it is a null pointer
|
|
||||||
address stub = SharedRuntime::continuation_for_implicit_exception(thread, pc, SharedRuntime::IMPLICIT_NULL);
|
|
||||||
if (stub != NULL) return Handle_Exception(exceptionInfo, stub);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} // in_java
|
|
||||||
|
|
||||||
// IA64 doesn't use implicit null checking yet. So we shouldn't
|
// Implicit null checks were processed above. Hence, we should not reach
|
||||||
// get here.
|
// here in the usual case => die!
|
||||||
tty->print_raw_cr("Access violation, possible null pointer exception");
|
if (Verbose) tty->print_raw_cr("Access violation, possible null pointer exception");
|
||||||
report_error(t, exception_code, pc, exceptionInfo->ExceptionRecord,
|
report_error(t, exception_code, pc, exceptionInfo->ExceptionRecord,
|
||||||
exceptionInfo->ContextRecord);
|
exceptionInfo->ContextRecord);
|
||||||
return EXCEPTION_CONTINUE_SEARCH;
|
return EXCEPTION_CONTINUE_SEARCH;
|
||||||
#else /* !IA64 */
|
|
||||||
|
#else // !IA64
|
||||||
|
|
||||||
// Windows 98 reports faulting addresses incorrectly
|
// Windows 98 reports faulting addresses incorrectly
|
||||||
if (!MacroAssembler::needs_explicit_null_check((intptr_t)addr) ||
|
if (!MacroAssembler::needs_explicit_null_check((intptr_t)addr) ||
|
||||||
|
@ -2493,7 +2550,24 @@ LONG WINAPI topLevelExceptionFilter(struct _EXCEPTION_POINTERS* exceptionInfo) {
|
||||||
report_error(t, exception_code, pc, exceptionInfo->ExceptionRecord,
|
report_error(t, exception_code, pc, exceptionInfo->ExceptionRecord,
|
||||||
exceptionInfo->ContextRecord);
|
exceptionInfo->ContextRecord);
|
||||||
return EXCEPTION_CONTINUE_SEARCH;
|
return EXCEPTION_CONTINUE_SEARCH;
|
||||||
|
} // /EXCEPTION_ACCESS_VIOLATION
|
||||||
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
||||||
|
#if defined _M_IA64
|
||||||
|
else if ((exception_code == EXCEPTION_ILLEGAL_INSTRUCTION ||
|
||||||
|
exception_code == EXCEPTION_ILLEGAL_INSTRUCTION_2)) {
|
||||||
|
M37 handle_wrong_method_break(0, NativeJump::HANDLE_WRONG_METHOD, PR0);
|
||||||
|
|
||||||
|
// Compiled method patched to be non entrant? Following conditions must apply:
|
||||||
|
// 1. must be first instruction in bundle
|
||||||
|
// 2. must be a break instruction with appropriate code
|
||||||
|
if((((uint64_t) pc & 0x0F) == 0) &&
|
||||||
|
(((IPF_Bundle*) pc)->get_slot0() == handle_wrong_method_break.bits())) {
|
||||||
|
return Handle_Exception(exceptionInfo,
|
||||||
|
(address)SharedRuntime::get_handle_wrong_method_stub());
|
||||||
}
|
}
|
||||||
|
} // /EXCEPTION_ILLEGAL_INSTRUCTION
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
if (in_java) {
|
if (in_java) {
|
||||||
switch (exception_code) {
|
switch (exception_code) {
|
||||||
|
|
|
@ -3099,9 +3099,9 @@ BytecodeInterpreter::print() {
|
||||||
tty->print_cr("&native_fresult: " INTPTR_FORMAT, (uintptr_t) &this->_native_fresult);
|
tty->print_cr("&native_fresult: " INTPTR_FORMAT, (uintptr_t) &this->_native_fresult);
|
||||||
tty->print_cr("native_lresult: " INTPTR_FORMAT, (uintptr_t) this->_native_lresult);
|
tty->print_cr("native_lresult: " INTPTR_FORMAT, (uintptr_t) this->_native_lresult);
|
||||||
#endif
|
#endif
|
||||||
#if defined(IA64) && !defined(ZERO)
|
#if !defined(ZERO)
|
||||||
tty->print_cr("last_Java_fp: " INTPTR_FORMAT, (uintptr_t) this->_last_Java_fp);
|
tty->print_cr("last_Java_fp: " INTPTR_FORMAT, (uintptr_t) this->_last_Java_fp);
|
||||||
#endif // IA64 && !ZERO
|
#endif // !ZERO
|
||||||
tty->print_cr("self_link: " INTPTR_FORMAT, (uintptr_t) this->_self_link);
|
tty->print_cr("self_link: " INTPTR_FORMAT, (uintptr_t) this->_self_link);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -88,12 +88,12 @@ void GraphKit::gen_stub(address C_function,
|
||||||
thread,
|
thread,
|
||||||
in_bytes(JavaThread::frame_anchor_offset()) +
|
in_bytes(JavaThread::frame_anchor_offset()) +
|
||||||
in_bytes(JavaFrameAnchor::last_Java_pc_offset()));
|
in_bytes(JavaFrameAnchor::last_Java_pc_offset()));
|
||||||
#if defined(SPARC) || defined(IA64)
|
#if defined(SPARC)
|
||||||
Node* adr_flags = basic_plus_adr(top(),
|
Node* adr_flags = basic_plus_adr(top(),
|
||||||
thread,
|
thread,
|
||||||
in_bytes(JavaThread::frame_anchor_offset()) +
|
in_bytes(JavaThread::frame_anchor_offset()) +
|
||||||
in_bytes(JavaFrameAnchor::flags_offset()));
|
in_bytes(JavaFrameAnchor::flags_offset()));
|
||||||
#endif /* defined(SPARC) || defined(IA64) */
|
#endif /* defined(SPARC) */
|
||||||
|
|
||||||
|
|
||||||
// Drop in the last_Java_sp. last_Java_fp is not touched.
|
// Drop in the last_Java_sp. last_Java_fp is not touched.
|
||||||
|
@ -102,10 +102,8 @@ void GraphKit::gen_stub(address C_function,
|
||||||
// users will look at the other fields.
|
// users will look at the other fields.
|
||||||
//
|
//
|
||||||
Node *adr_sp = basic_plus_adr(top(), thread, in_bytes(JavaThread::last_Java_sp_offset()));
|
Node *adr_sp = basic_plus_adr(top(), thread, in_bytes(JavaThread::last_Java_sp_offset()));
|
||||||
#ifndef IA64
|
|
||||||
Node *last_sp = basic_plus_adr(top(), frameptr(), (intptr_t) STACK_BIAS);
|
Node *last_sp = basic_plus_adr(top(), frameptr(), (intptr_t) STACK_BIAS);
|
||||||
store_to_memory(NULL, adr_sp, last_sp, T_ADDRESS, NoAlias);
|
store_to_memory(NULL, adr_sp, last_sp, T_ADDRESS, NoAlias);
|
||||||
#endif
|
|
||||||
|
|
||||||
// Set _thread_in_native
|
// Set _thread_in_native
|
||||||
// The order of stores into TLS is critical! Setting _thread_in_native MUST
|
// The order of stores into TLS is critical! Setting _thread_in_native MUST
|
||||||
|
@ -210,19 +208,12 @@ void GraphKit::gen_stub(address C_function,
|
||||||
//-----------------------------
|
//-----------------------------
|
||||||
|
|
||||||
// Clear last_Java_sp
|
// Clear last_Java_sp
|
||||||
#ifdef IA64
|
|
||||||
if( os::is_MP() ) insert_mem_bar(Op_MemBarRelease);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
store_to_memory(NULL, adr_sp, null(), T_ADDRESS, NoAlias);
|
store_to_memory(NULL, adr_sp, null(), T_ADDRESS, NoAlias);
|
||||||
#ifdef IA64
|
|
||||||
if (os::is_MP() && UseMembar) insert_mem_bar(new MemBarVolatileNode());
|
|
||||||
#endif // def IA64
|
|
||||||
// Clear last_Java_pc and (optionally)_flags
|
// Clear last_Java_pc and (optionally)_flags
|
||||||
store_to_memory(NULL, adr_last_Java_pc, null(), T_ADDRESS, NoAlias);
|
store_to_memory(NULL, adr_last_Java_pc, null(), T_ADDRESS, NoAlias);
|
||||||
#if defined(SPARC) || defined(IA64)
|
#if defined(SPARC)
|
||||||
store_to_memory(NULL, adr_flags, intcon(0), T_INT, NoAlias);
|
store_to_memory(NULL, adr_flags, intcon(0), T_INT, NoAlias);
|
||||||
#endif /* defined(SPARC) || defined(IA64) */
|
#endif /* defined(SPARC) */
|
||||||
#ifdef IA64
|
#ifdef IA64
|
||||||
Node* adr_last_Java_fp = basic_plus_adr(top(), thread, in_bytes(JavaThread::last_Java_fp_offset()));
|
Node* adr_last_Java_fp = basic_plus_adr(top(), thread, in_bytes(JavaThread::last_Java_fp_offset()));
|
||||||
if( os::is_MP() ) insert_mem_bar(Op_MemBarRelease);
|
if( os::is_MP() ) insert_mem_bar(Op_MemBarRelease);
|
||||||
|
|
|
@ -985,15 +985,28 @@ void os::print_location(outputStream* st, intptr_t x, bool verbose) {
|
||||||
// if C stack is walkable beyond current frame. The check for fp() is not
|
// if C stack is walkable beyond current frame. The check for fp() is not
|
||||||
// necessary on Sparc, but it's harmless.
|
// necessary on Sparc, but it's harmless.
|
||||||
bool os::is_first_C_frame(frame* fr) {
|
bool os::is_first_C_frame(frame* fr) {
|
||||||
#ifdef IA64
|
#if defined(IA64) && !defined(_WIN32)
|
||||||
// In order to walk native frames on Itanium, we need to access the unwind
|
// On IA64 we have to check if the callers bsp is still valid
|
||||||
// table, which is inside ELF. We don't want to parse ELF after fatal error,
|
// (i.e. within the register stack bounds).
|
||||||
// so return true for IA64. If we need to support C stack walking on IA64,
|
// Notice: this only works for threads created by the VM and only if
|
||||||
// this function needs to be moved to CPU specific files, as fp() on IA64
|
// we walk the current stack!!! If we want to be able to walk
|
||||||
// is register stack, which grows towards higher memory address.
|
// arbitrary other threads, we'll have to somehow store the thread
|
||||||
|
// object in the frame.
|
||||||
|
Thread *thread = Thread::current();
|
||||||
|
if ((address)fr->fp() <=
|
||||||
|
thread->register_stack_base() HPUX_ONLY(+ 0x0) LINUX_ONLY(+ 0x50)) {
|
||||||
|
// This check is a little hacky, because on Linux the first C
|
||||||
|
// frame's ('start_thread') register stack frame starts at
|
||||||
|
// "register_stack_base + 0x48" while on HPUX, the first C frame's
|
||||||
|
// ('__pthread_bound_body') register stack frame seems to really
|
||||||
|
// start at "register_stack_base".
|
||||||
return true;
|
return true;
|
||||||
#endif
|
} else {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
#elif defined(IA64) && defined(_WIN32)
|
||||||
|
return true;
|
||||||
|
#else
|
||||||
// Load up sp, fp, sender sp and sender fp, check for reasonable values.
|
// Load up sp, fp, sender sp and sender fp, check for reasonable values.
|
||||||
// Check usp first, because if that's bad the other accessors may fault
|
// Check usp first, because if that's bad the other accessors may fault
|
||||||
// on some architectures. Ditto ufp second, etc.
|
// on some architectures. Ditto ufp second, etc.
|
||||||
|
@ -1023,6 +1036,7 @@ bool os::is_first_C_frame(frame* fr) {
|
||||||
if (old_fp - ufp > 64 * K) return true;
|
if (old_fp - ufp > 64 * K) return true;
|
||||||
|
|
||||||
return false;
|
return false;
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef ASSERT
|
#ifdef ASSERT
|
||||||
|
|
|
@ -2816,10 +2816,6 @@ VMRegPair *SharedRuntime::find_callee_arguments(Symbol* sig, bool has_receiver,
|
||||||
|
|
||||||
JRT_LEAF(intptr_t*, SharedRuntime::OSR_migration_begin( JavaThread *thread) )
|
JRT_LEAF(intptr_t*, SharedRuntime::OSR_migration_begin( JavaThread *thread) )
|
||||||
|
|
||||||
#ifdef IA64
|
|
||||||
ShouldNotReachHere(); // NYI
|
|
||||||
#endif /* IA64 */
|
|
||||||
|
|
||||||
//
|
//
|
||||||
// This code is dependent on the memory layout of the interpreter local
|
// This code is dependent on the memory layout of the interpreter local
|
||||||
// array and the monitors. On all of our platforms the layout is identical
|
// array and the monitors. On all of our platforms the layout is identical
|
||||||
|
|
|
@ -53,7 +53,7 @@
|
||||||
# include "os_bsd.inline.hpp"
|
# include "os_bsd.inline.hpp"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(__GNUC__) && !defined(IA64)
|
#if defined(__GNUC__)
|
||||||
// Need to inhibit inlining for older versions of GCC to avoid build-time failures
|
// Need to inhibit inlining for older versions of GCC to avoid build-time failures
|
||||||
#define ATTR __attribute__((noinline))
|
#define ATTR __attribute__((noinline))
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -233,8 +233,6 @@ void vframeArrayElement::unpack_on_stack(int caller_actual_parameters,
|
||||||
// Force early return from top frame after deoptimization
|
// Force early return from top frame after deoptimization
|
||||||
#ifndef CC_INTERP
|
#ifndef CC_INTERP
|
||||||
pc = Interpreter::remove_activation_early_entry(state->earlyret_tos());
|
pc = Interpreter::remove_activation_early_entry(state->earlyret_tos());
|
||||||
#else
|
|
||||||
// TBD: Need to implement ForceEarlyReturn for CC_INTERP (ia64)
|
|
||||||
#endif
|
#endif
|
||||||
} else {
|
} else {
|
||||||
// Possibly override the previous pc computation of the top (youngest) frame
|
// Possibly override the previous pc computation of the top (youngest) frame
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue