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8293942: [JVMCI] data section entries must be 4-byte aligned on AArch64

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Reviewed-by: never
This commit is contained in:
Doug Simon 2022-09-19 16:30:48 +00:00
parent 6e23b43220
commit 8ff2c2639e
4 changed files with 16 additions and 0 deletions
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4
src/hotspot/share/jvmci/jvmciCompilerToVMInit.cpp
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@ -95,6 +95,8 @@ address CompilerToVM::Data::dpow;
address CompilerToVM::Data::symbol_init;
address CompilerToVM::Data::symbol_clinit;
int CompilerToVM::Data::data_section_item_alignment;
void CompilerToVM::Data::initialize(JVMCI_TRAPS) {
Klass_vtable_start_offset = in_bytes(Klass::vtable_start_offset());
Klass_vtable_length_offset = in_bytes(Klass::vtable_length_offset());
@ -133,6 +135,8 @@ void CompilerToVM::Data::initialize(JVMCI_TRAPS) {
_fields_annotations_base_offset = Array<AnnotationArray*>::base_offset_in_bytes();
data_section_item_alignment = relocInfo::addr_unit();
BarrierSet* bs = BarrierSet::barrier_set();
if (bs->is_a(BarrierSet::CardTableBarrierSet)) {
CardTable::CardValue* base = ci_card_table_address();