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8290137: riscv: small refactoring for add_memory_int32/64

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Reviewed-by: yadongwang, fjiang, shade
This commit is contained in:
Fei Yang 2022-07-18 13:01:35 +00:00
parent 87340fd540
commit 92067e2003
8 changed files with 87 additions and 47 deletions
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7
src/hotspot/cpu/riscv/assembler_riscv.hpp
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@ -3066,11 +3066,12 @@ public:
void wrap_label(Register r, Label &L, Register t, load_insn_by_temp insn);
void wrap_label(Register r, Label &L, jal_jalr_insn insn);
// calculate pseudoinstruction
// Computational pseudo instructions
void add(Register Rd, Register Rn, int64_t increment, Register temp = t0);
void addw(Register Rd, Register Rn, int64_t increment, Register temp = t0);
void addw(Register Rd, Register Rn, int32_t increment, Register temp = t0);
void sub(Register Rd, Register Rn, int64_t decrement, Register temp = t0);
void subw(Register Rd, Register Rn, int64_t decrement, Register temp = t0);
void subw(Register Rd, Register Rn, int32_t decrement, Register temp = t0);
// RVB pseudo instructions
// zero extend word