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8004835: Improve AES intrinsics on x86

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Enable AES intrinsics on non-AVX cpus, group together aes instructions in crypto stubs.

Reviewed-by: roland, twisti
This commit is contained in:
Vladimir Kozlov 2012-12-19 15:40:35 -08:00
parent ba0d2572eb
commit 960d969ade
7 changed files with 299 additions and 195 deletions
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hotspot/src/cpu/x86/vm/assembler_x86.cpp
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@ -2393,7 +2393,6 @@ void Assembler::pshufb(XMMRegister dst, XMMRegister src) {
void Assembler::pshufb(XMMRegister dst, Address src) {
assert(VM_Version::supports_ssse3(), "");
assert((UseAVX > 0), "SSE mode requires address alignment 16 bytes");
InstructionMark im(this);
simd_prefix(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38);
emit_byte(0x00);