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8004835: Improve AES intrinsics on x86

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Enable AES intrinsics on non-AVX cpus, group together aes instructions in crypto stubs.

Reviewed-by: roland, twisti
This commit is contained in:
Vladimir Kozlov 2012-12-19 15:40:35 -08:00
parent ba0d2572eb
commit 960d969ade
7 changed files with 299 additions and 195 deletions
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3
hotspot/src/cpu/x86/vm/macroAssembler_x86.cpp
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@ -3085,7 +3085,8 @@ void MacroAssembler::xorps(XMMRegister dst, AddressLiteral src) {
void MacroAssembler::pshufb(XMMRegister dst, AddressLiteral src) {
// Used in sign-bit flipping with aligned address.
assert((UseAVX > 0) || (((intptr_t)src.target() & 15) == 0), "SSE mode requires address alignment 16 bytes");
bool aligned_adr = (((intptr_t)src.target() & 15) == 0);
assert((UseAVX > 0) || aligned_adr, "SSE mode requires address alignment 16 bytes");
if (reachable(src)) {
Assembler::pshufb(dst, as_Address(src));
} else {