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6909839: missing unsigned compare cases for some cmoves in sparc.ad

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Reviewed-by: kvn, jrose
This commit is contained in:
Tom Rodriguez 2010-01-09 00:59:35 -08:00
parent 84ad3ddc31
commit 96612c6e23
2 changed files with 348 additions and 3 deletions
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69
hotspot/src/cpu/sparc/vm/sparc.ad
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@ -1,5 +1,5 @@
//
// Copyright 1998-2009 Sun Microsystems, Inc. All Rights Reserved.
// Copyright 1998-2010 Sun Microsystems, Inc. All Rights Reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This code is free software; you can redistribute it and/or modify it
@ -6668,7 +6668,7 @@ instruct cmovII_imm(cmpOp cmp, flagsReg icc, iRegI dst, immI11 src) %{
ins_pipe(ialu_imm);
%}
instruct cmovII_U_reg(cmpOpU cmp, flagsRegU icc, iRegI dst, iRegI src) %{
instruct cmovIIu_reg(cmpOpU cmp, flagsRegU icc, iRegI dst, iRegI src) %{
match(Set dst (CMoveI (Binary cmp icc) (Binary dst src)));
ins_cost(150);
size(4);
@ -6677,7 +6677,7 @@ instruct cmovII_U_reg(cmpOpU cmp, flagsRegU icc, iRegI dst, iRegI src) %{
ins_pipe(ialu_reg);
%}
instruct cmovII_U_imm(cmpOpU cmp, flagsRegU icc, iRegI dst, immI11 src) %{
instruct cmovIIu_imm(cmpOpU cmp, flagsRegU icc, iRegI dst, immI11 src) %{
match(Set dst (CMoveI (Binary cmp icc) (Binary dst src)));
ins_cost(140);
size(4);
@ -6723,6 +6723,16 @@ instruct cmovNI_reg(cmpOp cmp, flagsReg icc, iRegN dst, iRegN src) %{
ins_pipe(ialu_reg);
%}
// This instruction also works with CmpN so we don't need cmovNN_reg.
instruct cmovNIu_reg(cmpOpU cmp, flagsRegU icc, iRegN dst, iRegN src) %{
match(Set dst (CMoveN (Binary cmp icc) (Binary dst src)));
ins_cost(150);
size(4);
format %{ "MOV$cmp $icc,$src,$dst" %}
ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) );
ins_pipe(ialu_reg);
%}
instruct cmovNF_reg(cmpOpF cmp, flagsRegF fcc, iRegN dst, iRegN src) %{
match(Set dst (CMoveN (Binary cmp fcc) (Binary dst src)));
ins_cost(150);
@ -6760,6 +6770,16 @@ instruct cmovPI_reg(cmpOp cmp, flagsReg icc, iRegP dst, iRegP src) %{
ins_pipe(ialu_reg);
%}
instruct cmovPIu_reg(cmpOpU cmp, flagsRegU icc, iRegP dst, iRegP src) %{
match(Set dst (CMoveP (Binary cmp icc) (Binary dst src)));
ins_cost(150);
size(4);
format %{ "MOV$cmp $icc,$src,$dst\t! ptr" %}
ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) );
ins_pipe(ialu_reg);
%}
instruct cmovPI_imm(cmpOp cmp, flagsReg icc, iRegP dst, immP0 src) %{
match(Set dst (CMoveP (Binary cmp icc) (Binary dst src)));
ins_cost(140);
@ -6770,6 +6790,16 @@ instruct cmovPI_imm(cmpOp cmp, flagsReg icc, iRegP dst, immP0 src) %{
ins_pipe(ialu_imm);
%}
instruct cmovPIu_imm(cmpOpU cmp, flagsRegU icc, iRegP dst, immP0 src) %{
match(Set dst (CMoveP (Binary cmp icc) (Binary dst src)));
ins_cost(140);
size(4);
format %{ "MOV$cmp $icc,$src,$dst\t! ptr" %}
ins_encode( enc_cmov_imm(cmp,dst,src, (Assembler::icc)) );
ins_pipe(ialu_imm);
%}
instruct cmovPF_reg(cmpOpF cmp, flagsRegF fcc, iRegP dst, iRegP src) %{
match(Set dst (CMoveP (Binary cmp fcc) (Binary dst src)));
ins_cost(150);
@ -6809,6 +6839,17 @@ instruct cmovFI_reg(cmpOp cmp, flagsReg icc, regF dst, regF src) %{
ins_pipe(int_conditional_float_move);
%}
instruct cmovFIu_reg(cmpOpU cmp, flagsRegU icc, regF dst, regF src) %{
match(Set dst (CMoveF (Binary cmp icc) (Binary dst src)));
ins_cost(150);
size(4);
format %{ "FMOVS$cmp $icc,$src,$dst" %}
opcode(0x101);
ins_encode( enc_cmovf_reg(cmp,dst,src, (Assembler::icc)) );
ins_pipe(int_conditional_float_move);
%}
// Conditional move,
instruct cmovFF_reg(cmpOpF cmp, flagsRegF fcc, regF dst, regF src) %{
match(Set dst (CMoveF (Binary cmp fcc) (Binary dst src)));
@ -6842,6 +6883,17 @@ instruct cmovDI_reg(cmpOp cmp, flagsReg icc, regD dst, regD src) %{
ins_pipe(int_conditional_double_move);
%}
instruct cmovDIu_reg(cmpOpU cmp, flagsRegU icc, regD dst, regD src) %{
match(Set dst (CMoveD (Binary cmp icc) (Binary dst src)));
ins_cost(150);
size(4);
format %{ "FMOVD$cmp $icc,$src,$dst" %}
opcode(0x102);
ins_encode( enc_cmovf_reg(cmp,dst,src, (Assembler::icc)) );
ins_pipe(int_conditional_double_move);
%}
// Conditional move,
instruct cmovDF_reg(cmpOpF cmp, flagsRegF fcc, regD dst, regD src) %{
match(Set dst (CMoveD (Binary cmp fcc) (Binary dst src)));
@ -6881,6 +6933,17 @@ instruct cmovLI_reg(cmpOp cmp, flagsReg icc, iRegL dst, iRegL src) %{
%}
instruct cmovLIu_reg(cmpOpU cmp, flagsRegU icc, iRegL dst, iRegL src) %{
match(Set dst (CMoveL (Binary cmp icc) (Binary dst src)));
ins_cost(150);
size(4);
format %{ "MOV$cmp $icc,$src,$dst\t! long" %}
ins_encode( enc_cmov_reg(cmp,dst,src, (Assembler::icc)) );
ins_pipe(ialu_reg);
%}
instruct cmovLF_reg(cmpOpF cmp, flagsRegF fcc, iRegL dst, iRegL src) %{
match(Set dst (CMoveL (Binary cmp fcc) (Binary dst src)));
ins_cost(150);