8178033: C1 crashes with -XX:UseAVX = 3: "not a mov [reg+offs], reg instruction"

Skip the EVEX prefix such that the instruction address points to the prefixed opcode.

Reviewed-by: kvn, mcberg
This commit is contained in:
Tobias Hartmann 2017-04-06 08:19:42 +02:00
parent d28f63fb9e
commit a8a97e6625
3 changed files with 6 additions and 1 deletions

View file

@ -917,7 +917,7 @@ address Assembler::locate_operand(address inst, WhichOperand which) {
break;
case 0x62: // EVEX_4bytes
assert((UseAVX > 0), "shouldn't have EVEX prefix");
assert(VM_Version::supports_evex(), "shouldn't have EVEX prefix");
assert(ip == inst+1, "no prefixes allowed");
// no EVEX collisions, all instructions that have 0x62 opcodes
// have EVEX versions and are subopcodes of 0x66

View file

@ -365,6 +365,10 @@ int NativeMovRegMem::instruction_start() const {
NOT_LP64(assert((0xC0 & ubyte_at(1)) == 0xC0, "shouldn't have LDS and LES instructions"));
return 3;
}
if (instr_0 == instruction_EVEX_prefix_4bytes) {
assert(VM_Version::supports_evex(), "shouldn't have EVEX prefix");
return 4;
}
// First check to see if we have a (prefixed or not) xor
if (instr_0 >= instruction_prefix_wide_lo && // 0x40

View file

@ -356,6 +356,7 @@ class NativeMovRegMem: public NativeInstruction {
instruction_VEX_prefix_2bytes = Assembler::VEX_2bytes,
instruction_VEX_prefix_3bytes = Assembler::VEX_3bytes,
instruction_EVEX_prefix_4bytes = Assembler::EVEX_4bytes,
instruction_size = 4,
instruction_offset = 0,