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6667595: Set probability FAIR for pre-, post- loops and ALWAYS for main loop
Fix loop's probability. Add optimizations to avoid spilling. Change InlineSmallCode to product flag. Reviewed-by: never
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9 changed files with 156 additions and 49 deletions
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@ -110,10 +110,13 @@ static Node *transform_int_divide( PhaseGVN *phase, Node *dividend, jint divisor
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} else if( dividend->Opcode() == Op_AndI ) {
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// An AND mask of sufficient size clears the low bits and
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// I can avoid rounding.
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const TypeInt *andconi = phase->type( dividend->in(2) )->isa_int();
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if( andconi && andconi->is_con(-d) ) {
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dividend = dividend->in(1);
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needs_rounding = false;
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const TypeInt *andconi_t = phase->type( dividend->in(2) )->isa_int();
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if( andconi_t && andconi_t->is_con() ) {
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jint andconi = andconi_t->get_con();
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if( andconi < 0 && is_power_of_2(-andconi) && (-andconi) >= d ) {
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dividend = dividend->in(1);
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needs_rounding = false;
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}
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}
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}
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@ -316,10 +319,13 @@ static Node *transform_long_divide( PhaseGVN *phase, Node *dividend, jlong divis
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} else if( dividend->Opcode() == Op_AndL ) {
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// An AND mask of sufficient size clears the low bits and
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// I can avoid rounding.
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const TypeLong *andconl = phase->type( dividend->in(2) )->isa_long();
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if( andconl && andconl->is_con(-d)) {
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dividend = dividend->in(1);
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needs_rounding = false;
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const TypeLong *andconl_t = phase->type( dividend->in(2) )->isa_long();
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if( andconl_t && andconl_t->is_con() ) {
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jlong andconl = andconl_t->get_con();
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if( andconl < 0 && is_power_of_2_long(-andconl) && (-andconl) >= d ) {
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dividend = dividend->in(1);
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needs_rounding = false;
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}
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}
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}
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