mirror of
https://github.com/openjdk/jdk.git
synced 2025-08-27 14:54:52 +02:00
8077618: Move rtmLocking.cpp to shared directory
Reviewed-by: dholmes, kvn
This commit is contained in:
parent
cd3cc29559
commit
af1efee490
3 changed files with 23 additions and 10 deletions
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 1999, 2014, Oracle and/or its affiliates. All rights reserved.
|
* Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
|
||||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||||
*
|
*
|
||||||
* This code is free software; you can redistribute it and/or modify it
|
* This code is free software; you can redistribute it and/or modify it
|
||||||
|
@ -58,4 +58,9 @@ const bool CCallingConventionRequiresIntsAsLongs = false;
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if defined(COMPILER2) && !defined(JAVASE_EMBEDDED)
|
||||||
|
// Include Restricted Transactional Memory lock eliding optimization
|
||||||
|
#define INCLUDE_RTM_OPT 1
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif // CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP
|
#endif // CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP
|
||||||
|
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
|
* Copyright (c) 2014, 2015, Oracle and/or its affiliates. All rights reserved.
|
||||||
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
|
||||||
*
|
*
|
||||||
* This code is free software; you can redistribute it and/or modify it
|
* This code is free software; you can redistribute it and/or modify it
|
||||||
|
@ -23,10 +23,15 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "precompiled.hpp"
|
#include "precompiled.hpp"
|
||||||
|
#include "utilities/globalDefinitions.hpp"
|
||||||
|
|
||||||
|
#if INCLUDE_RTM_OPT
|
||||||
|
|
||||||
#include "memory/allocation.inline.hpp"
|
#include "memory/allocation.inline.hpp"
|
||||||
#include "runtime/task.hpp"
|
#include "runtime/task.hpp"
|
||||||
#include "runtime/rtmLocking.hpp"
|
#include "runtime/rtmLocking.hpp"
|
||||||
|
|
||||||
|
|
||||||
// One-shot PeriodicTask subclass for enabling RTM locking
|
// One-shot PeriodicTask subclass for enabling RTM locking
|
||||||
uintx RTMLockingCounters::_calculation_flag = 0;
|
uintx RTMLockingCounters::_calculation_flag = 0;
|
||||||
|
|
||||||
|
@ -58,3 +63,5 @@ void RTMLockingCounters::print_on(outputStream* st) {
|
||||||
tty->print_cr("# rtm lock aborts %d: " UINTX_FORMAT, i, _abortX_count[i]);
|
tty->print_cr("# rtm lock aborts %d: " UINTX_FORMAT, i, _abortX_count[i]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#endif
|
|
@ -407,14 +407,6 @@ const uint64_t KlassEncodingMetaspaceMax = (uint64_t(max_juint) + 1) << LogKlas
|
||||||
|
|
||||||
// Machine dependent stuff
|
// Machine dependent stuff
|
||||||
|
|
||||||
#if defined(X86) && defined(COMPILER2) && !defined(JAVASE_EMBEDDED)
|
|
||||||
// Include Restricted Transactional Memory lock eliding optimization
|
|
||||||
#define INCLUDE_RTM_OPT 1
|
|
||||||
#define RTM_OPT_ONLY(code) code
|
|
||||||
#else
|
|
||||||
#define INCLUDE_RTM_OPT 0
|
|
||||||
#define RTM_OPT_ONLY(code)
|
|
||||||
#endif
|
|
||||||
// States of Restricted Transactional Memory usage.
|
// States of Restricted Transactional Memory usage.
|
||||||
enum RTMState {
|
enum RTMState {
|
||||||
NoRTM = 0x2, // Don't use RTM
|
NoRTM = 0x2, // Don't use RTM
|
||||||
|
@ -446,6 +438,15 @@ enum RTMState {
|
||||||
# include "globalDefinitions_aarch64.hpp"
|
# include "globalDefinitions_aarch64.hpp"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifndef INCLUDE_RTM_OPT
|
||||||
|
#define INCLUDE_RTM_OPT 0
|
||||||
|
#endif
|
||||||
|
#if INCLUDE_RTM_OPT
|
||||||
|
#define RTM_OPT_ONLY(code) code
|
||||||
|
#else
|
||||||
|
#define RTM_OPT_ONLY(code)
|
||||||
|
#endif
|
||||||
|
|
||||||
// To assure the IRIW property on processors that are not multiple copy
|
// To assure the IRIW property on processors that are not multiple copy
|
||||||
// atomic, sync instructions must be issued between volatile reads to
|
// atomic, sync instructions must be issued between volatile reads to
|
||||||
// assure their ordering, instead of after volatile stores.
|
// assure their ordering, instead of after volatile stores.
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue