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6953477: Increase portability and flexibility of building Hotspot
A collection of portability improvements including shared code support for PPC, ARM platforms, software floating point, cross compilation support and improvements in error crash detail. Reviewed-by: phh, never, coleenp, dholmes
This commit is contained in:
Bob Vandette
parent
c45761e2a8
commit
b95c7e9523
113 changed files with 1669 additions and 559 deletions
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@ -50,8 +50,7 @@ XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
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#endif // X86
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#ifdef SPARC
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#if defined(SPARC) || defined(PPC)
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FloatRegister LIR_OprDesc::as_float_reg() const {
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return FrameMap::nr2floatreg(fpu_regnr());
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@ -63,6 +62,19 @@ FloatRegister LIR_OprDesc::as_double_reg() const {
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#endif
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#ifdef ARM
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FloatRegister LIR_OprDesc::as_float_reg() const {
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return as_FloatRegister(fpu_regnr());
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}
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FloatRegister LIR_OprDesc::as_double_reg() const {
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return as_FloatRegister(fpu_regnrLo());
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}
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#endif
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LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
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LIR_Opr LIR_OprFact::value_type(ValueType* type) {
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@ -119,10 +131,14 @@ LIR_Address::Scale LIR_Address::scale(BasicType type) {
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#ifndef PRODUCT
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void LIR_Address::verify() const {
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#ifdef SPARC
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assert(scale() == times_1, "Scaled addressing mode not available on SPARC and should not be used");
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#if defined(SPARC) || defined(PPC)
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assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
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assert(disp() == 0 || index()->is_illegal(), "can't have both");
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#endif
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#ifdef ARM
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assert(disp() == 0 || index()->is_illegal(), "can't have both");
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assert(-4096 < disp() && disp() < 4096, "architecture constraint");
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#endif
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#ifdef _LP64
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assert(base()->is_cpu_register(), "wrong base operand");
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assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
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@ -173,13 +189,22 @@ void LIR_OprDesc::validate_type() const {
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if (!is_pointer() && !is_illegal()) {
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switch (as_BasicType(type_field())) {
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case T_LONG:
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assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == double_size, "must match");
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assert((kind_field() == cpu_register || kind_field() == stack_value) &&
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size_field() == double_size, "must match");
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break;
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case T_FLOAT:
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assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == single_size, "must match");
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// FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
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assert((kind_field() == fpu_register || kind_field() == stack_value
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ARM_ONLY(|| kind_field() == cpu_register)
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PPC_ONLY(|| kind_field() == cpu_register) ) &&
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size_field() == single_size, "must match");
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break;
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case T_DOUBLE:
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assert((kind_field() == fpu_register || kind_field() == stack_value) && size_field() == double_size, "must match");
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// FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
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assert((kind_field() == fpu_register || kind_field() == stack_value
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ARM_ONLY(|| kind_field() == cpu_register)
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PPC_ONLY(|| kind_field() == cpu_register) ) &&
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size_field() == double_size, "must match");
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break;
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case T_BOOLEAN:
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case T_CHAR:
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@ -188,7 +213,8 @@ void LIR_OprDesc::validate_type() const {
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case T_INT:
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case T_OBJECT:
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case T_ARRAY:
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assert((kind_field() == cpu_register || kind_field() == stack_value) && size_field() == single_size, "must match");
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assert((kind_field() == cpu_register || kind_field() == stack_value) &&
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size_field() == single_size, "must match");
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break;
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case T_ILLEGAL:
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@ -503,6 +529,10 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
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assert(opConvert->_info == NULL, "must be");
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if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
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if (opConvert->_result->is_valid()) do_output(opConvert->_result);
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#ifdef PPC
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if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
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if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
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#endif
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do_stub(opConvert->_stub);
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break;
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@ -530,7 +560,9 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
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LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
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if (opAllocObj->_info) do_info(opAllocObj->_info);
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if (opAllocObj->_opr->is_valid()) do_input(opAllocObj->_opr);
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if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
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do_temp(opAllocObj->_opr);
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}
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if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
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if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
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if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
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@ -826,10 +858,16 @@ void LIR_OpVisitState::visit(LIR_Op* op) {
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assert(op->as_OpCompareAndSwap() != NULL, "must be");
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LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
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assert(opCompareAndSwap->_addr->is_valid(), "used");
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assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
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assert(opCompareAndSwap->_new_value->is_valid(), "used");
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if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
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if (opCompareAndSwap->_addr->is_valid()) do_input(opCompareAndSwap->_addr);
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if (opCompareAndSwap->_cmp_value->is_valid()) do_input(opCompareAndSwap->_cmp_value);
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if (opCompareAndSwap->_new_value->is_valid()) do_input(opCompareAndSwap->_new_value);
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do_input(opCompareAndSwap->_addr);
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do_temp(opCompareAndSwap->_addr);
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do_input(opCompareAndSwap->_cmp_value);
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do_temp(opCompareAndSwap->_cmp_value);
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do_input(opCompareAndSwap->_new_value);
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do_temp(opCompareAndSwap->_new_value);
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if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
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if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
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if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
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@ -1303,13 +1341,13 @@ void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scrat
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info));
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}
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void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, CodeStub* stub) {
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void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
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append(new LIR_OpLock(
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lir_unlock,
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hdr,
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obj,
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lock,
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LIR_OprFact::illegalOpr,
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scratch,
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stub,
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NULL));
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}
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@ -1342,22 +1380,19 @@ void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr
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}
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void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
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// Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
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// implying successful swap of new_value into addr
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append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2));
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void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
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LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
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append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
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}
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void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
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// Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
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// implying successful swap of new_value into addr
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append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2));
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void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
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LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
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append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
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}
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void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, LIR_Opr t1, LIR_Opr t2) {
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// Compare and swap produces condition code "zero" if contents_of(addr) == cmp_value,
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// implying successful swap of new_value into addr
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append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2));
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void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
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LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
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append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
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}
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@ -1400,6 +1435,11 @@ void LIR_OprDesc::print(outputStream* out) const {
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out->print("fpu%d", fpu_regnr());
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} else if (is_double_fpu()) {
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out->print("fpu%d", fpu_regnrLo());
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#elif defined(ARM)
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} else if (is_single_fpu()) {
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out->print("s%d", fpu_regnr());
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} else if (is_double_fpu()) {
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out->print("d%d", fpu_regnrLo() >> 1);
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#else
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} else if (is_single_fpu()) {
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out->print(as_float_reg()->name());
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@ -1756,6 +1796,12 @@ void LIR_OpConvert::print_instr(outputStream* out) const {
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print_bytecode(out, bytecode());
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in_opr()->print(out); out->print(" ");
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result_opr()->print(out); out->print(" ");
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#ifdef PPC
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if(tmp1()->is_valid()) {
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tmp1()->print(out); out->print(" ");
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tmp2()->print(out); out->print(" ");
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}
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#endif
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}
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void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
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