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6953477: Increase portability and flexibility of building Hotspot

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A collection of portability improvements including shared code support for PPC, ARM platforms, software floating point, cross compilation support and improvements in error crash detail.

Reviewed-by: phh, never, coleenp, dholmes
This commit is contained in:
Bob Vandette 2010-08-03 08:13:38 -04:00
parent c45761e2a8
commit b95c7e9523
113 changed files with 1669 additions and 559 deletions
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48
hotspot/src/share/vm/c1/c1_LIRGenerator.cpp
View file

@ -31,6 +31,12 @@
#define __ gen()->lir()->
#endif
// TODO: ARM - Use some recognizable constant which still fits architectural constraints
#ifdef ARM
#define PATCHED_ADDR (204)
#else
#define PATCHED_ADDR (max_jint)
#endif
void PhiResolverState::reset(int max_vregs) {
// Initialize array sizes
@ -225,13 +231,13 @@ void LIRItem::load_for_store(BasicType type) {
void LIRItem::load_item_force(LIR_Opr reg) {
LIR_Opr r = result();
if (r != reg) {
#if !defined(ARM) && !defined(E500V2)
if (r->type() != reg->type()) {
// moves between different types need an intervening spill slot
LIR_Opr tmp = _gen->force_to_spill(r, reg->type());
__ move(tmp, reg);
} else {
__ move(r, reg);
r = _gen->force_to_spill(r, reg->type());
}
#endif
__ move(r, reg);
_result = reg;
}
}
@ -628,14 +634,14 @@ void LIRGenerator::monitor_enter(LIR_Opr object, LIR_Opr lock, LIR_Opr hdr, LIR_
}
void LIRGenerator::monitor_exit(LIR_Opr object, LIR_Opr lock, LIR_Opr new_hdr, int monitor_no) {
void LIRGenerator::monitor_exit(LIR_Opr object, LIR_Opr lock, LIR_Opr new_hdr, LIR_Opr scratch, int monitor_no) {
if (!GenerateSynchronizationCode) return;
// setup registers
LIR_Opr hdr = lock;
lock = new_hdr;
CodeStub* slow_path = new MonitorExitStub(lock, UseFastLocking, monitor_no);
__ load_stack_address_monitor(monitor_no, lock);
__ unlock_object(hdr, object, lock, slow_path);
__ unlock_object(hdr, object, lock, scratch, slow_path);
}
@ -1400,6 +1406,25 @@ void LIRGenerator::CardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc*
}
assert(addr->is_register(), "must be a register at this point");
#ifdef ARM
// TODO: ARM - move to platform-dependent code
LIR_Opr tmp = FrameMap::R14_opr;
if (VM_Version::supports_movw()) {
__ move((LIR_Opr)card_table_base, tmp);
} else {
__ move(new LIR_Address(FrameMap::Rthread_opr, in_bytes(JavaThread::card_table_base_offset()), T_ADDRESS), tmp);
}
CardTableModRefBS* ct = (CardTableModRefBS*)_bs;
LIR_Address *card_addr = new LIR_Address(tmp, addr, (LIR_Address::Scale) -CardTableModRefBS::card_shift, 0, T_BYTE);
if(((int)ct->byte_map_base & 0xff) == 0) {
__ move(tmp, card_addr);
} else {
LIR_Opr tmp_zero = new_register(T_INT);
__ move(LIR_OprFact::intConst(0), tmp_zero);
__ move(tmp_zero, card_addr);
}
#else // ARM
LIR_Opr tmp = new_pointer_register();
if (TwoOperandLIRForm) {
__ move(addr, tmp);
@ -1415,6 +1440,7 @@ void LIRGenerator::CardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_OprDesc*
new LIR_Address(tmp, load_constant(card_table_base),
T_BYTE));
}
#endif // ARM
}
@ -1507,7 +1533,7 @@ void LIRGenerator::do_StoreField(StoreField* x) {
// generate_address to try to be smart about emitting the -1.
// Otherwise the patching code won't know how to find the
// instruction to patch.
address = new LIR_Address(object.result(), max_jint, field_type);
address = new LIR_Address(object.result(), PATCHED_ADDR, field_type);
} else {
address = generate_address(object.result(), x->offset(), field_type);
}
@ -1584,7 +1610,7 @@ void LIRGenerator::do_LoadField(LoadField* x) {
// generate_address to try to be smart about emitting the -1.
// Otherwise the patching code won't know how to find the
// instruction to patch.
address = new LIR_Address(object.result(), max_jint, field_type);
address = new LIR_Address(object.result(), PATCHED_ADDR, field_type);
} else {
address = generate_address(object.result(), x->offset(), field_type);
}
@ -1844,6 +1870,8 @@ void LIRGenerator::do_UnsafeGetRaw(UnsafeGetRaw* x) {
}
#endif
addr = new LIR_Address(base_op, index_op, LIR_Address::Scale(log2_scale), 0, dst_type);
#elif defined(ARM)
addr = generate_address(base_op, index_op, log2_scale, 0, dst_type);
#else
if (index_op->is_illegal() || log2_scale == 0) {
#ifdef _LP64
@ -1916,6 +1944,7 @@ void LIRGenerator::do_UnsafePutRaw(UnsafePutRaw* x) {
__ convert(Bytecodes::_i2l, idx.result(), index_op);
} else {
#endif
// TODO: ARM also allows embedded shift in the address
__ move(idx.result(), index_op);
#ifdef _LP64
}
@ -2204,7 +2233,10 @@ void LIRGenerator::do_Base(Base* x) {
// Assign new location to Local instruction for this local
Local* local = x->state()->local_at(java_index)->as_Local();
assert(local != NULL, "Locals for incoming arguments must have been created");
#ifndef __SOFTFP__
// The java calling convention passes double as long and float as int.
assert(as_ValueType(t)->tag() == local->type()->tag(), "check");
#endif // __SOFTFP__
local->set_operand(dest);
_instruction_for_operand.at_put_grow(dest->vreg_number(), local, NULL);
java_index += type2size[t];