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8296916: RISC-V: Move some small macro-assembler functions to header file
Reviewed-by: fjiang, yadongwang, shade
This commit is contained in:
Fei Yang
parent
720c3d08c6
commit
c3b285a8ac
3 changed files with 146 additions and 186 deletions
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@ -670,96 +670,6 @@ void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Reg
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MacroAssembler::call_VM_leaf_base(entry_point, 4);
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}
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void MacroAssembler::nop() {
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addi(x0, x0, 0);
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}
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void MacroAssembler::mv(Register Rd, Register Rs) {
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if (Rd != Rs) {
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addi(Rd, Rs, 0);
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}
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}
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void MacroAssembler::notr(Register Rd, Register Rs) {
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xori(Rd, Rs, -1);
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}
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void MacroAssembler::neg(Register Rd, Register Rs) {
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sub(Rd, x0, Rs);
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}
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void MacroAssembler::negw(Register Rd, Register Rs) {
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subw(Rd, x0, Rs);
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}
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void MacroAssembler::sext_w(Register Rd, Register Rs) {
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addiw(Rd, Rs, 0);
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}
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void MacroAssembler::zext_b(Register Rd, Register Rs) {
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andi(Rd, Rs, 0xFF);
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}
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void MacroAssembler::seqz(Register Rd, Register Rs) {
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sltiu(Rd, Rs, 1);
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}
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void MacroAssembler::snez(Register Rd, Register Rs) {
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sltu(Rd, x0, Rs);
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}
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void MacroAssembler::sltz(Register Rd, Register Rs) {
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slt(Rd, Rs, x0);
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}
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void MacroAssembler::sgtz(Register Rd, Register Rs) {
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slt(Rd, x0, Rs);
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}
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void MacroAssembler::fmv_s(FloatRegister Rd, FloatRegister Rs) {
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if (Rd != Rs) {
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fsgnj_s(Rd, Rs, Rs);
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}
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}
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void MacroAssembler::fabs_s(FloatRegister Rd, FloatRegister Rs) {
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fsgnjx_s(Rd, Rs, Rs);
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}
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void MacroAssembler::fneg_s(FloatRegister Rd, FloatRegister Rs) {
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fsgnjn_s(Rd, Rs, Rs);
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}
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void MacroAssembler::fmv_d(FloatRegister Rd, FloatRegister Rs) {
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if (Rd != Rs) {
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fsgnj_d(Rd, Rs, Rs);
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}
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}
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void MacroAssembler::fabs_d(FloatRegister Rd, FloatRegister Rs) {
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fsgnjx_d(Rd, Rs, Rs);
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}
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void MacroAssembler::fneg_d(FloatRegister Rd, FloatRegister Rs) {
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fsgnjn_d(Rd, Rs, Rs);
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}
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void MacroAssembler::vmnot_m(VectorRegister vd, VectorRegister vs) {
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vmnand_mm(vd, vs, vs);
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}
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void MacroAssembler::vncvt_x_x_w(VectorRegister vd, VectorRegister vs, VectorMask vm) {
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vnsrl_wx(vd, vs, x0, vm);
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}
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void MacroAssembler::vneg_v(VectorRegister vd, VectorRegister vs) {
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vrsub_vx(vd, vs, x0);
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}
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void MacroAssembler::vfneg_v(VectorRegister vd, VectorRegister vs) {
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vfsgnjn_vv(vd, vs, vs);
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}
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void MacroAssembler::baseOffset32(Register Rd, const Address &adr, int32_t &offset) {
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assert(Rd != noreg, "Rd must not be empty register!");
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guarantee(Rd != adr.base(), "should use different registers!");
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@ -1625,21 +1535,6 @@ void MacroAssembler::reinit_heapbase() {
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}
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}
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void MacroAssembler::mv(Register Rd, Address dest) {
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assert(dest.getMode() == Address::literal, "Address mode should be Address::literal");
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relocate(dest.rspec(), [&] {
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movptr(Rd, dest.target());
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});
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}
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void MacroAssembler::mv(Register Rd, RegisterOrConstant src) {
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if (src.is_register()) {
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mv(Rd, src.as_register());
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} else {
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mv(Rd, src.as_constant());
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}
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}
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void MacroAssembler::movptr(Register Rd, address addr, int32_t &offset) {
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int64_t imm64 = (int64_t)addr;
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#ifndef PRODUCT
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@ -1669,16 +1564,6 @@ void MacroAssembler::movptr(Register Rd, address addr, int32_t &offset) {
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offset = imm64 & 0x3f;
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}
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void MacroAssembler::movptr(Register Rd, uintptr_t imm64) {
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movptr(Rd, (address)imm64);
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}
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void MacroAssembler::movptr(Register Rd, address addr) {
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int offset = 0;
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movptr(Rd, addr, offset);
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addi(Rd, Rd, offset);
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}
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void MacroAssembler::add(Register Rd, Register Rn, int64_t increment, Register temp) {
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if (is_imm_in_range(increment, 12, 0)) {
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addi(Rd, Rn, increment);
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@ -3357,8 +3242,7 @@ void MacroAssembler::load_method_holder(Register holder, Register method) {
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void MacroAssembler::compute_index(Register haystack, Register trailing_zeros,
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Register match_mask, Register result,
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Register ch2, Register tmp,
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bool haystack_isL)
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{
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bool haystack_isL) {
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int haystack_chr_shift = haystack_isL ? 0 : 1;
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srl(match_mask, match_mask, trailing_zeros);
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srli(match_mask, match_mask, 1);
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@ -3379,8 +3263,7 @@ void MacroAssembler::compute_index(Register haystack, Register trailing_zeros,
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// - 0x8000800080008000 (UTF16)
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// - 3 2 1 0 (match index)
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void MacroAssembler::compute_match_mask(Register src, Register pattern, Register match_mask,
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Register mask1, Register mask2)
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{
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Register mask1, Register mask2) {
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xorr(src, pattern, src);
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sub(match_mask, src, mask1);
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orr(src, src, mask2);
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@ -3464,24 +3347,21 @@ void MacroAssembler::cad(Register dst, Register src1, Register src2, Register ca
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}
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// add two input with carry
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void MacroAssembler::adc(Register dst, Register src1, Register src2, Register carry)
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{
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void MacroAssembler::adc(Register dst, Register src1, Register src2, Register carry) {
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assert_different_registers(dst, carry);
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add(dst, src1, src2);
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add(dst, dst, carry);
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}
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// add two unsigned input with carry and output carry
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void MacroAssembler::cadc(Register dst, Register src1, Register src2, Register carry)
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{
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void MacroAssembler::cadc(Register dst, Register src1, Register src2, Register carry) {
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assert_different_registers(dst, src2);
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adc(dst, src1, src2, carry);
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sltu(carry, dst, src2);
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}
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void MacroAssembler::add2_with_carry(Register final_dest_hi, Register dest_hi, Register dest_lo,
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Register src1, Register src2, Register carry)
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{
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Register src1, Register src2, Register carry) {
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cad(dest_lo, dest_lo, src1, carry);
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add(dest_hi, dest_hi, carry);
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cad(dest_lo, dest_lo, src2, carry);
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@ -3494,8 +3374,7 @@ void MacroAssembler::add2_with_carry(Register final_dest_hi, Register dest_hi, R
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void MacroAssembler::multiply_32_x_32_loop(Register x, Register xstart, Register x_xstart,
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Register y, Register y_idx, Register z,
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Register carry, Register product,
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Register idx, Register kdx)
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{
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Register idx, Register kdx) {
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// jlong carry, x[], y[], z[];
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// for (int idx=ystart, kdx=ystart+1+xstart; idx >= 0; idx--, kdx--) {
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// long product = y[idx] * x[xstart] + carry;
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@ -3531,8 +3410,7 @@ void MacroAssembler::multiply_32_x_32_loop(Register x, Register xstart, Register
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void MacroAssembler::multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
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Register y, Register y_idx, Register z,
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Register carry, Register product,
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Register idx, Register kdx)
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{
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Register idx, Register kdx) {
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//
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// jlong carry, x[], y[], z[];
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// for (int idx=ystart, kdx=ystart+1+xstart; idx >= 0; idx--, kdx--) {
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@ -3596,8 +3474,7 @@ void MacroAssembler::multiply_128_x_128_loop(Register y, Register z,
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Register idx, Register jdx,
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Register yz_idx1, Register yz_idx2,
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Register tmp, Register tmp3, Register tmp4,
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Register tmp6, Register product_hi)
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{
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Register tmp6, Register product_hi) {
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// jlong carry, x[], y[], z[];
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// int kdx = xstart+1;
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// for (int idx=ystart-2; idx >= 0; idx -= 2) { // Third loop
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@ -3732,8 +3609,7 @@ void MacroAssembler::multiply_128_x_128_loop(Register y, Register z,
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void MacroAssembler::multiply_to_len(Register x, Register xlen, Register y, Register ylen,
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Register z, Register zlen,
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Register tmp1, Register tmp2, Register tmp3, Register tmp4,
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Register tmp5, Register tmp6, Register product_hi)
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{
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Register tmp5, Register tmp6, Register product_hi) {
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assert_different_registers(x, xlen, y, ylen, z, zlen, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6);
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const Register idx = tmp1;
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@ -3897,8 +3773,7 @@ void MacroAssembler::multiply_to_len(Register x, Register xlen, Register y, Regi
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// Count bits of trailing zero chars from lsb to msb until first non-zero element.
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// For LL case, one byte for one element, so shift 8 bits once, and for other case,
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// shift 16 bits once.
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void MacroAssembler::ctzc_bit(Register Rd, Register Rs, bool isLL, Register tmp1, Register tmp2)
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{
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void MacroAssembler::ctzc_bit(Register Rd, Register Rs, bool isLL, Register tmp1, Register tmp2) {
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if (UseZbb) {
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assert_different_registers(Rd, Rs, tmp1);
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int step = isLL ? 8 : 16;
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@ -3907,6 +3782,7 @@ void MacroAssembler::ctzc_bit(Register Rd, Register Rs, bool isLL, Register tmp1
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sub(Rd, Rd, tmp1);
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return;
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}
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assert_different_registers(Rd, Rs, tmp1, tmp2);
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Label Loop;
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int step = isLL ? 8 : 16;
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@ -3924,13 +3800,12 @@ void MacroAssembler::ctzc_bit(Register Rd, Register Rs, bool isLL, Register tmp1
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// inflate into a register, for example:
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// Rs: A7A6A5A4A3A2A1A0
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// Rd: 00A300A200A100A0
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void MacroAssembler::inflate_lo32(Register Rd, Register Rs, Register tmp1, Register tmp2)
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{
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void MacroAssembler::inflate_lo32(Register Rd, Register Rs, Register tmp1, Register tmp2) {
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assert_different_registers(Rd, Rs, tmp1, tmp2);
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mv(tmp1, 0xFF);
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mv(Rd, zr);
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for (int i = 0; i <= 3; i++)
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{
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for (int i = 0; i <= 3; i++) {
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andr(tmp2, Rs, tmp1);
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if (i) {
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slli(tmp2, tmp2, i * 8);
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@ -3946,13 +3821,12 @@ void MacroAssembler::inflate_lo32(Register Rd, Register Rs, Register tmp1, Regis
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// inflate into a register, for example:
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// Rs: A7A6A5A4A3A2A1A0
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// Rd: 00A700A600A500A4
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void MacroAssembler::inflate_hi32(Register Rd, Register Rs, Register tmp1, Register tmp2)
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{
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void MacroAssembler::inflate_hi32(Register Rd, Register Rs, Register tmp1, Register tmp2) {
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assert_different_registers(Rd, Rs, tmp1, tmp2);
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mv(tmp1, 0xFF00000000);
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mv(Rd, zr);
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for (int i = 0; i <= 3; i++)
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{
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for (int i = 0; i <= 3; i++) {
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andr(tmp2, Rs, tmp1);
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orr(Rd, Rd, tmp2);
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srli(Rd, Rd, 8);
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@ -3975,13 +3849,13 @@ const int MacroAssembler::zero_words_block_size = 8;
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// cnt: Count in HeapWords.
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//
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// ptr, cnt, and t0 are clobbered.
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address MacroAssembler::zero_words(Register ptr, Register cnt)
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{
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address MacroAssembler::zero_words(Register ptr, Register cnt) {
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assert(is_power_of_2(zero_words_block_size), "adjust this");
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assert(ptr == x28 && cnt == x29, "mismatch in register usage");
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assert_different_registers(cnt, t0);
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BLOCK_COMMENT("zero_words {");
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mv(t0, zero_words_block_size);
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Label around, done, done16;
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bltu(cnt, t0, around);
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@ -4017,6 +3891,7 @@ address MacroAssembler::zero_words(Register ptr, Register cnt)
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sd(zr, Address(ptr, 0));
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bind(l);
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}
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BLOCK_COMMENT("} zero_words");
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postcond(pc() != badAddress);
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return pc();
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@ -4026,8 +3901,7 @@ address MacroAssembler::zero_words(Register ptr, Register cnt)
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// base: Address of a buffer to be zeroed, 8 bytes aligned.
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// cnt: Immediate count in HeapWords.
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void MacroAssembler::zero_words(Register base, uint64_t cnt)
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{
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void MacroAssembler::zero_words(Register base, uint64_t cnt) {
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assert_different_registers(base, t0, t1);
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BLOCK_COMMENT("zero_words {");
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@ -4065,8 +3939,7 @@ void MacroAssembler::zero_words(Register base, uint64_t cnt)
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// cnt: Count in 8-byte unit.
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// value: Value to be filled with.
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// base will point to the end of the buffer after filling.
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void MacroAssembler::fill_words(Register base, Register cnt, Register value)
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{
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void MacroAssembler::fill_words(Register base, Register cnt, Register value) {
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// Algorithm:
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//
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// t0 = cnt & 7
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@ -4413,6 +4286,7 @@ void MacroAssembler::object_move(OopMap* map,
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bool is_receiver,
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int* receiver_offset) {
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assert_cond(map != NULL && receiver_offset != NULL);
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// must pass a handle. First figure out the location we use as a handle
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Register rHandle = dst.first()->is_stack() ? t1 : dst.first()->as_Register();
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