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8042059: Various fixes to linux/sparc
Reviewed-by: twisti, kvn
This commit is contained in:
parent
e88c91e4c3
commit
c781bb874f
5 changed files with 29 additions and 33 deletions
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@ -34,19 +34,7 @@
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#include "libproc_md.h"
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#include "libproc_md.h"
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#endif
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#endif
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#if defined(sparc) || defined(sparcv9)
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#include <linux/ptrace.h>
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/*
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If _LP64 is defined ptrace.h should be taken from /usr/include/asm-sparc64
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otherwise it should be from /usr/include/asm-sparc
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These two files define pt_regs structure differently
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*/
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#ifdef _LP64
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#include "asm-sparc64/ptrace.h"
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#else
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#include "asm-sparc/ptrace.h"
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#endif
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#endif //sparc or sparcv9
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/************************************************************************************
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/************************************************************************************
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@ -259,8 +259,8 @@
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// next two fns read and write Lmonitors value,
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// next two fns read and write Lmonitors value,
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private:
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private:
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BasicObjectLock* interpreter_frame_monitors() const { return *interpreter_frame_monitors_addr(); }
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BasicObjectLock* interpreter_frame_monitors() const;
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void interpreter_frame_set_monitors(BasicObjectLock* monitors) { *interpreter_frame_monitors_addr() = monitors; }
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void interpreter_frame_set_monitors(BasicObjectLock* monitors);
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#else
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#else
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public:
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public:
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inline interpreterState get_interpreterState() const {
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inline interpreterState get_interpreterState() const {
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@ -226,6 +226,13 @@ inline Method** frame::interpreter_frame_method_addr() const {
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return (Method**)sp_addr_at( Lmethod->sp_offset_in_saved_window());
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return (Method**)sp_addr_at( Lmethod->sp_offset_in_saved_window());
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}
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}
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inline BasicObjectLock* frame::interpreter_frame_monitors() const {
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return *interpreter_frame_monitors_addr();
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}
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inline void frame::interpreter_frame_set_monitors(BasicObjectLock* monitors) {
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*interpreter_frame_monitors_addr() = monitors;
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}
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// Constant pool cache
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// Constant pool cache
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@ -78,12 +78,12 @@ inline intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest) {
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__asm__ volatile(
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__asm__ volatile(
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"1: \n\t"
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"1: \n\t"
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" ldx [%2], %%o2\n\t"
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" ldx [%2], %%o2\n\t"
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" add %0, %%o2, %%o3\n\t"
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" add %1, %%o2, %%o3\n\t"
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" casx [%2], %%o2, %%o3\n\t"
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" casx [%2], %%o2, %%o3\n\t"
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" cmp %%o2, %%o3\n\t"
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" cmp %%o2, %%o3\n\t"
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" bne %%xcc, 1b\n\t"
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" bne %%xcc, 1b\n\t"
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" nop\n\t"
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" nop\n\t"
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" add %0, %%o2, %0\n\t"
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" add %1, %%o2, %0\n\t"
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: "=r" (rv)
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: "=r" (rv)
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: "r" (add_value), "r" (dest)
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: "r" (add_value), "r" (dest)
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: "memory", "o2", "o3");
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: "memory", "o2", "o3");
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@ -302,29 +302,30 @@ void os::print_register_info(outputStream *st, void *context) {
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if (context == NULL) return;
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if (context == NULL) return;
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ucontext_t *uc = (ucontext_t*)context;
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ucontext_t *uc = (ucontext_t*)context;
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sigcontext* sc = (sigcontext*)context;
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intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc);
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intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc);
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st->print_cr("Register to memory mapping:");
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st->print_cr("Register to memory mapping:");
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st->cr();
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st->cr();
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// this is only for the "general purpose" registers
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// this is only for the "general purpose" registers
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st->print("G1="); print_location(st, SIG_REGS(sc).u_regs[CON__G1]);
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st->print("G1="); print_location(st, SIG_REGS(sc).u_regs[CON_G1]);
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st->print("G2="); print_location(st, SIG_REGS(sc).u_regs[CON__G2]);
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st->print("G2="); print_location(st, SIG_REGS(sc).u_regs[CON_G2]);
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st->print("G3="); print_location(st, SIG_REGS(sc).u_regs[CON__G3]);
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st->print("G3="); print_location(st, SIG_REGS(sc).u_regs[CON_G3]);
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st->print("G4="); print_location(st, SIG_REGS(sc).u_regs[CON__G4]);
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st->print("G4="); print_location(st, SIG_REGS(sc).u_regs[CON_G4]);
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st->print("G5="); print_location(st, SIG_REGS(sc).u_regs[CON__G5]);
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st->print("G5="); print_location(st, SIG_REGS(sc).u_regs[CON_G5]);
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st->print("G6="); print_location(st, SIG_REGS(sc).u_regs[CON__G6]);
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st->print("G6="); print_location(st, SIG_REGS(sc).u_regs[CON_G6]);
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st->print("G7="); print_location(st, SIG_REGS(sc).u_regs[CON__G7]);
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st->print("G7="); print_location(st, SIG_REGS(sc).u_regs[CON_G7]);
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st->cr();
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st->cr();
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st->print("O0="); print_location(st, SIG_REGS(sc).u_regs[CON__O0]);
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st->print("O0="); print_location(st, SIG_REGS(sc).u_regs[CON_O0]);
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st->print("O1="); print_location(st, SIG_REGS(sc).u_regs[CON__O1]);
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st->print("O1="); print_location(st, SIG_REGS(sc).u_regs[CON_O1]);
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st->print("O2="); print_location(st, SIG_REGS(sc).u_regs[CON__O2]);
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st->print("O2="); print_location(st, SIG_REGS(sc).u_regs[CON_O2]);
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st->print("O3="); print_location(st, SIG_REGS(sc).u_regs[CON__O3]);
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st->print("O3="); print_location(st, SIG_REGS(sc).u_regs[CON_O3]);
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st->print("O4="); print_location(st, SIG_REGS(sc).u_regs[CON__O4]);
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st->print("O4="); print_location(st, SIG_REGS(sc).u_regs[CON_O4]);
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st->print("O5="); print_location(st, SIG_REGS(sc).u_regs[CON__O5]);
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st->print("O5="); print_location(st, SIG_REGS(sc).u_regs[CON_O5]);
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st->print("O6="); print_location(st, SIG_REGS(sc).u_regs[CON__O6]);
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st->print("O6="); print_location(st, SIG_REGS(sc).u_regs[CON_O6]);
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st->print("O7="); print_location(st, SIG_REGS(sc).u_regs[CON__O7]);
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st->print("O7="); print_location(st, SIG_REGS(sc).u_regs[CON_O7]);
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st->cr();
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st->cr();
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st->print("L0="); print_location(st, sp[L0->sp_offset_in_saved_window()]);
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st->print("L0="); print_location(st, sp[L0->sp_offset_in_saved_window()]);
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@ -516,7 +517,7 @@ inline static bool checkICMiss(sigcontext* uc, address* pc, address* stub) {
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if (nativeInstruction_at(*pc)->is_ic_miss_trap()) {
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if (nativeInstruction_at(*pc)->is_ic_miss_trap()) {
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#ifdef ASSERT
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#ifdef ASSERT
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#ifdef TIERED
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#ifdef TIERED
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CodeBlob* cb = CodeCache::find_blob_unsafe(pc);
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CodeBlob* cb = CodeCache::find_blob_unsafe(*pc);
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assert(cb->is_compiled_by_c2(), "Wrong compiler");
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assert(cb->is_compiled_by_c2(), "Wrong compiler");
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#endif // TIERED
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#endif // TIERED
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#endif // ASSERT
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#endif // ASSERT
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