mirror of
https://github.com/openjdk/jdk.git
synced 2025-09-16 00:54:38 +02:00
8247645: ChaCha20 intrinsics
Reviewed-by: sviswanathan, ngasson, vlivanov, ascarpino
This commit is contained in:
parent
33587ffd35
commit
cd6bebbf34
28 changed files with 1590 additions and 38 deletions
|
@ -5269,6 +5269,16 @@ void Assembler::pshufhw(XMMRegister dst, XMMRegister src, int mode) {
|
|||
emit_int24(0x70, (0xC0 | encode), mode & 0xFF);
|
||||
}
|
||||
|
||||
void Assembler::vpshufhw(XMMRegister dst, XMMRegister src, int mode, int vector_len) {
|
||||
assert(vector_len == AVX_128bit ? VM_Version::supports_avx() :
|
||||
(vector_len == AVX_256bit ? VM_Version::supports_avx2() :
|
||||
(vector_len == AVX_512bit ? VM_Version::supports_avx512bw() : false)), "");
|
||||
NOT_LP64(assert(VM_Version::supports_sse2(), ""));
|
||||
InstructionAttr attributes(vector_len, /* rex_w */ false, /* legacy_mode */ _legacy_mode_bw, /* no_mask_reg */ true, /* uses_vl */ true);
|
||||
int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_F3, VEX_OPCODE_0F, &attributes);
|
||||
emit_int24(0x70, (0xC0 | encode), mode & 0xFF);
|
||||
}
|
||||
|
||||
void Assembler::pshuflw(XMMRegister dst, XMMRegister src, int mode) {
|
||||
assert(isByte(mode), "invalid value");
|
||||
NOT_LP64(assert(VM_Version::supports_sse2(), ""));
|
||||
|
@ -5290,6 +5300,16 @@ void Assembler::pshuflw(XMMRegister dst, Address src, int mode) {
|
|||
emit_int8(mode & 0xFF);
|
||||
}
|
||||
|
||||
void Assembler::vpshuflw(XMMRegister dst, XMMRegister src, int mode, int vector_len) {
|
||||
assert(vector_len == AVX_128bit ? VM_Version::supports_avx() :
|
||||
(vector_len == AVX_256bit ? VM_Version::supports_avx2() :
|
||||
(vector_len == AVX_512bit ? VM_Version::supports_avx512bw() : false)), "");
|
||||
NOT_LP64(assert(VM_Version::supports_sse2(), ""));
|
||||
InstructionAttr attributes(vector_len, /* rex_w */ false, /* legacy_mode */ _legacy_mode_bw, /* no_mask_reg */ true, /* uses_vl */ true);
|
||||
int encode = simd_prefix_and_encode(dst, xnoreg, src, VEX_SIMD_F2, VEX_OPCODE_0F, &attributes);
|
||||
emit_int24(0x70, (0xC0 | encode), mode & 0xFF);
|
||||
}
|
||||
|
||||
void Assembler::evshufi64x2(XMMRegister dst, XMMRegister nds, XMMRegister src, int imm8, int vector_len) {
|
||||
assert(VM_Version::supports_evex(), "requires EVEX support");
|
||||
assert(vector_len == Assembler::AVX_256bit || vector_len == Assembler::AVX_512bit, "");
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue