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7119644: Increase superword's vector size up to 256 bits

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Increase vector size up to 256-bits for YMM AVX registers on x86.

Reviewed-by: never, twisti, roland
This commit is contained in:
Vladimir Kozlov 2012-06-15 01:25:19 -07:00
parent 7dd9d23eb1
commit d1191bb4f4
74 changed files with 20945 additions and 3199 deletions
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4
hotspot/src/cpu/sparc/vm/vm_version_sparc.cpp
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@ -1,5 +1,5 @@
/*
* Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@ -217,6 +217,8 @@ void VM_Version::initialize() {
// Currently not supported anywhere.
FLAG_SET_DEFAULT(UseFPUForSpilling, false);
MaxVectorSize = 8;
assert((InteriorEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size");
#endif