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7193318: C2: remove number of inputs requirement from Node's new operator
Deleted placement new operator of Node - node(size_t, Compile *, int). Reviewed-by: kvn, twisti
This commit is contained in:
Bharadwaj Yadavalli
Vladimir Kozlov
parent
973fdc81a1
commit
d5d2e78faa
44 changed files with 1456 additions and 1473 deletions
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@ -198,22 +198,22 @@ Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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Node *res = NULL;
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jint bit1 = con & -con; // Extract low bit
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if( bit1 == con ) { // Found a power of 2?
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res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
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res = new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
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} else {
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// Check for constant with 2 bits set
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jint bit2 = con-bit1;
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bit2 = bit2 & -bit2; // Extract 2nd bit
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if( bit2 + bit1 == con ) { // Found all bits in con?
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Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
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Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
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res = new (phase->C, 3) AddINode( n2, n1 );
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Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
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Node *n2 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
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res = new (phase->C) AddINode( n2, n1 );
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} else if (is_power_of_2(con+1)) {
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// Sleezy: power-of-2 -1. Next time be generic.
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jint temp = (jint) (con + 1);
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Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
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res = new (phase->C, 3) SubINode( n1, in(1) );
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Node *n1 = phase->transform( new (phase->C) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
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res = new (phase->C) SubINode( n1, in(1) );
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} else {
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return MulNode::Ideal(phase, can_reshape);
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}
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@ -221,7 +221,7 @@ Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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if( sign_flip ) { // Need to negate result?
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res = phase->transform(res);// Transform, before making the zero con
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res = new (phase->C, 3) SubINode(phase->intcon(0),res);
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res = new (phase->C) SubINode(phase->intcon(0),res);
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}
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return res; // Return final result
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@ -294,22 +294,22 @@ Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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Node *res = NULL;
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jlong bit1 = con & -con; // Extract low bit
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if( bit1 == con ) { // Found a power of 2?
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res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
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res = new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
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} else {
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// Check for constant with 2 bits set
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jlong bit2 = con-bit1;
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bit2 = bit2 & -bit2; // Extract 2nd bit
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if( bit2 + bit1 == con ) { // Found all bits in con?
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Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
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Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
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res = new (phase->C, 3) AddLNode( n2, n1 );
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Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
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Node *n2 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
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res = new (phase->C) AddLNode( n2, n1 );
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} else if (is_power_of_2_long(con+1)) {
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// Sleezy: power-of-2 -1. Next time be generic.
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jlong temp = (jlong) (con + 1);
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Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
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res = new (phase->C, 3) SubLNode( n1, in(1) );
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Node *n1 = phase->transform( new (phase->C) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
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res = new (phase->C) SubLNode( n1, in(1) );
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} else {
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return MulNode::Ideal(phase, can_reshape);
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}
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@ -317,7 +317,7 @@ Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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if( sign_flip ) { // Need to negate result?
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res = phase->transform(res);// Transform, before making the zero con
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res = new (phase->C, 3) SubLNode(phase->longcon(0),res);
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res = new (phase->C) SubLNode(phase->longcon(0),res);
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}
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return res; // Return final result
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@ -476,27 +476,27 @@ Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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// Masking bits off of a Character? Hi bits are already zero.
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if( lop == Op_LoadUS &&
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(mask & 0xFFFF0000) ) // Can we make a smaller mask?
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return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF));
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return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF));
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// Masking bits off of a Short? Loading a Character does some masking
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if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
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Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control),
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Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control),
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load->in(MemNode::Memory),
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load->in(MemNode::Address),
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load->adr_type());
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ldus = phase->transform(ldus);
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return new (phase->C, 3) AndINode(ldus, phase->intcon(mask & 0xFFFF));
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return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF));
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}
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// Masking sign bits off of a Byte? Do an unsigned byte load plus
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// an and.
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if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
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Node* ldub = new (phase->C, 3) LoadUBNode(load->in(MemNode::Control),
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Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control),
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load->in(MemNode::Memory),
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load->in(MemNode::Address),
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load->adr_type());
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ldub = phase->transform(ldub);
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return new (phase->C, 3) AndINode(ldub, phase->intcon(mask));
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return new (phase->C) AndINode(ldub, phase->intcon(mask));
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}
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// Masking off sign bits? Dont make them!
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@ -510,8 +510,8 @@ Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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// bits survive. NO sign-extension bits survive the maskings.
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if( (sign_bits_mask & mask) == 0 ) {
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// Use zero-fill shift instead
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Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2)));
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return new (phase->C, 3) AndINode( zshift, in(2) );
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Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2)));
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return new (phase->C) AndINode( zshift, in(2) );
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}
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}
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}
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@ -521,7 +521,7 @@ Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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// plus 1) and the mask is of the low order bit. Skip the negate.
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if( lop == Op_SubI && mask == 1 && load->in(1) &&
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phase->type(load->in(1)) == TypeInt::ZERO )
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return new (phase->C, 3) AndINode( load->in(2), in(2) );
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return new (phase->C) AndINode( load->in(2), in(2) );
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return MulNode::Ideal(phase, can_reshape);
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}
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@ -607,7 +607,7 @@ Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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// which is wrong.
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if (op == Op_ConvI2L && in1->in(1)->Opcode() == Op_LoadI && mask == CONST64(0x00000000FFFFFFFF)) {
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Node* load = in1->in(1);
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return new (phase->C, 3) LoadUI2LNode(load->in(MemNode::Control),
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return new (phase->C) LoadUI2LNode(load->in(MemNode::Control),
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load->in(MemNode::Memory),
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load->in(MemNode::Address),
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load->adr_type());
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@ -619,9 +619,9 @@ Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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// value. This check includes UI2L masks (0x00000000FFFFFFFF) which
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// would be optimized away later in Identity.
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if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) {
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Node* andi = new (phase->C, 3) AndINode(in1->in(1), phase->intcon(mask));
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Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask));
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andi = phase->transform(andi);
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return new (phase->C, 2) ConvI2LNode(andi);
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return new (phase->C) ConvI2LNode(andi);
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}
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// Masking off sign bits? Dont make them!
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@ -635,8 +635,8 @@ Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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// bits survive. NO sign-extension bits survive the maskings.
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if( (sign_bits_mask & mask) == 0 ) {
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// Use zero-fill shift instead
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Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(in1->in(1), in1->in(2)));
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return new (phase->C, 3) AndLNode(zshift, in(2));
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Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2)));
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return new (phase->C) AndLNode(zshift, in(2));
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}
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}
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}
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@ -674,9 +674,9 @@ Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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// and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
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if( con < 16 ) {
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// Compute X << con0
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Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) );
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Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) );
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// Compute X<<con0 + (con1<<con0)
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return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con));
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return new (phase->C) AddINode( lsh, phase->intcon(t12->get_con() << con));
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}
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}
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}
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@ -685,7 +685,7 @@ Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
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add1->in(2) == in(2) )
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// Convert to "(x & -(1<<c0))"
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return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con)));
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return new (phase->C) AndINode(add1->in(1),phase->intcon( -(1<<con)));
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// Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
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if( add1_op == Op_AndI ) {
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@ -694,8 +694,8 @@ Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
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add2->in(2) == in(2) ) {
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// Convert to "(x & (Y<<c0))"
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Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) );
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return new (phase->C, 3) AndINode( add2->in(1), y_sh );
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Node *y_sh = phase->transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) );
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return new (phase->C) AndINode( add2->in(1), y_sh );
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}
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}
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@ -704,7 +704,7 @@ Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
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if( add1_op == Op_AndI &&
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phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
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return new (phase->C, 3) LShiftINode( add1->in(1), in(2) );
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return new (phase->C) LShiftINode( add1->in(1), in(2) );
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return NULL;
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}
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@ -784,9 +784,9 @@ Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
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if( t12 && t12->is_con() ){ // Left input is an add of a con?
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// Compute X << con0
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Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) );
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Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) );
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// Compute X<<con0 + (con1<<con0)
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return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con));
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return new (phase->C) AddLNode( lsh, phase->longcon(t12->get_con() << con));
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}
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}
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@ -794,7 +794,7 @@ Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
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add1->in(2) == in(2) )
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// Convert to "(x & -(1<<c0))"
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return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
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return new (phase->C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
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// Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
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if( add1_op == Op_AndL ) {
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@ -803,8 +803,8 @@ Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
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add2->in(2) == in(2) ) {
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// Convert to "(x & (Y<<c0))"
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Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) );
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return new (phase->C, 3) AndLNode( add2->in(1), y_sh );
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Node *y_sh = phase->transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) );
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return new (phase->C) AndLNode( add2->in(1), y_sh );
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}
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}
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@ -813,7 +813,7 @@ Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
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const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1);
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if( add1_op == Op_AndL &&
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phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
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return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) );
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return new (phase->C) LShiftLNode( add1->in(1), in(2) );
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return NULL;
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}
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@ -915,8 +915,8 @@ Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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Node *x = mask->in(1);
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jint maskbits = t3->get_con();
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// Convert to "(x >> shift) & (mask >> shift)"
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Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) );
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return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
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Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) );
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return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
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}
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// Check for "(short[i] <<16)>>16" which simply sign-extends
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@ -939,7 +939,7 @@ Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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}
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else if( ld->Opcode() == Op_LoadUS )
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// Replace zero-extension-load with sign-extension-load
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return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control),
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return new (phase->C) LoadSNode( ld->in(MemNode::Control),
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ld->in(MemNode::Memory),
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ld->in(MemNode::Address),
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ld->adr_type());
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@ -1124,7 +1124,7 @@ Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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const int con2 = t12->get_con() & 31; // Shift count is always masked
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const int con3 = con+con2;
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if( con3 < 32 ) // Only merge shifts if total is < 32
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return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) );
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return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) );
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}
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}
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@ -1137,9 +1137,9 @@ Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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Node *lshl = add->in(1);
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if( lshl->Opcode() == Op_LShiftI &&
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phase->type(lshl->in(2)) == t2 ) {
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Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) );
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Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) );
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return new (phase->C, 3) AndINode( sum, phase->intcon(mask) );
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Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) );
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Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) );
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return new (phase->C) AndINode( sum, phase->intcon(mask) );
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}
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}
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@ -1152,8 +1152,8 @@ Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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if( t3 && t3->is_con() ) { // Right input is a constant
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jint mask2 = t3->get_con();
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mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
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Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) );
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return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2));
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Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) );
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return new (phase->C) AndINode(newshr, phase->intcon(mask2));
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// The negative values are easier to materialize than positive ones.
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// A typical case from address arithmetic is ((x & ~15) >> 4).
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// It's better to change that to ((x >> 4) & ~0) versus
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@ -1165,7 +1165,7 @@ Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
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Node *shl = in(1);
|
||||
if( in1_op == Op_LShiftI &&
|
||||
phase->type(shl->in(2)) == t2 )
|
||||
return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) );
|
||||
return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) );
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
|
@ -1270,9 +1270,9 @@ Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|||
Node *lshl = add->in(1);
|
||||
if( lshl->Opcode() == Op_LShiftL &&
|
||||
phase->type(lshl->in(2)) == t2 ) {
|
||||
Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) );
|
||||
Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) );
|
||||
return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) );
|
||||
Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) );
|
||||
Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) );
|
||||
return new (phase->C) AndLNode( sum, phase->longcon(mask) );
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1285,8 +1285,8 @@ Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|||
if( t3 && t3->is_con() ) { // Right input is a constant
|
||||
jlong mask2 = t3->get_con();
|
||||
mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
|
||||
Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) );
|
||||
return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2));
|
||||
Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) );
|
||||
return new (phase->C) AndLNode(newshr, phase->longcon(mask2));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1294,7 +1294,7 @@ Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
|
|||
Node *shl = in(1);
|
||||
if( shl->Opcode() == Op_LShiftL &&
|
||||
phase->type(shl->in(2)) == t2 )
|
||||
return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) );
|
||||
return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) );
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue