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8296426: x86: Narrow UseAVX and UseSSE flags

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Reviewed-by: vlivanov, kvn
This commit is contained in:
Claes Redestad 2022-11-08 23:41:50 +00:00
parent 8146e1af82
commit d9b25e860b
4 changed files with 14 additions and 14 deletions
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8
src/hotspot/cpu/x86/globals_x86.hpp
View file

@ -106,13 +106,13 @@ define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong);
product(bool, UseStoreImmI16, true, \
"Use store immediate 16-bits value instruction on x86") \
\
product(intx, UseSSE, 99, \
product(int, UseSSE, 4, \
"Highest supported SSE instructions set on x86/x64") \
range(0, 99) \
range(0, 4) \
\
product(intx, UseAVX, 3, \
product(int, UseAVX, 3, \
"Highest supported AVX instructions set on x86/x64") \
range(0, 99) \
range(0, 3) \
\
product(bool, UseKNLSetting, false, DIAGNOSTIC, \
"Control whether Knights platform setting should be used") \

14
src/hotspot/cpu/x86/vm_version_x86.cpp
View file

@ -404,8 +404,8 @@ class VM_Version_StubGenerator: public StubCodeGenerator {
// Generate SEGV here (reference through NULL)
// and check upper YMM/ZMM bits after it.
//
intx saved_useavx = UseAVX;
intx saved_usesse = UseSSE;
int saved_useavx = UseAVX;
int saved_usesse = UseSSE;
// If UseAVX is uninitialized or is set by the user to include EVEX
if (use_evex) {
@ -900,7 +900,7 @@ void VM_Version::get_processor_features() {
if (FLAG_IS_DEFAULT(UseSSE)) {
FLAG_SET_DEFAULT(UseSSE, use_sse_limit);
} else if (UseSSE > use_sse_limit) {
warning("UseSSE=%d is not supported on this CPU, setting it to UseSSE=%d", (int) UseSSE, use_sse_limit);
warning("UseSSE=%d is not supported on this CPU, setting it to UseSSE=%d", UseSSE, use_sse_limit);
FLAG_SET_DEFAULT(UseSSE, use_sse_limit);
}
@ -930,9 +930,9 @@ void VM_Version::get_processor_features() {
}
if (UseAVX > use_avx_limit) {
if (UseSSE < 4) {
warning("UseAVX=%d requires UseSSE=4, setting it to UseAVX=0", (int) UseAVX);
warning("UseAVX=%d requires UseSSE=4, setting it to UseAVX=0", UseAVX);
} else {
warning("UseAVX=%d is not supported on this CPU, setting it to UseAVX=%d", (int) UseAVX, use_avx_limit);
warning("UseAVX=%d is not supported on this CPU, setting it to UseAVX=%d", UseAVX, use_avx_limit);
}
FLAG_SET_DEFAULT(UseAVX, use_avx_limit);
}
@ -1860,9 +1860,9 @@ void VM_Version::get_processor_features() {
log->print_cr("Logical CPUs per core: %u",
logical_processors_per_package());
log->print_cr("L1 data cache line size: %u", L1_data_cache_line_size());
log->print("UseSSE=%d", (int) UseSSE);
log->print("UseSSE=%d", UseSSE);
if (UseAVX > 0) {
log->print(" UseAVX=%d", (int) UseAVX);
log->print(" UseAVX=%d", UseAVX);
}
if (UseAES) {
log->print(" UseAES=1");

4
src/hotspot/share/jvmci/jvmciCompilerToVMInit.cpp
View file

@ -232,7 +232,7 @@ JVMCIObjectArray CompilerToVM::initialize_intrinsics(JVMCI_TRAPS) {
do_uintx_flag(TLABWasteIncrement) \
do_intx_flag(TypeProfileWidth) \
do_bool_flag(UseAESIntrinsics) \
X86_ONLY(do_intx_flag(UseAVX)) \
X86_ONLY(do_int_flag(UseAVX)) \
do_bool_flag(UseCRC32Intrinsics) \
do_bool_flag(UseAdler32Intrinsics) \
do_bool_flag(UseCompressedClassPointers) \
@ -252,7 +252,7 @@ JVMCIObjectArray CompilerToVM::initialize_intrinsics(JVMCI_TRAPS) {
do_bool_flag(UseSHA1Intrinsics) \
do_bool_flag(UseSHA256Intrinsics) \
do_bool_flag(UseSHA512Intrinsics) \
X86_ONLY(do_intx_flag(UseSSE)) \
X86_ONLY(do_int_flag(UseSSE)) \
COMPILER2_PRESENT(do_bool_flag(UseSquareToLenIntrinsic)) \
do_bool_flag(UseTLAB) \
do_bool_flag(VerifyOops) \

2
test/hotspot/jtreg/compiler/floatingpoint/NaNTest.java
View file

@ -82,7 +82,7 @@ public class NaNTest {
// native methods that use FPU instructions, and those strip the
// signaling NaNs.
if (Platform.isX86()) {
int sse = WHITE_BOX.getIntxVMFlag("UseSSE").intValue();
int sse = WHITE_BOX.getIntVMFlag("UseSSE").intValue();
expectStableFloats = (sse >= 1);
expectStableDoubles = (sse >= 2);
}