Merge

hotspot/src/cpu/sparc/vm/vm_version_sparc.cpp

@@ -89,6 +89,27 @@ void VM_Version::initialize() {
   _supports_cx8 = has_v9();
   _supports_atomic_getset4 = true; // swap instruction
 
+  // There are Fujitsu Sparc64 CPUs which support blk_init as well so
+  // we have to take this check out of the 'is_niagara()' block below.
+  if (has_blk_init()) {
+    // When using CMS or G1, we cannot use memset() in BOT updates
+    // because the sun4v/CMT version in libc_psr uses BIS which
+    // exposes "phantom zeros" to concurrent readers. See 6948537.
+    if (FLAG_IS_DEFAULT(UseMemSetInBOT) && (UseConcMarkSweepGC || UseG1GC)) {
+      FLAG_SET_DEFAULT(UseMemSetInBOT, false);
+    }
+    // Issue a stern warning if the user has explicitly set
+    // UseMemSetInBOT (it is known to cause issues), but allow
+    // use for experimentation and debugging.
+    if (UseConcMarkSweepGC || UseG1GC) {
+      if (UseMemSetInBOT) {
+        assert(!FLAG_IS_DEFAULT(UseMemSetInBOT), "Error");
+        warning("Experimental flag -XX:+UseMemSetInBOT is known to cause instability"
+                " on sun4v; please understand that you are using at your own risk!");
+      }
+    }
+  }
+
   if (is_niagara()) {
     // Indirect branch is the same cost as direct
     if (FLAG_IS_DEFAULT(UseInlineCaches)) {
@@ -98,12 +119,6 @@ void VM_Version::initialize() {
     if (FLAG_IS_DEFAULT(OptoLoopAlignment)) {
       FLAG_SET_DEFAULT(OptoLoopAlignment, 4);
     }
-    // When using CMS or G1, we cannot use memset() in BOT updates
-    // because the sun4v/CMT version in libc_psr uses BIS which
-    // exposes "phantom zeros" to concurrent readers. See 6948537.
-    if (FLAG_IS_DEFAULT(UseMemSetInBOT) && (UseConcMarkSweepGC || UseG1GC)) {
-      FLAG_SET_DEFAULT(UseMemSetInBOT, false);
-    }
 #ifdef _LP64
     // 32-bit oops don't make sense for the 64-bit VM on sparc
     // since the 32-bit VM has the same registers and smaller objects.

hotspot/src/cpu/sparc/vm/vm_version_sparc.hpp

@@ -94,7 +94,13 @@ protected:
   static bool is_M_family(int features) { return (features & M_family_m) != 0; }
   static bool is_T_family(int features) { return (features & T_family_m) != 0; }
   static bool is_niagara() { return is_T_family(_features); }
-  DEBUG_ONLY( static bool is_niagara(int features)  { return (features & sun4v_m) != 0; } )
+#ifdef ASSERT
+  static bool is_niagara(int features)  {
+    // 'sun4v_m' may be defined on both Sun/Oracle Sparc CPUs as well as
+    // on Fujitsu Sparc64 CPUs, but only Sun/Oracle Sparcs can be 'niagaras'.
+    return (features & sun4v_m) != 0 && (features & sparc64_family_m) == 0;
+  }
+#endif
 
   // Returns true if it is niagara1 (T1).
   static bool is_T1_model(int features) { return is_T_family(features) && ((features & T1_model_m) != 0); }

hotspot/src/cpu/x86/vm/c1_Runtime1_x86.cpp

@@ -1719,10 +1719,12 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
 
         BarrierSet* bs = Universe::heap()->barrier_set();
         CardTableModRefBS* ct = (CardTableModRefBS*)bs;
+        assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
+
         Label done;
         Label runtime;
 
-        // At this point we know new_value is non-NULL and the new_value crosses regsion.
+        // At this point we know new_value is non-NULL and the new_value crosses regions.
         // Must check to see if card is already dirty
 
         const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
@@ -1735,26 +1737,17 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
         __ push(rax);
         __ push(rcx);
 
-        NOT_LP64(__ get_thread(thread);)
-        ExternalAddress cardtable((address)ct->byte_map_base);
-        assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
-
+        const Register cardtable = rax;
         const Register card_addr = rcx;
-#ifdef _LP64
-        const Register tmp = rscratch1;
-        f.load_argument(0, card_addr);
-        __ shrq(card_addr, CardTableModRefBS::card_shift);
-        __ lea(tmp, cardtable);
-        // get the address of the card
-        __ addq(card_addr, tmp);
-#else
-        const Register card_index = rcx;
-        f.load_argument(0, card_index);
-        __ shrl(card_index, CardTableModRefBS::card_shift);
 
-        Address index(noreg, card_index, Address::times_1);
-        __ leal(card_addr, __ as_Address(ArrayAddress(cardtable, index)));
-#endif
+        f.load_argument(0, card_addr);
+        __ shrptr(card_addr, CardTableModRefBS::card_shift);
+        // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT
+        // a valid address and therefore is not properly handled by the relocation code.
+        __ movptr(cardtable, (intptr_t)ct->byte_map_base);
+        __ addptr(card_addr, cardtable);
+
+        NOT_LP64(__ get_thread(thread);)
 
         __ cmpb(Address(card_addr, 0), (int)G1SATBCardTableModRefBS::g1_young_card_val());
         __ jcc(Assembler::equal, done);

hotspot/src/cpu/x86/vm/macroAssembler_x86.cpp

@@ -3354,6 +3354,8 @@ void MacroAssembler::g1_write_barrier_post(Register store_addr,
 
   BarrierSet* bs = Universe::heap()->barrier_set();
   CardTableModRefBS* ct = (CardTableModRefBS*)bs;
+  assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
+
   Label done;
   Label runtime;
 
@@ -3371,28 +3373,16 @@ void MacroAssembler::g1_write_barrier_post(Register store_addr,
 
   // storing region crossing non-NULL, is card already dirty?
 
-  ExternalAddress cardtable((address) ct->byte_map_base);
-  assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
-#ifdef _LP64
   const Register card_addr = tmp;
+  const Register cardtable = tmp2;
 
-  movq(card_addr, store_addr);
-  shrq(card_addr, CardTableModRefBS::card_shift);
+  movptr(card_addr, store_addr);
+  shrptr(card_addr, CardTableModRefBS::card_shift);
+  // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT
+  // a valid address and therefore is not properly handled by the relocation code.
+  movptr(cardtable, (intptr_t)ct->byte_map_base);
+  addptr(card_addr, cardtable);
 
-  lea(tmp2, cardtable);
-
-  // get the address of the card
-  addq(card_addr, tmp2);
-#else
-  const Register card_index = tmp;
-
-  movl(card_index, store_addr);
-  shrl(card_index, CardTableModRefBS::card_shift);
-
-  Address index(noreg, card_index, Address::times_1);
-  const Register card_addr = tmp;
-  lea(card_addr, as_Address(ArrayAddress(cardtable, index)));
-#endif
   cmpb(Address(card_addr, 0), (int)G1SATBCardTableModRefBS::g1_young_card_val());
   jcc(Assembler::equal, done);
 
@@ -3416,7 +3406,7 @@ void MacroAssembler::g1_write_barrier_post(Register store_addr,
   movq(Address(tmp2, 0), card_addr);
 #else
   addl(tmp2, queue_index);
-  movl(Address(tmp2, 0), card_index);
+  movl(Address(tmp2, 0), card_addr);
 #endif
   jmp(done);
 
@@ -3468,25 +3458,19 @@ void MacroAssembler::store_check_part_2(Register obj) {
 
   // The calculation for byte_map_base is as follows:
   // byte_map_base = _byte_map - (uintptr_t(low_bound) >> card_shift);
-  // So this essentially converts an address to a displacement and
-  // it will never need to be relocated. On 64bit however the value may be too
-  // large for a 32bit displacement
-
+  // So this essentially converts an address to a displacement and it will
+  // never need to be relocated. On 64bit however the value may be too
+  // large for a 32bit displacement.
   intptr_t disp = (intptr_t) ct->byte_map_base;
   if (is_simm32(disp)) {
     Address cardtable(noreg, obj, Address::times_1, disp);
     movb(cardtable, 0);
   } else {
-    // By doing it as an ExternalAddress disp could be converted to a rip-relative
-    // displacement and done in a single instruction given favorable mapping and
-    // a smarter version of as_Address. Worst case it is two instructions which
-    // is no worse off then loading disp into a register and doing as a simple
-    // Address() as above.
-    // We can't do as ExternalAddress as the only style since if disp == 0 we'll
-    // assert since NULL isn't acceptable in a reloci (see 6644928). In any case
-    // in some cases we'll get a single instruction version.
-
-    ExternalAddress cardtable((address)disp);
+    // By doing it as an ExternalAddress 'disp' could be converted to a rip-relative
+    // displacement and done in a single instruction given favorable mapping and a
+    // smarter version of as_Address. However, 'ExternalAddress' generates a relocation
+    // entry and that entry is not properly handled by the relocation code.
+    AddressLiteral cardtable((address)ct->byte_map_base, relocInfo::none);
     Address index(noreg, obj, Address::times_1);
     movb(as_Address(ArrayAddress(cardtable, index)), 0);
   }

hotspot/src/share/vm/opto/c2_globals.hpp

@@ -637,7 +637,7 @@
   diagnostic(bool, OptimizeExpensiveOps, true,                              \
           "Find best control for expensive operations")                     \
                                                                             \
-  product(bool, UseMathExactIntrinsics, true,                               \
+  experimental(bool, UseMathExactIntrinsics, false,                         \
           "Enables intrinsification of various java.lang.Math functions")   \
                                                                             \
   experimental(bool, ReplaceInParentMaps, false,                            \

hotspot/src/share/vm/runtime/arguments.cpp

@@ -2278,18 +2278,6 @@ bool Arguments::check_vm_args_consistency() {
   status = status && verify_percentage(MarkSweepDeadRatio, "MarkSweepDeadRatio");
 
   status = status && verify_min_value(MarkSweepAlwaysCompactCount, 1, "MarkSweepAlwaysCompactCount");
-#ifdef SPARC
-  if (UseConcMarkSweepGC || UseG1GC) {
-    // Issue a stern warning if the user has explicitly set
-    // UseMemSetInBOT (it is known to cause issues), but allow
-    // use for experimentation and debugging.
-    if (VM_Version::is_sun4v() && UseMemSetInBOT) {
-      assert(!FLAG_IS_DEFAULT(UseMemSetInBOT), "Error");
-      warning("Experimental flag -XX:+UseMemSetInBOT is known to cause instability"
-          " on sun4v; please understand that you are using at your own risk!");
-    }
-  }
-#endif // SPARC
 
   if (PrintNMTStatistics) {
 #if INCLUDE_NMT