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8280510: AArch64: Vectorize operations with loop induction variable
Reviewed-by: adinn, thartmann
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36bf6fbe08
commit
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12 changed files with 177 additions and 6 deletions
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@ -4103,6 +4103,7 @@ int MatchRule::is_expensive() const {
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strcmp(opType,"ReplicateL")==0 ||
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strcmp(opType,"ReplicateF")==0 ||
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strcmp(opType,"ReplicateD")==0 ||
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strcmp(opType,"PopulateIndex")==0 ||
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strcmp(opType,"AddReductionVI")==0 ||
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strcmp(opType,"AddReductionVL")==0 ||
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strcmp(opType,"AddReductionVF")==0 ||
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@ -4227,7 +4228,7 @@ bool MatchRule::is_vector() const {
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"LShiftVB","LShiftVS","LShiftVI","LShiftVL",
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"RShiftVB","RShiftVS","RShiftVI","RShiftVL",
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"URShiftVB","URShiftVS","URShiftVI","URShiftVL",
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"ReplicateB","ReplicateS","ReplicateI","ReplicateL","ReplicateF","ReplicateD",
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"ReplicateB","ReplicateS","ReplicateI","ReplicateL","ReplicateF","ReplicateD","PopulateIndex",
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"RoundDoubleModeV","RotateLeftV" , "RotateRightV", "LoadVector","StoreVector",
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"LoadVectorGather", "StoreVectorScatter", "LoadVectorGatherMasked", "StoreVectorScatterMasked",
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"VectorTest", "VectorLoadMask", "VectorStoreMask", "VectorBlend", "VectorInsert",
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