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8144343: [aix] Stack bottom should be page aligned
On thread create or attach, ensure stack bottom is aligned to os::vm_page_size() Reviewed-by: simonis, kvn
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parent
57b477e21a
commit
f06c0a7041
1 changed files with 36 additions and 27 deletions
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@ -2263,8 +2263,12 @@ void os::pd_commit_memory_or_exit(char* addr, size_t size, bool exec,
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bool os::pd_commit_memory(char* addr, size_t size, bool exec) {
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assert0(is_aligned_to(addr, os::vm_page_size()));
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assert0(is_aligned_to(size, os::vm_page_size()));
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assert(is_aligned_to(addr, os::vm_page_size()),
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"addr " PTR_FORMAT " not aligned to vm_page_size (" PTR_FORMAT ")",
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p2i(addr), os::vm_page_size());
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assert(is_aligned_to(size, os::vm_page_size()),
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"size " PTR_FORMAT " not aligned to vm_page_size (" PTR_FORMAT ")",
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size, os::vm_page_size());
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vmembk_t* const vmi = vmembk_find(addr);
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assert0(vmi);
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@ -2287,8 +2291,12 @@ void os::pd_commit_memory_or_exit(char* addr, size_t size,
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}
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bool os::pd_uncommit_memory(char* addr, size_t size) {
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assert0(is_aligned_to(addr, os::vm_page_size()));
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assert0(is_aligned_to(size, os::vm_page_size()));
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assert(is_aligned_to(addr, os::vm_page_size()),
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"addr " PTR_FORMAT " not aligned to vm_page_size (" PTR_FORMAT ")",
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p2i(addr), os::vm_page_size());
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assert(is_aligned_to(size, os::vm_page_size()),
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"size " PTR_FORMAT " not aligned to vm_page_size (" PTR_FORMAT ")",
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size, os::vm_page_size());
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// Dynamically do different things for mmap/shmat.
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const vmembk_t* const vmi = vmembk_find(addr);
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@ -4299,7 +4307,7 @@ static bool query_stack_dimensions(address* p_stack_base, size_t* p_stack_size)
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pthread_t tid = pthread_self();
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struct __pthrdsinfo pinfo;
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char dummy[1]; // We only need this to satisfy the api and to not get E.
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char dummy[1]; // Just needed to satisfy pthread_getthrds_np.
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int dummy_size = sizeof(dummy);
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memset(&pinfo, 0, sizeof(pinfo));
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@ -4320,38 +4328,39 @@ static bool query_stack_dimensions(address* p_stack_base, size_t* p_stack_size)
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// Not sure what to do here - I feel inclined to forbid this use case completely.
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guarantee0(pinfo.__pi_stacksize);
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// Note: the pthread stack on AIX seems to look like this:
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// Note: we get three values from pthread_getthrds_np:
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// __pi_stackaddr, __pi_stacksize, __pi_stackend
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//
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// --------------------- real base ? at page border ?
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// high addr ---------------------
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//
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// pthread internal data, like ~2K, see also
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// http://publib.boulder.ibm.com/infocenter/pseries/v5r3/index.jsp?topic=/com.ibm.aix.prftungd/doc/prftungd/thread_supp_tun_params.htm
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// | pthread internal data, like ~2K
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// |
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// | --------------------- __pi_stackend (usually not page aligned, (xxxxF890))
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// |
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// |
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// |
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// |
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// |
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// |
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// | --------------------- (__pi_stackend - __pi_stacksize)
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// |
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// | padding to align the following AIX guard pages, if enabled.
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// |
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// V --------------------- __pi_stackaddr
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//
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// --------------------- __pi_stackend - not page aligned, (xxxxF890)
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//
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// stack
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// ....
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//
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// stack
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//
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// --------------------- __pi_stackend - __pi_stacksize
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//
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// padding due to AIX guard pages (?) see AIXTHREAD_GUARDPAGES
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// --------------------- __pi_stackaddr (page aligned if AIXTHREAD_GUARDPAGES > 0)
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//
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// AIX guard pages (?)
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// low addr AIX guard pages, if enabled (AIXTHREAD_GUARDPAGES > 0)
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//
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// So, the safe thing to do is to use the area from __pi_stackend to __pi_stackaddr;
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// __pi_stackend however is almost never page aligned.
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//
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address stack_base = (address)(pinfo.__pi_stackend);
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address stack_low_addr = (address)align_ptr_up(pinfo.__pi_stackaddr, os::vm_page_size());
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size_t stack_size = stack_base - stack_low_addr;
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if (p_stack_base) {
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(*p_stack_base) = (address) (pinfo.__pi_stackend);
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*p_stack_base = stack_base;
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}
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if (p_stack_size) {
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(*p_stack_size) = pinfo.__pi_stackend - pinfo.__pi_stackaddr;
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*p_stack_size = stack_size;
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}
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return true;
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