mirror of
https://github.com/openjdk/jdk.git
synced 2025-09-17 01:24:33 +02:00
8262355: Support for AVX-512 opmask register allocation.
Reviewed-by: vlivanov, njian, kvn
This commit is contained in:
parent
078066695b
commit
f084bd2f61
41 changed files with 1570 additions and 295 deletions
|
@ -2452,6 +2452,22 @@ void Assembler::kmovwl(KRegister dst, Address src) {
|
|||
emit_operand((Register)dst, src);
|
||||
}
|
||||
|
||||
void Assembler::kmovwl(Address dst, KRegister src) {
|
||||
assert(VM_Version::supports_evex(), "");
|
||||
InstructionMark im(this);
|
||||
InstructionAttr attributes(AVX_128bit, /* vex_w */ false, /* legacy_mode */ true, /* no_mask_reg */ true, /* uses_vl */ false);
|
||||
vex_prefix(dst, 0, src->encoding(), VEX_SIMD_NONE, VEX_OPCODE_0F, &attributes);
|
||||
emit_int8((unsigned char)0x91);
|
||||
emit_operand((Register)src, dst);
|
||||
}
|
||||
|
||||
void Assembler::kmovwl(KRegister dst, KRegister src) {
|
||||
assert(VM_Version::supports_avx512bw(), "");
|
||||
InstructionAttr attributes(AVX_128bit, /* rex_w */ false, /* legacy_mode */ true, /* no_mask_reg */ true, /* uses_vl */ false);
|
||||
int encode = vex_prefix_and_encode(dst->encoding(), 0, src->encoding(), VEX_SIMD_NONE, VEX_OPCODE_0F, &attributes);
|
||||
emit_int16((unsigned char)0x90, (0xC0 | encode));
|
||||
}
|
||||
|
||||
void Assembler::kmovdl(KRegister dst, Register src) {
|
||||
assert(VM_Version::supports_avx512bw(), "");
|
||||
InstructionAttr attributes(AVX_128bit, /* rex_w */ false, /* legacy_mode */ true, /* no_mask_reg */ true, /* uses_vl */ false);
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue