archive/jdk
1
0
Fork 0
mirror of https://github.com/openjdk/jdk.git synced 2025-09-22 03:54:33 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions

7031385: incorrect register allocation in release_store_fence on linux x86

Browse source 
Since gcc 4.5 the inline assembly trying to use r register for an atomic 8-bit exchange and it leads to compilation error

Reviewed-by: dsamersoff, dholmes
This commit is contained in:
Deepak Bhole 2011-05-03 18:43:18 +04:00 • committed by Dmitry Samersoff
parent 50d82a0f69
commit fb47d47b6f
1 changed files with 2 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

4
hotspot/src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp
View file

@ -93,7 +93,7 @@ inline void OrderAccess::release_store_ptr(volatile void* p, void* v)
inline void OrderAccess::store_fence(jbyte* p, jbyte v) {
__asm__ volatile ( "xchgb (%2),%0"
: "=r" (v)
: "=q" (v)
: "0" (v), "r" (p)
: "memory");
}
@ -155,7 +155,7 @@ inline void OrderAccess::store_ptr_fence(void** p, void* v) {
// Must duplicate definitions instead of calling store_fence because we don't want to cast away volatile.
inline void OrderAccess::release_store_fence(volatile jbyte* p, jbyte v) {
__asm__ volatile ( "xchgb (%2),%0"
: "=r" (v)
: "=q" (v)
: "0" (v), "r" (p)
: "memory");
}