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7057978: improve robustness of c1 ARM back-end wrt non encodable constants
ARM only, avoid assertion failures for huge constants generated by C1 shared code Reviewed-by: never, vladidan
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1 changed files with 2 additions and 1 deletions
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@ -142,7 +142,8 @@ void LIR_Address::verify() const {
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#endif
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#ifdef ARM
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assert(disp() == 0 || index()->is_illegal(), "can't have both");
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assert(-4096 < disp() && disp() < 4096, "architecture constraint");
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// Note: offsets higher than 4096 must not be rejected here. They can
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// be handled by the back-end or will be rejected if not.
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#endif
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#ifdef _LP64
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assert(base()->is_cpu_register(), "wrong base operand");
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