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6919934: JSR 292 needs to support x86 C1
This implements JSR 292 support for C1 x86. Reviewed-by: never, jrose, kvn
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commit
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37 changed files with 420 additions and 287 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright 1999-2009 Sun Microsystems, Inc. All Rights Reserved.
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* Copyright 1999-2010 Sun Microsystems, Inc. All Rights Reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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@ -317,14 +317,6 @@ void C1_MacroAssembler::inline_cache_check(Register receiver, Register iCache) {
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}
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void C1_MacroAssembler::method_exit(bool restore_frame) {
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if (restore_frame) {
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leave();
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}
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ret(0);
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}
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void C1_MacroAssembler::build_frame(int frame_size_in_bytes) {
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// Make sure there is enough stack space for this method's activation.
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// Note that we do this before doing an enter(). This matches the
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@ -333,7 +325,7 @@ void C1_MacroAssembler::build_frame(int frame_size_in_bytes) {
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// between the two compilers.
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generate_stack_overflow_check(frame_size_in_bytes);
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enter();
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push(rbp);
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#ifdef TIERED
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// c2 leaves fpu stack dirty. Clean it on entry
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if (UseSSE < 2 ) {
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@ -344,6 +336,12 @@ void C1_MacroAssembler::build_frame(int frame_size_in_bytes) {
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}
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void C1_MacroAssembler::remove_frame(int frame_size_in_bytes) {
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increment(rsp, frame_size_in_bytes); // Does not emit code for frame_size == 0
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pop(rbp);
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}
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void C1_MacroAssembler::unverified_entry(Register receiver, Register ic_klass) {
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if (C1Breakpoint) int3();
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inline_cache_check(receiver, ic_klass);
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