Commit graph

8 commits

Author SHA1 Message Date
Fei Yang
92067e2003 8290137: riscv: small refactoring for add_memory_int32/64
Reviewed-by: yadongwang, fjiang, shade
2022-07-18 13:01:35 +00:00
Feilong Jiang
4dd236b40a 8290280: riscv: Clean up stack and register handling in interpreter
Reviewed-by: fyang
2022-07-18 02:12:34 +00:00
Xiaolin Zheng
b71e8c1649 8285711: riscv: RVC: Support disassembler show-bytes option
Reviewed-by: fyang
2022-04-29 06:45:49 +00:00
Yadong Wang
94b533a94c 8285699: riscv: Provide information when hitting a HaltNode
Reviewed-by: fyang
2022-04-29 03:19:29 +00:00
Magnus Ihse Bursie
4594696f54 8284903: Fix typos in hotspot
Reviewed-by: cjplummer, coleenp, kvn, lucy, stefank
2022-04-19 19:10:52 +00:00
Feilong Jiang
060a188733 8283865: riscv: Break down -XX:+UseRVB into seperate options for each bitmanip extension
Reviewed-by: fyang, shade
2022-04-02 02:55:50 +00:00
Xiaolin Zheng
720e751f35 8283937: riscv: RVC: Fix c_beqz to c_bnez
Reviewed-by: shade
2022-03-30 10:01:39 +00:00
Fei Yang
5905b02c0e 8276799: Implementation of JEP 422: Linux/RISC-V Port
Co-authored-by: Yadong Wang <yadonn.wang@huawei.com>
Co-authored-by: Yanhong Zhu <zhuyanhong2@huawei.com>
Co-authored-by: Feilong Jiang <jiangfeilong@huawei.com>
Co-authored-by: Kun Wang <wangkun49@huawei.com>
Co-authored-by: Zhuxuan Ni <nizhuxuan@huawei.com>
Co-authored-by: Taiping Guo <guotaiping1@huawei.com>
Co-authored-by: Kang He <hekang6@huawei.com>
Co-authored-by: Aleksey Shipilev <shade@openjdk.org>
Co-authored-by: Xiaolin Zheng <yunyao.zxl@alibaba-inc.com>
Co-authored-by: Kuai Wei <kuaiwei.kw@alibaba-inc.com>
Co-authored-by: Magnus Ihse Bursie <ihse@openjdk.org>
Reviewed-by: ihse, dholmes, rriggs, kvn, shade
2022-03-24 09:22:46 +00:00