mirror of
https://github.com/torvalds/linux.git
synced 2025-08-15 14:11:42 +02:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR (net-6.16-rc2). No conflicts or adjacent changes. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
commit
535de52801
2293 changed files with 44275 additions and 27369 deletions
18
.mailmap
18
.mailmap
|
|
@ -21,7 +21,8 @@ Adam Radford <aradford@gmail.com>
|
|||
Adriana Reus <adi.reus@gmail.com> <adriana.reus@intel.com>
|
||||
Adrian Bunk <bunk@stusta.de>
|
||||
Ajay Kaher <ajay.kaher@broadcom.com> <akaher@vmware.com>
|
||||
Akhil P Oommen <quic_akhilpo@quicinc.com> <akhilpo@codeaurora.org>
|
||||
Akhil P Oommen <akhilpo@oss.qualcomm.com> <akhilpo@codeaurora.org>
|
||||
Akhil P Oommen <akhilpo@oss.qualcomm.com> <quic_akhilpo@quicinc.com>
|
||||
Alan Cox <alan@lxorguk.ukuu.org.uk>
|
||||
Alan Cox <root@hraefn.swansea.linux.org.uk>
|
||||
Aleksandar Markovic <aleksandar.markovic@mips.com> <aleksandar.markovic@imgtec.com>
|
||||
|
|
@ -106,7 +107,8 @@ Asahi Lina <lina+kernel@asahilina.net> <lina@asahilina.net>
|
|||
Ashok Raj Nagarajan <quic_arnagara@quicinc.com> <arnagara@codeaurora.org>
|
||||
Ashwin Chaugule <quic_ashwinc@quicinc.com> <ashwinc@codeaurora.org>
|
||||
Asutosh Das <quic_asutoshd@quicinc.com> <asutoshd@codeaurora.org>
|
||||
Atish Patra <atishp@atishpatra.org> <atish.patra@wdc.com>
|
||||
Atish Patra <atish.patra@linux.dev> <atishp@atishpatra.org>
|
||||
Atish Patra <atish.patra@linux.dev> <atish.patra@wdc.com>
|
||||
Avaneesh Kumar Dwivedi <quic_akdwived@quicinc.com> <akdwived@codeaurora.org>
|
||||
Axel Dyks <xl@xlsigned.net>
|
||||
Axel Lin <axel.lin@gmail.com>
|
||||
|
|
@ -424,6 +426,9 @@ Krzysztof Wilczyński <kwilczynski@kernel.org> <krzysztof.wilczynski@linux.com>
|
|||
Krzysztof Wilczyński <kwilczynski@kernel.org> <kw@linux.com>
|
||||
Kshitiz Godara <quic_kgodara@quicinc.com> <kgodara@codeaurora.org>
|
||||
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
||||
Kuniyuki Iwashima <kuniyu@google.com> <kuniyu@amazon.com>
|
||||
Kuniyuki Iwashima <kuniyu@google.com> <kuniyu@amazon.co.jp>
|
||||
Kuniyuki Iwashima <kuniyu@google.com> <kuni1840@gmail.com>
|
||||
Kuogee Hsieh <quic_khsieh@quicinc.com> <khsieh@codeaurora.org>
|
||||
Lee Jones <lee@kernel.org> <joneslee@google.com>
|
||||
Lee Jones <lee@kernel.org> <lee.jones@canonical.com>
|
||||
|
|
@ -600,6 +605,12 @@ Paul Mackerras <paulus@ozlabs.org> <paulus@samba.org>
|
|||
Paul Mackerras <paulus@ozlabs.org> <paulus@au1.ibm.com>
|
||||
Paul Moore <paul@paul-moore.com> <paul.moore@hp.com>
|
||||
Paul Moore <paul@paul-moore.com> <pmoore@redhat.com>
|
||||
Paulo Alcantara <pc@manguebit.org> <pcacjr@zytor.com>
|
||||
Paulo Alcantara <pc@manguebit.org> <paulo@paulo.ac>
|
||||
Paulo Alcantara <pc@manguebit.org> <pc@cjr.nz>
|
||||
Paulo Alcantara <pc@manguebit.org> <palcantara@suse.de>
|
||||
Paulo Alcantara <pc@manguebit.org> <palcantara@suse.com>
|
||||
Paulo Alcantara <pc@manguebit.org> <pc@manguebit.com>
|
||||
Pavankumar Kondeti <quic_pkondeti@quicinc.com> <pkondeti@codeaurora.org>
|
||||
Peter A Jonsson <pj@ludd.ltu.se>
|
||||
Peter Oruba <peter.oruba@amd.com>
|
||||
|
|
@ -640,6 +651,8 @@ Richard Genoud <richard.genoud@bootlin.com> <richard.genoud@gmail.com>
|
|||
Richard Leitner <richard.leitner@linux.dev> <dev@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
|
||||
Rob Clark <robin.clark@oss.qualcomm.com> <robdclark@chromium.org>
|
||||
Rob Clark <robin.clark@oss.qualcomm.com> <robdclark@gmail.com>
|
||||
Robert Foss <rfoss@kernel.org> <robert.foss@linaro.org>
|
||||
Rocky Liao <quic_rjliao@quicinc.com> <rjliao@codeaurora.org>
|
||||
Rodrigo Siqueira <siqueira@igalia.com> <rodrigosiqueiramelo@gmail.com>
|
||||
|
|
@ -709,6 +722,7 @@ Srinivas Ramana <quic_sramana@quicinc.com> <sramana@codeaurora.org>
|
|||
Sriram R <quic_srirrama@quicinc.com> <srirrama@codeaurora.org>
|
||||
Sriram Yagnaraman <sriram.yagnaraman@ericsson.com> <sriram.yagnaraman@est.tech>
|
||||
Stanislav Fomichev <sdf@fomichev.me> <sdf@google.com>
|
||||
Stanislav Fomichev <sdf@fomichev.me> <stfomichev@gmail.com>
|
||||
Stefan Wahren <wahrenst@gmx.net> <stefan.wahren@i2se.com>
|
||||
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <shemminger@linux-foundation.org>
|
||||
|
|
|
|||
|
|
@ -94,6 +94,7 @@ Description:
|
|||
What: /sys/bus/iio/devices/iio:deviceX/sampling_frequency
|
||||
What: /sys/bus/iio/devices/iio:deviceX/in_intensity_sampling_frequency
|
||||
What: /sys/bus/iio/devices/iio:deviceX/buffer/sampling_frequency
|
||||
What: /sys/bus/iio/devices/iio:deviceX/events/sampling_frequency
|
||||
What: /sys/bus/iio/devices/triggerX/sampling_frequency
|
||||
KernelVersion: 2.6.35
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
|
|
@ -740,7 +741,9 @@ Description:
|
|||
1kohm_to_gnd: connected to ground via an 1kOhm resistor,
|
||||
2.5kohm_to_gnd: connected to ground via a 2.5kOhm resistor,
|
||||
6kohm_to_gnd: connected to ground via a 6kOhm resistor,
|
||||
7.7kohm_to_gnd: connected to ground via a 7.7kOhm resistor,
|
||||
20kohm_to_gnd: connected to ground via a 20kOhm resistor,
|
||||
32kohm_to_gnd: connected to ground via a 32kOhm resistor,
|
||||
42kohm_to_gnd: connected to ground via a 42kOhm resistor,
|
||||
90kohm_to_gnd: connected to ground via a 90kOhm resistor,
|
||||
100kohm_to_gnd: connected to ground via an 100kOhm resistor,
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ Description: Read only. Returns the firmware version of Intel MAX10
|
|||
What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_address
|
||||
Date: January 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Contact: Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
Description: Read only. Returns the first MAC address in a block
|
||||
of sequential MAC addresses assigned to the board
|
||||
that is managed by the Intel MAX10 BMC. It is stored in
|
||||
|
|
@ -28,7 +28,7 @@ Description: Read only. Returns the first MAC address in a block
|
|||
What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_count
|
||||
Date: January 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Contact: Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
Description: Read only. Returns the number of sequential MAC
|
||||
addresses assigned to the board managed by the Intel
|
||||
MAX10 BMC. This value is stored in FLASH and is mirrored
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Contact: Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
Description: Read only. Returns the root entry hash for the static
|
||||
region if one is programmed, else it returns the
|
||||
string: "hash not programmed". This file is only
|
||||
|
|
@ -11,7 +11,7 @@ Description: Read only. Returns the root entry hash for the static
|
|||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Contact: Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
Description: Read only. Returns the root entry hash for the partial
|
||||
reconfiguration region if one is programmed, else it
|
||||
returns the string: "hash not programmed". This file
|
||||
|
|
@ -21,7 +21,7 @@ Description: Read only. Returns the root entry hash for the partial
|
|||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Contact: Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
Description: Read only. Returns the root entry hash for the BMC image
|
||||
if one is programmed, else it returns the string:
|
||||
"hash not programmed". This file is only visible if the
|
||||
|
|
@ -31,7 +31,7 @@ Description: Read only. Returns the root entry hash for the BMC image
|
|||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_canceled_csks
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Contact: Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
Description: Read only. Returns a list of indices for canceled code
|
||||
signing keys for the static region. The standard bitmap
|
||||
list format is used (e.g. "1,2-6,9").
|
||||
|
|
@ -39,7 +39,7 @@ Description: Read only. Returns a list of indices for canceled code
|
|||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_canceled_csks
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Contact: Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
Description: Read only. Returns a list of indices for canceled code
|
||||
signing keys for the partial reconfiguration region. The
|
||||
standard bitmap list format is used (e.g. "1,2-6,9").
|
||||
|
|
@ -47,7 +47,7 @@ Description: Read only. Returns a list of indices for canceled code
|
|||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_canceled_csks
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Contact: Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
Description: Read only. Returns a list of indices for canceled code
|
||||
signing keys for the BMC. The standard bitmap list format
|
||||
is used (e.g. "1,2-6,9").
|
||||
|
|
@ -55,7 +55,7 @@ Description: Read only. Returns a list of indices for canceled code
|
|||
What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/flash_count
|
||||
Date: Sep 2022
|
||||
KernelVersion: 5.20
|
||||
Contact: Peter Colberg <peter.colberg@altera.com>
|
||||
Contact: Matthew Gerlach <matthew.gerlach@altera.com>
|
||||
Description: Read only. Returns number of times the secure update
|
||||
staging area has been flashed.
|
||||
Format: "%u".
|
||||
|
|
|
|||
|
|
@ -60,26 +60,26 @@ Description: RO. Package default power limit (default TDP setting).
|
|||
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_crit
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_crit
|
||||
Date: May 2025
|
||||
KernelVersion: 6.15
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RW. Package reactive critical (I1) power limit in microwatts.
|
||||
Description: RW. Card reactive critical (I1) power limit in microwatts.
|
||||
|
||||
Package reactive critical (I1) power limit in microwatts is exposed
|
||||
Card reactive critical (I1) power limit in microwatts is exposed
|
||||
for client products. The power controller will throttle the
|
||||
operating frequency if the power averaged over a window exceeds
|
||||
this limit.
|
||||
|
||||
Only supported for particular Intel Xe graphics platforms.
|
||||
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr2_crit
|
||||
Date: February 2024
|
||||
KernelVersion: 6.8
|
||||
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr1_crit
|
||||
Date: May 2025
|
||||
KernelVersion: 6.15
|
||||
Contact: intel-xe@lists.freedesktop.org
|
||||
Description: RW. Package reactive critical (I1) power limit in milliamperes.
|
||||
Description: RW. Card reactive critical (I1) power limit in milliamperes.
|
||||
|
||||
Package reactive critical (I1) power limit in milliamperes is
|
||||
Card reactive critical (I1) power limit in milliamperes is
|
||||
exposed for server products. The power controller will throttle
|
||||
the operating frequency if the power averaged over a window
|
||||
exceeds this limit.
|
||||
|
|
|
|||
|
|
@ -296,6 +296,39 @@ information is missing.
|
|||
To recover from this mode, one needs to flash a valid NVM image to the
|
||||
host controller in the same way it is done in the previous chapter.
|
||||
|
||||
Tunneling events
|
||||
----------------
|
||||
The driver sends ``KOBJ_CHANGE`` events to userspace when there is a
|
||||
tunneling change in the ``thunderbolt_domain``. The notification carries
|
||||
following environment variables::
|
||||
|
||||
TUNNEL_EVENT=<EVENT>
|
||||
TUNNEL_DETAILS=0:12 <-> 1:20 (USB3)
|
||||
|
||||
Possible values for ``<EVENT>`` are:
|
||||
|
||||
activated
|
||||
The tunnel was activated (created).
|
||||
|
||||
changed
|
||||
There is a change in this tunnel. For example bandwidth allocation was
|
||||
changed.
|
||||
|
||||
deactivated
|
||||
The tunnel was torn down.
|
||||
|
||||
low bandwidth
|
||||
The tunnel is not getting optimal bandwidth.
|
||||
|
||||
insufficient bandwidth
|
||||
There is not enough bandwidth for the current tunnel requirements.
|
||||
|
||||
The ``TUNNEL_DETAILS`` is only provided if the tunnel is known. For
|
||||
example, in case of Firmware Connection Manager this is missing or does
|
||||
not provide full tunnel information. In case of Software Connection Manager
|
||||
this includes full tunnel details. The format currently matches what the
|
||||
driver uses when logging. This may change over time.
|
||||
|
||||
Networking over Thunderbolt cable
|
||||
---------------------------------
|
||||
Thunderbolt technology allows software communication between two hosts
|
||||
|
|
|
|||
|
|
@ -10,13 +10,45 @@ modified by the program itself. Instruction storage and the instruction cache
|
|||
program must enforce its own synchronization with the unprivileged fence.i
|
||||
instruction.
|
||||
|
||||
However, the default Linux ABI prohibits the use of fence.i in userspace
|
||||
applications. At any point the scheduler may migrate a task onto a new hart. If
|
||||
migration occurs after the userspace synchronized the icache and instruction
|
||||
storage with fence.i, the icache on the new hart will no longer be clean. This
|
||||
is due to the behavior of fence.i only affecting the hart that it is called on.
|
||||
Thus, the hart that the task has been migrated to may not have synchronized
|
||||
instruction storage and icache.
|
||||
CMODX in the Kernel Space
|
||||
-------------------------
|
||||
|
||||
Dynamic ftrace
|
||||
---------------------
|
||||
|
||||
Essentially, dynamic ftrace directs the control flow by inserting a function
|
||||
call at each patchable function entry, and patches it dynamically at runtime to
|
||||
enable or disable the redirection. In the case of RISC-V, 2 instructions,
|
||||
AUIPC + JALR, are required to compose a function call. However, it is impossible
|
||||
to patch 2 instructions and expect that a concurrent read-side executes them
|
||||
without a race condition. This series makes atmoic code patching possible in
|
||||
RISC-V ftrace. Kernel preemption makes things even worse as it allows the old
|
||||
state to persist across the patching process with stop_machine().
|
||||
|
||||
In order to get rid of stop_machine() and run dynamic ftrace with full kernel
|
||||
preemption, we partially initialize each patchable function entry at boot-time,
|
||||
setting the first instruction to AUIPC, and the second to NOP. Now, atmoic
|
||||
patching is possible because the kernel only has to update one instruction.
|
||||
According to Ziccif, as long as an instruction is naturally aligned, the ISA
|
||||
guarantee an atomic update.
|
||||
|
||||
By fixing down the first instruction, AUIPC, the range of the ftrace trampoline
|
||||
is limited to +-2K from the predetermined target, ftrace_caller, due to the lack
|
||||
of immediate encoding space in RISC-V. To address the issue, we introduce
|
||||
CALL_OPS, where an 8B naturally align metadata is added in front of each
|
||||
pacthable function. The metadata is resolved at the first trampoline, then the
|
||||
execution can be derect to another custom trampoline.
|
||||
|
||||
CMODX in the User Space
|
||||
-----------------------
|
||||
|
||||
Though fence.i is an unprivileged instruction, the default Linux ABI prohibits
|
||||
the use of fence.i in userspace applications. At any point the scheduler may
|
||||
migrate a task onto a new hart. If migration occurs after the userspace
|
||||
synchronized the icache and instruction storage with fence.i, the icache on the
|
||||
new hart will no longer be clean. This is due to the behavior of fence.i only
|
||||
affecting the hart that it is called on. Thus, the hart that the task has been
|
||||
migrated to may not have synchronized instruction storage and icache.
|
||||
|
||||
There are two ways to solve this problem: use the riscv_flush_icache() syscall,
|
||||
or use the ``PR_RISCV_SET_ICACHE_FLUSH_CTX`` prctl() and emit fence.i in
|
||||
|
|
|
|||
|
|
@ -271,6 +271,10 @@ The following keys are defined:
|
|||
* :c:macro:`RISCV_HWPROBE_EXT_ZICBOM`: The Zicbom extension is supported, as
|
||||
ratified in commit 3dd606f ("Create cmobase-v1.0.pdf") of riscv-CMOs.
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_EXT_ZABHA`: The Zabha extension is supported as
|
||||
ratified in commit 49f49c842ff9 ("Update to Rafified state") of
|
||||
riscv-zabha.
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to
|
||||
:c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
|
||||
mistakenly classified as a bitmask rather than a value.
|
||||
|
|
@ -335,3 +339,25 @@ The following keys are defined:
|
|||
|
||||
* :c:macro:`RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE`: An unsigned int which
|
||||
represents the size of the Zicbom block in bytes.
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0`: A bitmask containing the
|
||||
sifive vendor extensions that are compatible with the
|
||||
:c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior.
|
||||
|
||||
* SIFIVE
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCDOD`: The Xsfqmaccdod vendor
|
||||
extension is supported in version 1.1 of SiFive Int8 Matrix Multiplication
|
||||
Extensions Specification.
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCQOQ`: The Xsfqmaccqoq vendor
|
||||
extension is supported in version 1.1 of SiFive Int8 Matrix Multiplication
|
||||
Instruction Extensions Specification.
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFNRCLIPXFQF`: The Xsfvfnrclipxfqf
|
||||
vendor extension is supported in version 1.0 of SiFive FP32-to-int8 Ranged
|
||||
Clip Instructions Extensions Specification.
|
||||
|
||||
* :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFWMACCQQQ`: The Xsfvfwmaccqqq
|
||||
vendor extension is supported in version 1.0 of Matrix Multiply Accumulate
|
||||
Instruction Extensions Specification.
|
||||
|
|
@ -115,15 +115,15 @@ managing and controlling ublk devices with help of several control commands:
|
|||
|
||||
- ``UBLK_CMD_START_DEV``
|
||||
|
||||
After the server prepares userspace resources (such as creating per-queue
|
||||
pthread & io_uring for handling ublk IO), this command is sent to the
|
||||
After the server prepares userspace resources (such as creating I/O handler
|
||||
threads & io_uring for handling ublk IO), this command is sent to the
|
||||
driver for allocating & exposing ``/dev/ublkb*``. Parameters set via
|
||||
``UBLK_CMD_SET_PARAMS`` are applied for creating the device.
|
||||
|
||||
- ``UBLK_CMD_STOP_DEV``
|
||||
|
||||
Halt IO on ``/dev/ublkb*`` and remove the device. When this command returns,
|
||||
ublk server will release resources (such as destroying per-queue pthread &
|
||||
ublk server will release resources (such as destroying I/O handler threads &
|
||||
io_uring).
|
||||
|
||||
- ``UBLK_CMD_DEL_DEV``
|
||||
|
|
@ -208,15 +208,15 @@ managing and controlling ublk devices with help of several control commands:
|
|||
modify how I/O is handled while the ublk server is dying/dead (this is called
|
||||
the ``nosrv`` case in the driver code).
|
||||
|
||||
With just ``UBLK_F_USER_RECOVERY`` set, after one ubq_daemon(ublk server's io
|
||||
handler) is dying, ublk does not delete ``/dev/ublkb*`` during the whole
|
||||
With just ``UBLK_F_USER_RECOVERY`` set, after the ublk server exits,
|
||||
ublk does not delete ``/dev/ublkb*`` during the whole
|
||||
recovery stage and ublk device ID is kept. It is ublk server's
|
||||
responsibility to recover the device context by its own knowledge.
|
||||
Requests which have not been issued to userspace are requeued. Requests
|
||||
which have been issued to userspace are aborted.
|
||||
|
||||
With ``UBLK_F_USER_RECOVERY_REISSUE`` additionally set, after one ubq_daemon
|
||||
(ublk server's io handler) is dying, contrary to ``UBLK_F_USER_RECOVERY``,
|
||||
With ``UBLK_F_USER_RECOVERY_REISSUE`` additionally set, after the ublk server
|
||||
exits, contrary to ``UBLK_F_USER_RECOVERY``,
|
||||
requests which have been issued to userspace are requeued and will be
|
||||
re-issued to the new process after handling ``UBLK_CMD_END_USER_RECOVERY``.
|
||||
``UBLK_F_USER_RECOVERY_REISSUE`` is designed for backends who tolerate
|
||||
|
|
@ -241,10 +241,11 @@ can be controlled/accessed just inside this container.
|
|||
Data plane
|
||||
----------
|
||||
|
||||
ublk server needs to create per-queue IO pthread & io_uring for handling IO
|
||||
commands via io_uring passthrough. The per-queue IO pthread
|
||||
focuses on IO handling and shouldn't handle any control & management
|
||||
tasks.
|
||||
The ublk server should create dedicated threads for handling I/O. Each
|
||||
thread should have its own io_uring through which it is notified of new
|
||||
I/O, and through which it can complete I/O. These dedicated threads
|
||||
should focus on IO handling and shouldn't handle any control &
|
||||
management tasks.
|
||||
|
||||
The's IO is assigned by a unique tag, which is 1:1 mapping with IO
|
||||
request of ``/dev/ublkb*``.
|
||||
|
|
@ -265,6 +266,18 @@ with specified IO tag in the command data:
|
|||
destined to ``/dev/ublkb*``. This command is sent only once from the server
|
||||
IO pthread for ublk driver to setup IO forward environment.
|
||||
|
||||
Once a thread issues this command against a given (qid,tag) pair, the thread
|
||||
registers itself as that I/O's daemon. In the future, only that I/O's daemon
|
||||
is allowed to issue commands against the I/O. If any other thread attempts
|
||||
to issue a command against a (qid,tag) pair for which the thread is not the
|
||||
daemon, the command will fail. Daemons can be reset only be going through
|
||||
recovery.
|
||||
|
||||
The ability for every (qid,tag) pair to have its own independent daemon task
|
||||
is indicated by the ``UBLK_F_PER_IO_DAEMON`` feature. If this feature is not
|
||||
supported by the driver, daemons must be per-queue instead - i.e. all I/Os
|
||||
associated to a single qid must be handled by the same task.
|
||||
|
||||
- ``UBLK_IO_COMMIT_AND_FETCH_REQ``
|
||||
|
||||
When an IO request is destined to ``/dev/ublkb*``, the driver stores
|
||||
|
|
|
|||
|
|
@ -6,18 +6,8 @@ The following document describes how to use Symbol Namespaces to structure the
|
|||
export surface of in-kernel symbols exported through the family of
|
||||
EXPORT_SYMBOL() macros.
|
||||
|
||||
.. Table of Contents
|
||||
|
||||
=== 1 Introduction
|
||||
=== 2 How to define Symbol Namespaces
|
||||
--- 2.1 Using the EXPORT_SYMBOL macros
|
||||
--- 2.2 Using the DEFAULT_SYMBOL_NAMESPACE define
|
||||
=== 3 How to use Symbols exported in Namespaces
|
||||
=== 4 Loading Modules that use namespaced Symbols
|
||||
=== 5 Automatically creating MODULE_IMPORT_NS statements
|
||||
|
||||
1. Introduction
|
||||
===============
|
||||
Introduction
|
||||
============
|
||||
|
||||
Symbol Namespaces have been introduced as a means to structure the export
|
||||
surface of the in-kernel API. It allows subsystem maintainers to partition
|
||||
|
|
@ -28,15 +18,18 @@ kernel. As of today, modules that make use of symbols exported into namespaces,
|
|||
are required to import the namespace. Otherwise the kernel will, depending on
|
||||
its configuration, reject loading the module or warn about a missing import.
|
||||
|
||||
2. How to define Symbol Namespaces
|
||||
==================================
|
||||
Additionally, it is possible to put symbols into a module namespace, strictly
|
||||
limiting which modules are allowed to use these symbols.
|
||||
|
||||
How to define Symbol Namespaces
|
||||
===============================
|
||||
|
||||
Symbols can be exported into namespace using different methods. All of them are
|
||||
changing the way EXPORT_SYMBOL and friends are instrumented to create ksymtab
|
||||
entries.
|
||||
|
||||
2.1 Using the EXPORT_SYMBOL macros
|
||||
==================================
|
||||
Using the EXPORT_SYMBOL macros
|
||||
------------------------------
|
||||
|
||||
In addition to the macros EXPORT_SYMBOL() and EXPORT_SYMBOL_GPL(), that allow
|
||||
exporting of kernel symbols to the kernel symbol table, variants of these are
|
||||
|
|
@ -54,8 +47,8 @@ refer to ``NULL``. There is no default namespace if none is defined. ``modpost``
|
|||
and kernel/module/main.c make use the namespace at build time or module load
|
||||
time, respectively.
|
||||
|
||||
2.2 Using the DEFAULT_SYMBOL_NAMESPACE define
|
||||
=============================================
|
||||
Using the DEFAULT_SYMBOL_NAMESPACE define
|
||||
-----------------------------------------
|
||||
|
||||
Defining namespaces for all symbols of a subsystem can be very verbose and may
|
||||
become hard to maintain. Therefore a default define (DEFAULT_SYMBOL_NAMESPACE)
|
||||
|
|
@ -83,8 +76,24 @@ unit as preprocessor statement. The above example would then read::
|
|||
within the corresponding compilation unit before the #include for
|
||||
<linux/export.h>. Typically it's placed before the first #include statement.
|
||||
|
||||
3. How to use Symbols exported in Namespaces
|
||||
============================================
|
||||
Using the EXPORT_SYMBOL_GPL_FOR_MODULES() macro
|
||||
-----------------------------------------------
|
||||
|
||||
Symbols exported using this macro are put into a module namespace. This
|
||||
namespace cannot be imported.
|
||||
|
||||
The macro takes a comma separated list of module names, allowing only those
|
||||
modules to access this symbol. Simple tail-globs are supported.
|
||||
|
||||
For example::
|
||||
|
||||
EXPORT_SYMBOL_GPL_FOR_MODULES(preempt_notifier_inc, "kvm,kvm-*")
|
||||
|
||||
will limit usage of this symbol to modules whoes name matches the given
|
||||
patterns.
|
||||
|
||||
How to use Symbols exported in Namespaces
|
||||
=========================================
|
||||
|
||||
In order to use symbols that are exported into namespaces, kernel modules need
|
||||
to explicitly import these namespaces. Otherwise the kernel might reject to
|
||||
|
|
@ -106,11 +115,10 @@ inspected with modinfo::
|
|||
|
||||
|
||||
It is advisable to add the MODULE_IMPORT_NS() statement close to other module
|
||||
metadata definitions like MODULE_AUTHOR() or MODULE_LICENSE(). Refer to section
|
||||
5. for a way to create missing import statements automatically.
|
||||
metadata definitions like MODULE_AUTHOR() or MODULE_LICENSE().
|
||||
|
||||
4. Loading Modules that use namespaced Symbols
|
||||
==============================================
|
||||
Loading Modules that use namespaced Symbols
|
||||
===========================================
|
||||
|
||||
At module loading time (e.g. ``insmod``), the kernel will check each symbol
|
||||
referenced from the module for its availability and whether the namespace it
|
||||
|
|
@ -121,8 +129,8 @@ allow loading of modules that don't satisfy this precondition, a configuration
|
|||
option is available: Setting MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS=y will
|
||||
enable loading regardless, but will emit a warning.
|
||||
|
||||
5. Automatically creating MODULE_IMPORT_NS statements
|
||||
=====================================================
|
||||
Automatically creating MODULE_IMPORT_NS statements
|
||||
==================================================
|
||||
|
||||
Missing namespaces imports can easily be detected at build time. In fact,
|
||||
modpost will emit a warning if a module uses a symbol from a namespace
|
||||
|
|
@ -154,3 +162,6 @@ in-tree modules::
|
|||
You can also run nsdeps for external module builds. A typical usage is::
|
||||
|
||||
$ make -C <path_to_kernel_src> M=$PWD nsdeps
|
||||
|
||||
Note: it will happily generate an import statement for the module namespace;
|
||||
which will not work and generates build and runtime failures.
|
||||
|
|
|
|||
|
|
@ -30,6 +30,19 @@ properties:
|
|||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum: [apb_pclk, atclk]
|
||||
- items: # Zynq-700
|
||||
- const: apb_pclk
|
||||
- const: dbg_trc
|
||||
- const: dbg_apb
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
|
|
|||
|
|
@ -25,6 +25,7 @@ description: |
|
|||
* https://www.analog.com/en/products/ad7386-4.html
|
||||
* https://www.analog.com/en/products/ad7387-4.html
|
||||
* https://www.analog.com/en/products/ad7388-4.html
|
||||
* https://www.analog.com/en/products/ad7389-4.html
|
||||
* https://www.analog.com/en/products/adaq4370-4.html
|
||||
* https://www.analog.com/en/products/adaq4380-4.html
|
||||
* https://www.analog.com/en/products/adaq4381-4.html
|
||||
|
|
@ -49,6 +50,7 @@ properties:
|
|||
- adi,ad7386-4
|
||||
- adi,ad7387-4
|
||||
- adi,ad7388-4
|
||||
- adi,ad7389-4
|
||||
- adi,adaq4370-4
|
||||
- adi,adaq4380-4
|
||||
- adi,adaq4381-4
|
||||
|
|
@ -213,6 +215,15 @@ allOf:
|
|||
properties:
|
||||
refin-supply: false
|
||||
|
||||
# adi,ad7389-4 is internal reference only
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
const: adi,ad7389-4
|
||||
then:
|
||||
properties:
|
||||
refio-supply: false
|
||||
|
||||
# adaq devices need more supplies and using channel to declare gain property
|
||||
# only applies to adaq devices
|
||||
- if:
|
||||
|
|
|
|||
|
|
@ -17,35 +17,40 @@ description: |
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad7091
|
||||
- adi,ad7091r
|
||||
- adi,ad7273
|
||||
- adi,ad7274
|
||||
- adi,ad7276
|
||||
- adi,ad7277
|
||||
- adi,ad7278
|
||||
- adi,ad7466
|
||||
- adi,ad7467
|
||||
- adi,ad7468
|
||||
- adi,ad7475
|
||||
- adi,ad7476
|
||||
- adi,ad7476a
|
||||
- adi,ad7477
|
||||
- adi,ad7477a
|
||||
- adi,ad7478
|
||||
- adi,ad7478a
|
||||
- adi,ad7495
|
||||
- adi,ad7910
|
||||
- adi,ad7920
|
||||
- adi,ad7940
|
||||
- ti,adc081s
|
||||
- ti,adc101s
|
||||
- ti,adc121s
|
||||
- ti,ads7866
|
||||
- ti,ads7867
|
||||
- ti,ads7868
|
||||
- lltc,ltc2314-14
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- adi,ad7091
|
||||
- adi,ad7091r
|
||||
- adi,ad7273
|
||||
- adi,ad7274
|
||||
- adi,ad7276
|
||||
- adi,ad7277
|
||||
- adi,ad7278
|
||||
- adi,ad7466
|
||||
- adi,ad7467
|
||||
- adi,ad7468
|
||||
- adi,ad7475
|
||||
- adi,ad7476
|
||||
- adi,ad7476a
|
||||
- adi,ad7477
|
||||
- adi,ad7477a
|
||||
- adi,ad7478
|
||||
- adi,ad7478a
|
||||
- adi,ad7495
|
||||
- adi,ad7910
|
||||
- adi,ad7920
|
||||
- adi,ad7940
|
||||
- ti,adc081s
|
||||
- ti,adc101s
|
||||
- ti,adc121s
|
||||
- ti,ads7866
|
||||
- ti,ads7867
|
||||
- ti,ads7868
|
||||
- lltc,ltc2314-14
|
||||
- items:
|
||||
- const: rohm,bu79100g
|
||||
- const: ti,ads7866
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -45,6 +45,14 @@ properties:
|
|||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
'#trigger-source-cells':
|
||||
description: |
|
||||
Cell indicates the output signal: 0 = BUSY, 1 = FIRSTDATA.
|
||||
|
||||
For convenience, macros for these values are available in
|
||||
dt-bindings/iio/adc/adi,ad7606.h.
|
||||
const: 1
|
||||
|
||||
# According to the datasheet, "Data is clocked in from SDI on the falling
|
||||
# edge of SCLK, while data is clocked out on DOUTA on the rising edge of
|
||||
# SCLK". Also, even if not stated textually in the datasheet, it is made
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@ properties:
|
|||
- amlogic,meson8m2-saradc
|
||||
- amlogic,meson-gxbb-saradc
|
||||
- amlogic,meson-gxl-saradc
|
||||
- amlogic,meson-gxlx-saradc
|
||||
- amlogic,meson-gxm-saradc
|
||||
- amlogic,meson-axg-saradc
|
||||
- amlogic,meson-g12a-saradc
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@ properties:
|
|||
- const: mediatek,mt2701-auxadc
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt6893-auxadc
|
||||
- mediatek,mt8183-auxadc
|
||||
- mediatek,mt8186-auxadc
|
||||
- mediatek,mt8188-auxadc
|
||||
|
|
|
|||
|
|
@ -32,6 +32,9 @@ properties:
|
|||
spi-max-frequency:
|
||||
maximum: 20000000
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description: |
|
||||
Phandle and clock identifier for external sampling clock.
|
||||
|
|
@ -71,6 +74,7 @@ unevaluatedProperties: false
|
|||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -80,6 +84,7 @@ examples:
|
|||
reg = <0>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <15 2>;
|
||||
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
spi-max-frequency = <20000000>;
|
||||
microchip,device-addr = <0>;
|
||||
vref-supply = <&vref_reg>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,70 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/nuvoton,nct7201.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nuvoton nct7201 and similar ADCs
|
||||
|
||||
maintainers:
|
||||
- Eason Yang <j2anfernee@gmail.com>
|
||||
|
||||
description: |
|
||||
The NCT7201/NCT7202 is a Nuvoton Hardware Monitor IC, contains up to 12
|
||||
voltage monitoring channels, with SMBus interface, and up to 4 sets SMBus
|
||||
address selection by ADDR connection. It also provides ALERT# signal for
|
||||
event notification and reset input RSTIN# to recover it from a fault
|
||||
condition.
|
||||
|
||||
NCT7201 contains 8 voltage monitor inputs (VIN1~VIN8).
|
||||
NCT7202 contains 12 voltage monitor inputs (VIN1~VIN12).
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- nuvoton,nct7201
|
||||
- nuvoton,nct7202
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply:
|
||||
description:
|
||||
A 3.3V to supply that powers the chip.
|
||||
|
||||
vref-supply:
|
||||
description:
|
||||
The regulator supply for the ADC reference voltage.
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@1d {
|
||||
compatible = "nuvoton,nct7202";
|
||||
reg = <0x1d>;
|
||||
vdd-supply = <&vdd>;
|
||||
vref-supply = <&vref>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
...
|
||||
69
Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml
Normal file
69
Documentation/devicetree/bindings/iio/adc/rohm,bd79104.yaml
Normal file
|
|
@ -0,0 +1,69 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/rohm,bd79104.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ROHM Semiconductor BD79104 ADC
|
||||
|
||||
maintainers:
|
||||
- Matti Vaittinen <mazziesaccount@gmail.com>
|
||||
|
||||
description: |
|
||||
12 bit SPI ADC with 8 channels.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: rohm,bd79104
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply: true
|
||||
iovdd-supply: true
|
||||
|
||||
# The component data-sheet says the frequency is 20M. I, however, found
|
||||
# that the ROHM evaluation board BD79104FV-EVK-001 had problems with 20M.
|
||||
# I have successfully used it with 4M. My _assumption_ is that this is not
|
||||
# the limitation of the component itself, but a limitation of the EVK.
|
||||
spi-max-frequency:
|
||||
maximum: 20000000
|
||||
|
||||
"#io-channel-cells":
|
||||
const: 1
|
||||
|
||||
spi-cpha: true
|
||||
spi-cpol: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd-supply
|
||||
- iovdd-supply
|
||||
- spi-cpha
|
||||
- spi-cpol
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
adc@0 {
|
||||
compatible = "rohm,bd79104";
|
||||
reg = <0>;
|
||||
vdd-supply = <&vdd_supply>;
|
||||
iovdd-supply = <&iovdd_supply>;
|
||||
spi-max-frequency = <4000000>;
|
||||
spi-cpha;
|
||||
spi-cpol;
|
||||
#io-channel-cells = <1>;
|
||||
};
|
||||
};
|
||||
...
|
||||
114
Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml
Normal file
114
Documentation/devicetree/bindings/iio/adc/rohm,bd79124.yaml
Normal file
|
|
@ -0,0 +1,114 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/rohm,bd79124.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ROHM BD79124 ADC/GPO
|
||||
|
||||
maintainers:
|
||||
- Matti Vaittinen <mazziesaccount@gmail.com>
|
||||
|
||||
description: |
|
||||
The ROHM BD79124 is a 12-bit, 8-channel, SAR ADC. The ADC supports
|
||||
an automatic measurement mode, with an alarm interrupt for out-of-window
|
||||
measurements. ADC input pins can be also configured as general purpose
|
||||
outputs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: rohm,bd79124
|
||||
|
||||
reg:
|
||||
description:
|
||||
I2C slave address.
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
"#gpio-cells":
|
||||
const: 1
|
||||
description:
|
||||
The pin number.
|
||||
|
||||
vdd-supply: true
|
||||
|
||||
iovdd-supply: true
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^channel@[0-7]+$":
|
||||
type: object
|
||||
$ref: /schemas/iio/adc/adc.yaml#
|
||||
description: Represents ADC channel.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: AIN pin number
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- iovdd-supply
|
||||
- vdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
adc: adc@10 {
|
||||
compatible = "rohm,bd79124";
|
||||
reg = <0x10>;
|
||||
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <29 8>;
|
||||
|
||||
vdd-supply = <&dummyreg>;
|
||||
iovdd-supply = <&dummyreg>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
channel@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
channel@3 {
|
||||
reg = <3>;
|
||||
};
|
||||
channel@4 {
|
||||
reg = <4>;
|
||||
};
|
||||
channel@5 {
|
||||
reg = <5>;
|
||||
};
|
||||
channel@6 {
|
||||
reg = <6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -498,7 +498,7 @@ patternProperties:
|
|||
examples:
|
||||
- |
|
||||
// Example 1: with stm32f429, ADC1, single-ended channel 8
|
||||
adc123: adc@40012000 {
|
||||
adc123: adc@40012000 {
|
||||
compatible = "st,stm32f4-adc-core";
|
||||
reg = <0x40012000 0x400>;
|
||||
interrupts = <18>;
|
||||
|
|
@ -512,28 +512,28 @@ examples:
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
adc@0 {
|
||||
compatible = "st,stm32f4-adc";
|
||||
#io-channel-cells = <1>;
|
||||
reg = <0x0>;
|
||||
clocks = <&rcc 0 168>;
|
||||
interrupt-parent = <&adc123>;
|
||||
interrupts = <0>;
|
||||
st,adc-channels = <8>;
|
||||
dmas = <&dma2 0 0 0x400 0x0>;
|
||||
dma-names = "rx";
|
||||
assigned-resolution-bits = <8>;
|
||||
compatible = "st,stm32f4-adc";
|
||||
#io-channel-cells = <1>;
|
||||
reg = <0x0>;
|
||||
clocks = <&rcc 0 168>;
|
||||
interrupt-parent = <&adc123>;
|
||||
interrupts = <0>;
|
||||
st,adc-channels = <8>;
|
||||
dmas = <&dma2 0 0 0x400 0x0>;
|
||||
dma-names = "rx";
|
||||
assigned-resolution-bits = <8>;
|
||||
};
|
||||
// ...
|
||||
// other adc child nodes follow...
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
// Example 2: with stm32mp157c to setup ADC1 with:
|
||||
// - channels 0 & 1 as single-ended
|
||||
// - channels 2 & 3 as differential (with resp. 6 & 7 negative inputs)
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/stm32mp1-clks.h>
|
||||
adc12: adc@48003000 {
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/stm32mp1-clks.h>
|
||||
adc12: adc@48003000 {
|
||||
compatible = "st,stm32mp1-adc-core";
|
||||
reg = <0x48003000 0x400>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -550,27 +550,27 @@ examples:
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
adc@0 {
|
||||
compatible = "st,stm32mp1-adc";
|
||||
#io-channel-cells = <1>;
|
||||
reg = <0x0>;
|
||||
interrupt-parent = <&adc12>;
|
||||
interrupts = <0>;
|
||||
st,adc-channels = <0 1>;
|
||||
st,adc-diff-channels = <2 6>, <3 7>;
|
||||
st,min-sample-time-nsecs = <5000>;
|
||||
dmas = <&dmamux1 9 0x400 0x05>;
|
||||
dma-names = "rx";
|
||||
compatible = "st,stm32mp1-adc";
|
||||
#io-channel-cells = <1>;
|
||||
reg = <0x0>;
|
||||
interrupt-parent = <&adc12>;
|
||||
interrupts = <0>;
|
||||
st,adc-channels = <0 1>;
|
||||
st,adc-diff-channels = <2 6>, <3 7>;
|
||||
st,min-sample-time-nsecs = <5000>;
|
||||
dmas = <&dmamux1 9 0x400 0x05>;
|
||||
dma-names = "rx";
|
||||
};
|
||||
// ...
|
||||
// other adc child node follow...
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
// Example 3: with stm32mp157c to setup ADC2 with:
|
||||
// - internal channels 13, 14, 15.
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/stm32mp1-clks.h>
|
||||
adc122: adc@48003000 {
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/stm32mp1-clks.h>
|
||||
adc122: adc@48003000 {
|
||||
compatible = "st,stm32mp1-adc-core";
|
||||
reg = <0x48003000 0x400>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -587,28 +587,28 @@ examples:
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
adc@100 {
|
||||
compatible = "st,stm32mp1-adc";
|
||||
#io-channel-cells = <1>;
|
||||
reg = <0x100>;
|
||||
interrupts = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
channel@13 {
|
||||
reg = <13>;
|
||||
label = "vrefint";
|
||||
st,min-sample-time-ns = <9000>;
|
||||
};
|
||||
channel@14 {
|
||||
reg = <14>;
|
||||
label = "vddcore";
|
||||
st,min-sample-time-ns = <9000>;
|
||||
};
|
||||
channel@15 {
|
||||
reg = <15>;
|
||||
label = "vbat";
|
||||
st,min-sample-time-ns = <9000>;
|
||||
};
|
||||
compatible = "st,stm32mp1-adc";
|
||||
#io-channel-cells = <1>;
|
||||
reg = <0x100>;
|
||||
interrupts = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
channel@13 {
|
||||
reg = <13>;
|
||||
label = "vrefint";
|
||||
st,min-sample-time-ns = <9000>;
|
||||
};
|
||||
channel@14 {
|
||||
reg = <14>;
|
||||
label = "vddcore";
|
||||
st,min-sample-time-ns = <9000>;
|
||||
};
|
||||
channel@15 {
|
||||
reg = <15>;
|
||||
label = "vbat";
|
||||
st,min-sample-time-ns = <9000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -0,0 +1,33 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/chemical/winsen,mhz19b.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MHZ19B CO2 sensor
|
||||
|
||||
maintainers:
|
||||
- Gyeyoung Baek <gye976@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: winsen,mhz19b
|
||||
|
||||
vin-supply:
|
||||
description: Regulator that provides power to the sensor
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- vin-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
serial {
|
||||
co2-sensor {
|
||||
compatible = "winsen,mhz19b";
|
||||
vin-supply = <&vdd>;
|
||||
};
|
||||
};
|
||||
...
|
||||
100
Documentation/devicetree/bindings/iio/dac/adi,ad3530r.yaml
Normal file
100
Documentation/devicetree/bindings/iio/dac/adi,ad3530r.yaml
Normal file
|
|
@ -0,0 +1,100 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/dac/adi,ad3530r.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD3530R and Similar DACs
|
||||
|
||||
maintainers:
|
||||
- Kim Seer Paller <kimseer.paller@analog.com>
|
||||
|
||||
description: |
|
||||
The AD3530/AD3530R (8-channel) and AD3531/AD3531R (4-channel) are low-power,
|
||||
16-bit, buffered voltage output digital-to-analog converters (DACs) with
|
||||
software-programmable gain controls, providing full-scale output spans of 2.5V
|
||||
or 5V for reference voltages of 2.5V. These devices operate from a single 2.7V
|
||||
to 5.5V supply and are guaranteed monotonic by design. The "R" variants
|
||||
include a 2.5V, 5ppm/°C internal reference, which is disabled by default.
|
||||
Datasheet can be found here:
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3530_ad530r.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3531-ad3531r.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad3530
|
||||
- adi,ad3530r
|
||||
- adi,ad3531
|
||||
- adi,ad3531r
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 50000000
|
||||
|
||||
vdd-supply:
|
||||
description: Power Supply Input.
|
||||
|
||||
iovdd-supply:
|
||||
description: Digital Power Supply Input.
|
||||
|
||||
io-channels:
|
||||
description:
|
||||
ADC channel used to monitor internal die temperature, output voltages, and
|
||||
current of a selected channel via the MUXOUT pin.
|
||||
maxItems: 1
|
||||
|
||||
ref-supply:
|
||||
description:
|
||||
Reference Input/Output. The voltage at the REF pin sets the full-scale
|
||||
range of all channels. If not provided the internal reference is used and
|
||||
also provided on the VREF pin.
|
||||
|
||||
reset-gpios:
|
||||
description:
|
||||
Active low signal that is falling edge sensitive. When it is deasserted,
|
||||
the digital core initialization is performed and all DAC registers except
|
||||
the Interface Configuration A register are reset to their default values.
|
||||
maxItems: 1
|
||||
|
||||
ldac-gpios:
|
||||
description:
|
||||
LDAC pin to be used as a hardware trigger to update the DAC channels. If
|
||||
not present, the DAC channels are updated by Software LDAC.
|
||||
maxItems: 1
|
||||
|
||||
adi,range-double:
|
||||
description:
|
||||
Configure the output range for all channels. If the property is present,
|
||||
the output will range from 0V to 2Vref. If the property is not present,
|
||||
the output will range from 0V to Vref.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd-supply
|
||||
- iovdd-supply
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dac@0 {
|
||||
compatible = "adi,ad3530r";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
vdd-supply = <&vdd>;
|
||||
iovdd-supply = <&iovdd>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -217,7 +217,7 @@ required:
|
|||
- reg
|
||||
- spi-max-frequency
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -27,6 +27,8 @@ properties:
|
|||
|
||||
vdrive-supply: true
|
||||
|
||||
vrefin-supply: true
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -144,7 +144,7 @@ required:
|
|||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -124,7 +124,7 @@ required:
|
|||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ required:
|
|||
- reg
|
||||
- vdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -5,19 +5,26 @@
|
|||
$id: http://devicetree.org/schemas/iio/dac/rohm,bd79703.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ROHM BD79703 DAC device driver
|
||||
title: ROHM BD79700, BD79701, BD79702 and BD79703 DACs
|
||||
|
||||
maintainers:
|
||||
- Matti Vaittinen <mazziesaccount@gmail.com>
|
||||
|
||||
description: |
|
||||
The ROHM BD79703 is a 6 channel, 8-bit DAC.
|
||||
Datasheet can be found here:
|
||||
The ROHM BD7970[0,1,2,3] are 8-bit DACs. The BD79700 has 2 channels,
|
||||
BD79701 3 channels, BD79702 4 channels and BD79703 has 6 channels.
|
||||
Datasheets for BD79702 and BD79703 can be found from
|
||||
https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79702fv-lb_bd79703fv-lb-e.pdf
|
||||
and for the BD79700 and the BD79701 from
|
||||
https://fscdn.rohm.com/en/products/databook/datasheet/ic/data_converter/dac/bd79700fvm-lb_bd79701fvm-lb-e.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: rohm,bd79703
|
||||
enum:
|
||||
- rohm,bd79700
|
||||
- rohm,bd79701
|
||||
- rohm,bd79702
|
||||
- rohm,bd79703
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
@ -27,23 +34,35 @@ properties:
|
|||
|
||||
vfs-supply:
|
||||
description:
|
||||
The regulator to use as a full scale voltage. The voltage should be between 2.7V .. VCC
|
||||
The regulator to use as a full scale voltage. The voltage should be
|
||||
between 2.7V .. VCC. Not present on BD79700 and BD79701.
|
||||
|
||||
vcc-supply:
|
||||
description:
|
||||
The regulator supplying the operating voltage. Should be between 2.7V ... 5.5V
|
||||
The regulator supplying the operating voltage. Should be between
|
||||
2.7V ... 5.5V. Is used also as a Vfs on BD79700 and BD79701.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- spi-max-frequency
|
||||
- vfs-supply
|
||||
- vcc-supply
|
||||
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- rohm,bd79702
|
||||
- rohm,bd79703
|
||||
then:
|
||||
required:
|
||||
- vfs-supply
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -44,6 +44,24 @@ properties:
|
|||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
adi,lpf-margin-mhz:
|
||||
description:
|
||||
Sets the minimum distance between the fundamental frequency of `rf_in`
|
||||
and the corner frequency of the low-pass, output filter when operated in
|
||||
'auto' mode. The selected low-pass corner frequency will be greater than,
|
||||
or equal to, `rf_in` + `lpf-margin-hz`. If not setting is found that
|
||||
satisfies this relationship the filter will be put into 'bypass'.
|
||||
default: 0
|
||||
|
||||
adi,hpf-margin-mhz:
|
||||
description:
|
||||
Sets the minimum distance between the fundamental frequency of `rf_in`
|
||||
and the corner frequency of the high-pass, input filter when operated in
|
||||
'auto' mode. The selected high-pass corner frequency will be less than,
|
||||
or equal to, `rf_in` - `hpf-margin-hz`. If not setting is found that
|
||||
satisfies this relationship the filter will be put into 'bypass'.
|
||||
default: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
@ -61,6 +79,8 @@ examples:
|
|||
spi-max-frequency = <10000000>;
|
||||
clocks = <&admv8818_rfin>;
|
||||
clock-names = "rf_in";
|
||||
adi,lpf-margin-mhz = <300>;
|
||||
adi,hpf-margin-mhz = <300>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
|
|||
|
|
@ -53,7 +53,7 @@ required:
|
|||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -39,7 +39,16 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
enum:
|
||||
- INT1
|
||||
- INT2
|
||||
|
||||
drive-open-drain:
|
||||
type: boolean
|
||||
|
|
@ -76,6 +85,7 @@ examples:
|
|||
reg = <0x68>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-names = "INT1";
|
||||
vdd-supply = <&vdd>;
|
||||
vddio-supply = <&vddio>;
|
||||
};
|
||||
|
|
@ -95,6 +105,7 @@ examples:
|
|||
spi-cpol;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-names = "INT1";
|
||||
vdd-supply = <&vdd>;
|
||||
vddio-supply = <&vddio>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,6 +24,10 @@ properties:
|
|||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
description: GPIO connected to the DVI reset pin (active low)
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
@ -32,6 +36,7 @@ additionalProperties: false
|
|||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -39,6 +44,7 @@ examples:
|
|||
light-sensor@23 {
|
||||
compatible = "rohm,bh1750";
|
||||
reg = <0x23>;
|
||||
reset-gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ required:
|
|||
allOf:
|
||||
- $ref: /schemas/spi/spi-peripheral-props.yaml
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
dependentSchemas:
|
||||
honeywell,pmin-pascal:
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ allOf:
|
|||
honeywell,pmin-pascal: false
|
||||
honeywell,pmax-pascal: false
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -70,8 +70,8 @@ examples:
|
|||
reg = <0x00580000 0x14000>;
|
||||
#interconnect-cells = <1>;
|
||||
|
||||
snoc_mm: interconnect-snoc {
|
||||
compatible = "qcom,msm8939-snoc-mm";
|
||||
#interconnect-cells = <1>;
|
||||
};
|
||||
snoc_mm: interconnect-snoc {
|
||||
compatible = "qcom,msm8939-snoc-mm";
|
||||
#interconnect-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -84,17 +84,17 @@ additionalProperties: false
|
|||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8953.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-msm8953.h>
|
||||
|
||||
snoc: interconnect@580000 {
|
||||
compatible = "qcom,msm8953-snoc";
|
||||
reg = <0x580000 0x16080>;
|
||||
interconnect@580000 {
|
||||
compatible = "qcom,msm8953-snoc";
|
||||
reg = <0x580000 0x16080>;
|
||||
|
||||
#interconnect-cells = <2>;
|
||||
#interconnect-cells = <2>;
|
||||
|
||||
snoc_mm: interconnect-snoc {
|
||||
compatible = "qcom,msm8953-snoc-mm";
|
||||
interconnect-snoc {
|
||||
compatible = "qcom,msm8953-snoc-mm";
|
||||
|
||||
#interconnect-cells = <2>;
|
||||
};
|
||||
};
|
||||
#interconnect-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -50,13 +50,13 @@ additionalProperties: false
|
|||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
bimc: interconnect@fc380000 {
|
||||
reg = <0xfc380000 0x6a000>;
|
||||
compatible = "qcom,msm8974-bimc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
|
||||
<&rpmcc RPM_SMD_BIMC_A_CLK>;
|
||||
};
|
||||
interconnect@fc380000 {
|
||||
reg = <0xfc380000 0x6a000>;
|
||||
compatible = "qcom,msm8974-bimc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
|
||||
<&rpmcc RPM_SMD_BIMC_A_CLK>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@ properties:
|
|||
- const: qcom,osm-l3
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sa8775p-epss-l3
|
||||
- qcom,sc7280-epss-l3
|
||||
- qcom,sc8280xp-epss-l3
|
||||
- qcom,sm6375-cpucp-l3
|
||||
|
|
|
|||
|
|
@ -41,10 +41,10 @@ unevaluatedProperties: false
|
|||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
bimc: interconnect@400000 {
|
||||
compatible = "qcom,msm8916-bimc";
|
||||
reg = <0x00400000 0x62000>;
|
||||
#interconnect-cells = <1>;
|
||||
};
|
||||
interconnect@400000 {
|
||||
compatible = "qcom,msm8916-bimc";
|
||||
reg = <0x00400000 0x62000>;
|
||||
#interconnect-cells = <1>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -127,19 +127,19 @@ unevaluatedProperties: false
|
|||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interconnect/qcom,sdm845.h>
|
||||
#include <dt-bindings/interconnect/qcom,sdm845.h>
|
||||
|
||||
mem_noc: interconnect@1380000 {
|
||||
compatible = "qcom,sdm845-mem-noc";
|
||||
reg = <0x01380000 0x27200>;
|
||||
#interconnect-cells = <1>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
};
|
||||
interconnect@1380000 {
|
||||
compatible = "qcom,sdm845-mem-noc";
|
||||
reg = <0x01380000 0x27200>;
|
||||
#interconnect-cells = <1>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
};
|
||||
|
||||
mmss_noc: interconnect@1740000 {
|
||||
compatible = "qcom,sdm845-mmss-noc";
|
||||
reg = <0x01740000 0x1c1000>;
|
||||
#interconnect-cells = <1>;
|
||||
qcom,bcm-voter-names = "apps", "disp";
|
||||
qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
|
||||
};
|
||||
interconnect@1740000 {
|
||||
compatible = "qcom,sdm845-mmss-noc";
|
||||
reg = <0x01740000 0x1c1000>;
|
||||
#interconnect-cells = <1>;
|
||||
qcom,bcm-voter-names = "apps", "disp";
|
||||
qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -78,15 +78,15 @@ examples:
|
|||
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||
|
||||
clk_virt: interconnect-0 {
|
||||
compatible = "qcom,sdx75-clk-virt";
|
||||
#interconnect-cells = <2>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
clocks = <&rpmhcc RPMH_QPIC_CLK>;
|
||||
compatible = "qcom,sdx75-clk-virt";
|
||||
#interconnect-cells = <2>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
clocks = <&rpmhcc RPMH_QPIC_CLK>;
|
||||
};
|
||||
|
||||
system_noc: interconnect@1640000 {
|
||||
compatible = "qcom,sdx75-system-noc";
|
||||
reg = <0x1640000 0x4b400>;
|
||||
#interconnect-cells = <2>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
compatible = "qcom,sdx75-system-noc";
|
||||
reg = <0x1640000 0x4b400>;
|
||||
#interconnect-cells = <2>;
|
||||
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||
};
|
||||
|
|
|
|||
26
Documentation/devicetree/bindings/mips/econet.yaml
Normal file
26
Documentation/devicetree/bindings/mips/econet.yaml
Normal file
|
|
@ -0,0 +1,26 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mips/econet.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: EcoNet MIPS SoCs
|
||||
|
||||
maintainers:
|
||||
- Caleb James DeLisle <cjd@cjdns.fr>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Boards with EcoNet EN751221 family SoC
|
||||
items:
|
||||
- enum:
|
||||
- smartfiber,xp8421-b
|
||||
- const: econet,en751221
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
|
@ -25,6 +25,10 @@ properties:
|
|||
description:
|
||||
List of gpios used to control the multiplexer, least significant bit first.
|
||||
|
||||
mux-supply:
|
||||
description:
|
||||
Regulator to power on the multiplexer.
|
||||
|
||||
'#mux-control-cells':
|
||||
enum: [ 0, 1 ]
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,50 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/net/wireless/realtek,rtl8188e.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Realtek RTL8188E USB WiFi
|
||||
|
||||
maintainers:
|
||||
- J. Neuschäfer <j.ne@posteo.net>
|
||||
|
||||
description:
|
||||
Realtek RTL8188E is a family of USB-connected 2.4 GHz WiFi modules.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/usb/usb-device.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: usbbda,179 # RTL8188ETV
|
||||
|
||||
reg: true
|
||||
|
||||
vdd-supply:
|
||||
description:
|
||||
Regulator for the 3V3 supply.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- vdd-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
usb {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wifi: wifi@1 {
|
||||
compatible = "usbbda,179";
|
||||
reg = <1>;
|
||||
vdd-supply = <&vcc3v3>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/nvmem/apple,spmi-nvmem.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Apple SPMI NVMEM
|
||||
|
||||
description: Exports a series of SPMI registers as NVMEM cells
|
||||
|
||||
maintainers:
|
||||
- Sasha Finkelstein <fnkl.kernel@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvmem.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- apple,maverick-pmic
|
||||
- apple,sera-pmic
|
||||
- apple,stowe-pmic
|
||||
- const: apple,spmi-nvmem
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/spmi/spmi.h>
|
||||
|
||||
pmic@f {
|
||||
compatible = "apple,maverick-pmic", "apple,spmi-nvmem";
|
||||
reg = <0xf SPMI_USID>;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
boot_stage: boot-stage@6001 {
|
||||
reg = <0x6001 0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -15,7 +15,7 @@ description: |
|
|||
Some peripherals such as PWM have their I/O go through the 4 "GPIOs".
|
||||
|
||||
maintainers:
|
||||
- Jianlong Huang <jianlong.huang@starfivetech.com>
|
||||
- Hal Feng <hal.feng@starfivetech.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ description: |
|
|||
any GPIO can be set up to be controlled by any of the peripherals.
|
||||
|
||||
maintainers:
|
||||
- Jianlong Huang <jianlong.huang@starfivetech.com>
|
||||
- Hal Feng <hal.feng@starfivetech.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -30,11 +30,19 @@ properties:
|
|||
const: 3
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: axi
|
||||
- const: ext
|
||||
|
||||
required:
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
|
@ -43,6 +51,7 @@ examples:
|
|||
pwm@44b00000 {
|
||||
compatible = "adi,axi-pwmgen-2.00.a";
|
||||
reg = <0x44b00000 0x1000>;
|
||||
clocks = <&spi_clk>;
|
||||
clocks = <&fpga_clk>, <&spi_clk>;
|
||||
clock-names = "axi", "ext";
|
||||
#pwm-cells = <3>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -662,6 +662,31 @@ properties:
|
|||
Registers in the AX45MP datasheet.
|
||||
https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf
|
||||
|
||||
# SiFive
|
||||
- const: xsfvqmaccdod
|
||||
description:
|
||||
SiFive Int8 Matrix Multiplication Extensions Specification.
|
||||
See more details in
|
||||
https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification
|
||||
|
||||
- const: xsfvqmaccqoq
|
||||
description:
|
||||
SiFive Int8 Matrix Multiplication Extensions Specification.
|
||||
See more details in
|
||||
https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification
|
||||
|
||||
- const: xsfvfnrclipxfqf
|
||||
description:
|
||||
SiFive FP32-to-int8 Ranged Clip Instructions Extensions Specification.
|
||||
See more details in
|
||||
https://www.sifive.com/document-file/fp32-to-int8-ranged-clip-instructions
|
||||
|
||||
- const: xsfvfwmaccqqq
|
||||
description:
|
||||
SiFive Matrix Multiply Accumulate Instruction Extensions Specification.
|
||||
See more details in
|
||||
https://www.sifive.com/document-file/matrix-multiply-accumulate-instruction
|
||||
|
||||
# T-HEAD
|
||||
- const: xtheadvector
|
||||
description:
|
||||
|
|
|
|||
|
|
@ -135,7 +135,16 @@ properties:
|
|||
clock-frequency: true
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
minItems: 1
|
||||
items:
|
||||
- description: The core function clock
|
||||
- description: An optional bus clock
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: core
|
||||
- const: bus
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
|
@ -224,6 +233,25 @@ required:
|
|||
- reg
|
||||
- interrupts
|
||||
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: spacemit,k1-uart
|
||||
then:
|
||||
required: [clock-names]
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
clock-names:
|
||||
minItems: 2
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
clock-names:
|
||||
maxItems: 1
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -64,14 +64,7 @@ properties:
|
|||
clock-names:
|
||||
const: fclk
|
||||
|
||||
rts-gpios: true
|
||||
cts-gpios: true
|
||||
dtr-gpios: true
|
||||
dsr-gpios: true
|
||||
rng-gpios: true
|
||||
dcd-gpios: true
|
||||
rs485-rts-active-high: true
|
||||
rts-gpio: true
|
||||
power-domains: true
|
||||
clock-frequency: true
|
||||
current-speed: true
|
||||
|
|
|
|||
|
|
@ -56,6 +56,9 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- amlogic,a4-uart
|
||||
- amlogic,s6-uart
|
||||
- amlogic,s7-uart
|
||||
- amlogic,s7d-uart
|
||||
- amlogic,t7-uart
|
||||
- const: amlogic,meson-s4-uart
|
||||
|
||||
|
|
|
|||
|
|
@ -1,25 +0,0 @@
|
|||
* Synopsys ARC UART : Non standard UART used in some of the ARC FPGA boards
|
||||
|
||||
Required properties:
|
||||
- compatible : "snps,arc-uart"
|
||||
- reg : offset and length of the register set for the device.
|
||||
- interrupts : device interrupt
|
||||
- clock-frequency : the input clock frequency for the UART
|
||||
- current-speed : baud rate for UART
|
||||
|
||||
e.g.
|
||||
|
||||
arcuart0: serial@c0fc1000 {
|
||||
compatible = "snps,arc-uart";
|
||||
reg = <0xc0fc1000 0x100>;
|
||||
interrupts = <5>;
|
||||
clock-frequency = <80000000>;
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
Note: Each port should have an alias correctly numbered in "aliases" node.
|
||||
|
||||
e.g.
|
||||
aliases {
|
||||
serial0 = &arcuart0;
|
||||
};
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
ARM MPS2 UART
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "arm,mps2-uart"
|
||||
- reg : Address and length of the register set
|
||||
- interrupts : Reference to the UART RX, TX and overrun interrupts
|
||||
|
||||
Required clocking property:
|
||||
- clocks : The input clock of the UART
|
||||
|
||||
|
||||
Examples:
|
||||
|
||||
uart0: serial@40004000 {
|
||||
compatible = "arm,mps2-uart";
|
||||
reg = <0x40004000 0x1000>;
|
||||
interrupts = <0 1 12>;
|
||||
clocks = <&sysclk>;
|
||||
};
|
||||
46
Documentation/devicetree/bindings/serial/arm,mps2-uart.yaml
Normal file
46
Documentation/devicetree/bindings/serial/arm,mps2-uart.yaml
Normal file
|
|
@ -0,0 +1,46 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/arm,mps2-uart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm MPS2 UART
|
||||
|
||||
maintainers:
|
||||
- Vladimir Murzin <vladimir.murzin@arm.com>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: arm,mps2-uart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: RX interrupt
|
||||
- description: TX interrupt
|
||||
- description: Overrun interrupt
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
serial@40004000 {
|
||||
compatible = "arm,mps2-uart";
|
||||
reg = <0x40004000 0x1000>;
|
||||
interrupts = <0>, <1>, <12>;
|
||||
clocks = <&sysclk>;
|
||||
};
|
||||
38
Documentation/devicetree/bindings/serial/arm,sbsa-uart.yaml
Normal file
38
Documentation/devicetree/bindings/serial/arm,sbsa-uart.yaml
Normal file
|
|
@ -0,0 +1,38 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/arm,sbsa-uart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM SBSA UART
|
||||
|
||||
maintainers:
|
||||
- Andre Przywara <andre.przywara@arm.com>
|
||||
|
||||
description:
|
||||
This UART uses a subset of the PL011 registers and consequently lives in the
|
||||
PL011 driver. It's baudrate and other communication parameters cannot be
|
||||
adjusted at runtime, so it lacks a clock specifier here.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: arm,sbsa-uart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
current-speed:
|
||||
description: fixed baud rate set by the firmware
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- current-speed
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
|
@ -1,10 +0,0 @@
|
|||
* ARM SBSA defined generic UART
|
||||
This UART uses a subset of the PL011 registers and consequently lives
|
||||
in the PL011 driver. It's baudrate and other communication parameters
|
||||
cannot be adjusted at runtime, so it lacks a clock specifier here.
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "arm,sbsa-uart"
|
||||
- reg: exactly one register range
|
||||
- interrupts: exactly one interrupt specifier
|
||||
- current-speed: the (fixed) baud rate set by the firmware
|
||||
|
|
@ -26,6 +26,7 @@ properties:
|
|||
- enum:
|
||||
- microchip,sam9x60-usart
|
||||
- microchip,sam9x7-usart
|
||||
- microchip,sama7d65-usart
|
||||
- const: atmel,at91sam9260-usart
|
||||
- items:
|
||||
- const: microchip,sam9x60-dbgu
|
||||
|
|
|
|||
|
|
@ -1,31 +0,0 @@
|
|||
* Cirrus Logic CLPS711X Universal Asynchronous Receiver/Transmitter (UART)
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "cirrus,ep7209-uart".
|
||||
- reg: Address and length of the register set for the device.
|
||||
- interrupts: Should contain UART TX and RX interrupt.
|
||||
- clocks: Should contain UART core clock number.
|
||||
- syscon: Phandle to SYSCON node, which contain UART control bits.
|
||||
|
||||
Optional properties:
|
||||
- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
|
||||
line respectively.
|
||||
|
||||
Note: Each UART port should have an alias correctly numbered
|
||||
in "aliases" node.
|
||||
|
||||
Example:
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
};
|
||||
|
||||
uart1: uart@80000480 {
|
||||
compatible = "cirrus,ep7312-uart","cirrus,ep7209-uart";
|
||||
reg = <0x80000480 0x80>;
|
||||
interrupts = <12 13>;
|
||||
clocks = <&clks 11>;
|
||||
syscon = <&syscon1>;
|
||||
cts-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
|
||||
dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>;
|
||||
dcd-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/cirrus,ep7209-uart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cirrus Logic CLPS711X Universal Asynchronous Receiver/Transmitter (UART)
|
||||
|
||||
maintainers:
|
||||
- Alexander Shiyan <shc_work@mail.ru>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cirrus,ep7209-uart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: UART TX interrupt
|
||||
- description: UART RX interrupt
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
syscon:
|
||||
description: Phandle to SYSCON node, which contains UART control bits.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- syscon
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
serial@80000480 {
|
||||
compatible = "cirrus,ep7209-uart";
|
||||
reg = <0x80000480 0x80>;
|
||||
interrupts = <12>, <13>;
|
||||
clocks = <&clks 11>;
|
||||
syscon = <&syscon1>;
|
||||
cts-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
|
||||
dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>;
|
||||
dcd-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/cnxt,cx92755-usart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Conexant Digicolor USART
|
||||
|
||||
maintainers:
|
||||
- Baruch Siach <baruch@tkos.co.il>
|
||||
|
||||
description: >
|
||||
Note: this binding is only applicable for using the USART peripheral as UART.
|
||||
USART also support synchronous serial protocols like SPI and I2S.
|
||||
Use the binding that matches the wiring of your system.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cnxt,cx92755-usart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- interrupts
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
serial@f0000740 {
|
||||
compatible = "cnxt,cx92755-usart";
|
||||
reg = <0xf0000740 0x20>;
|
||||
clocks = <&main_clk>;
|
||||
interrupts = <44>;
|
||||
};
|
||||
|
|
@ -1,27 +0,0 @@
|
|||
Binding for Conexant Digicolor USART
|
||||
|
||||
Note: this binding is only applicable for using the USART peripheral as
|
||||
UART. USART also support synchronous serial protocols like SPI and I2S. Use
|
||||
the binding that matches the wiring of your system.
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "cnxt,cx92755-usart".
|
||||
- reg: Should contain USART controller registers location and length.
|
||||
- interrupts: Should contain a single USART controller interrupt.
|
||||
- clocks: Must contain phandles to the USART clock
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
|
||||
Note: Each UART port should have an alias correctly numbered
|
||||
in "aliases" node.
|
||||
|
||||
Example:
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
uart0: uart@f0000740 {
|
||||
compatible = "cnxt,cx92755-usart";
|
||||
reg = <0xf0000740 0x20>;
|
||||
clocks = <&main_clk>;
|
||||
interrupts = <44>;
|
||||
};
|
||||
56
Documentation/devicetree/bindings/serial/lantiq,asc.yaml
Normal file
56
Documentation/devicetree/bindings/serial/lantiq,asc.yaml
Normal file
|
|
@ -0,0 +1,56 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/lantiq,asc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Lantiq SoC ASC serial controller
|
||||
|
||||
maintainers:
|
||||
- John Crispin <john@phrozen.org>
|
||||
- Songjun Wu <songjun.wu@linux.intel.com>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: lantiq,asc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: TX interrupt
|
||||
- description: RX interrupt
|
||||
- description: Error interrupt
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Frequency clock
|
||||
- description: Gate clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: freq
|
||||
- const: asc
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/mips-gic.h>
|
||||
|
||||
serial@16600000 {
|
||||
compatible = "lantiq,asc";
|
||||
reg = <0x16600000 0x100000>;
|
||||
interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
|
@ -1,31 +0,0 @@
|
|||
Lantiq SoC ASC serial controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "lantiq,asc"
|
||||
- reg : Address and length of the register set for the device
|
||||
- interrupts: the 3 (tx rx err) interrupt numbers. The interrupt specifier
|
||||
depends on the interrupt-parent interrupt controller.
|
||||
|
||||
Optional properties:
|
||||
- clocks: Should contain frequency clock and gate clock
|
||||
- clock-names: Should be "freq" and "asc"
|
||||
|
||||
Example:
|
||||
|
||||
asc0: serial@16600000 {
|
||||
compatible = "lantiq,asc";
|
||||
reg = <0x16600000 0x100000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cgu CLK_SSX4>, <&cgu GCLK_UART>;
|
||||
clock-names = "freq", "asc";
|
||||
};
|
||||
|
||||
asc1: serial@e100c00 {
|
||||
compatible = "lantiq,asc";
|
||||
reg = <0xE100C00 0x400>;
|
||||
interrupt-parent = <&icu0>;
|
||||
interrupts = <112 113 114>;
|
||||
};
|
||||
|
|
@ -0,0 +1,102 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/marvell,armada-3700-uart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Armada-3700 UART
|
||||
|
||||
maintainers:
|
||||
- Pali Rohár <pali@kernel.org>
|
||||
|
||||
description:
|
||||
Marvell UART is a non standard UART used in some of Marvell EBU SoCs (e.g.
|
||||
Armada-3700).
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- marvell,armada-3700-uart
|
||||
- marvell,armada-3700-uart-ext
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
description:
|
||||
UART reference clock used to derive the baud rate. If absent, only fixed
|
||||
baud rate from the bootloader is supported.
|
||||
|
||||
interrupts:
|
||||
minItems: 2
|
||||
items:
|
||||
- description: UART sum interrupt
|
||||
- description: UART TX interrupt
|
||||
- description: UART RX interrupt
|
||||
|
||||
interrupt-names:
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
const: marvell,armada-3700-uart-ext
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 2
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: uart-tx
|
||||
- const: uart-rx
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 3
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: uart-sum
|
||||
- const: uart-tx
|
||||
- const: uart-rx
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
serial@12000 {
|
||||
compatible = "marvell,armada-3700-uart";
|
||||
reg = <0x12000 0x18>;
|
||||
clocks = <&uartclk 0>;
|
||||
interrupts =
|
||||
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "uart-sum", "uart-tx", "uart-rx";
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
serial@12200 {
|
||||
compatible = "marvell,armada-3700-uart-ext";
|
||||
reg = <0x12200 0x30>;
|
||||
clocks = <&uartclk 1>;
|
||||
interrupts =
|
||||
<GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "uart-tx", "uart-rx";
|
||||
};
|
||||
|
|
@ -33,6 +33,7 @@ properties:
|
|||
- mediatek,mt6779-uart
|
||||
- mediatek,mt6795-uart
|
||||
- mediatek,mt6797-uart
|
||||
- mediatek,mt6893-uart
|
||||
- mediatek,mt7622-uart
|
||||
- mediatek,mt7623-uart
|
||||
- mediatek,mt7629-uart
|
||||
|
|
|
|||
|
|
@ -1,29 +0,0 @@
|
|||
* Microchip Universal Asynchronous Receiver Transmitter (UART)
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "microchip,pic32mzda-uart"
|
||||
- reg: Should contain registers location and length
|
||||
- interrupts: Should contain interrupt
|
||||
- clocks: Phandle to the clock.
|
||||
See: Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
- pinctrl-names: A pinctrl state names "default" must be defined.
|
||||
- pinctrl-0: Phandle referencing pin configuration of the UART peripheral.
|
||||
See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
|
||||
|
||||
Optional properties:
|
||||
- cts-gpios: CTS pin for UART
|
||||
|
||||
Example:
|
||||
uart1: serial@1f822000 {
|
||||
compatible = "microchip,pic32mzda-uart";
|
||||
reg = <0x1f822000 0x50>;
|
||||
interrupts = <112 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rootclk PB2CLK>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1
|
||||
&pinctrl_uart1_cts
|
||||
&pinctrl_uart1_rts>;
|
||||
cts-gpios = <&gpio1 15 0>;
|
||||
};
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/microchip,pic32mzda-uart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip PIC32 UART
|
||||
|
||||
maintainers:
|
||||
- Andrei Pistirica <andrei.pistirica@microchip.com>
|
||||
- Purna Chandra Mandal <purna.mandal@microchip.com>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: microchip,pic32mzda-uart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: Fault
|
||||
- description: RX
|
||||
- description: TX
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/microchip,pic32-clock.h>
|
||||
|
||||
serial@1f822000 {
|
||||
compatible = "microchip,pic32mzda-uart";
|
||||
reg = <0x1f822000 0x50>;
|
||||
interrupts = <112 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<113 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<114 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rootclk PB2CLK>;
|
||||
cts-gpios = <&gpio1 15 0>;
|
||||
};
|
||||
|
|
@ -1,21 +0,0 @@
|
|||
Socionext Milbeaut UART controller
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "socionext,milbeaut-usio-uart".
|
||||
- reg: offset and length of the register set for the device.
|
||||
- interrupts: two interrupts specifier.
|
||||
- interrupt-names: should be "rx", "tx".
|
||||
- clocks: phandle to the input clock.
|
||||
|
||||
Optional properties:
|
||||
- auto-flow-control: flow control enable.
|
||||
|
||||
Example:
|
||||
usio1: usio_uart@1e700010 {
|
||||
compatible = "socionext,milbeaut-usio-uart";
|
||||
reg = <0x1e700010 0x10>;
|
||||
interrupts = <0 141 0x4>, <0 149 0x4>;
|
||||
interrupt-names = "rx", "tx";
|
||||
clocks = <&clk 2>;
|
||||
auto-flow-control;
|
||||
};
|
||||
|
|
@ -1,56 +0,0 @@
|
|||
* Marvell UART : Non standard UART used in some of Marvell EBU SoCs
|
||||
e.g., Armada-3700.
|
||||
|
||||
Required properties:
|
||||
- compatible:
|
||||
- "marvell,armada-3700-uart" for the standard variant of the UART
|
||||
(32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
|
||||
FIFO), called also UART1.
|
||||
- "marvell,armada-3700-uart-ext" for the extended variant of the
|
||||
UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
|
||||
accesses to the FIFO), called also UART2.
|
||||
- reg: offset and length of the register set for the device.
|
||||
- clocks: UART reference clock used to derive the baudrate. If no clock
|
||||
is provided (possible only with the "marvell,armada-3700-uart"
|
||||
compatible string for backward compatibility), it will only work
|
||||
if the baudrate was initialized by the bootloader and no baudrate
|
||||
change will then be possible. When provided it should be UART1-clk
|
||||
for standard variant of UART and UART2-clk for extended variant
|
||||
of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock
|
||||
should not be used and are supported only for backward compatibility.
|
||||
- interrupts:
|
||||
- Must contain three elements for the standard variant of the IP
|
||||
(marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
|
||||
respectively the UART sum interrupt, the UART TX interrupt and
|
||||
UART RX interrupt. A corresponding interrupt-names property must
|
||||
be defined.
|
||||
- Must contain two elements for the extended variant of the IP
|
||||
(marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
|
||||
respectively the UART TX interrupt and the UART RX interrupt. A
|
||||
corresponding interrupt-names property must be defined.
|
||||
- For backward compatibility reasons, a single element interrupts
|
||||
property is also supported for the standard variant of the IP,
|
||||
containing only the UART sum interrupt. This form is deprecated
|
||||
and should no longer be used.
|
||||
|
||||
Example:
|
||||
uart0: serial@12000 {
|
||||
compatible = "marvell,armada-3700-uart";
|
||||
reg = <0x12000 0x18>;
|
||||
clocks = <&uartclk 0>;
|
||||
interrupts =
|
||||
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "uart-sum", "uart-tx", "uart-rx";
|
||||
};
|
||||
|
||||
uart1: serial@12200 {
|
||||
compatible = "marvell,armada-3700-uart-ext";
|
||||
reg = <0x12200 0x30>;
|
||||
clocks = <&uartclk 1>;
|
||||
interrupts =
|
||||
<GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "uart-tx", "uart-rx";
|
||||
};
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/nxp,lpc3220-hsuart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP LPC32xx SoC High Speed UART
|
||||
|
||||
maintainers:
|
||||
- Vladimir Zapolskiy <vz@mleia.com>
|
||||
- Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nxp,lpc3220-hsuart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
serial@40014000 {
|
||||
compatible = "nxp,lpc3220-hsuart";
|
||||
reg = <0x40014000 0x1000>;
|
||||
interrupts = <26 0>;
|
||||
};
|
||||
|
|
@ -1,14 +0,0 @@
|
|||
* NXP LPC32xx SoC High Speed UART
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "nxp,lpc3220-hsuart"
|
||||
- reg: Should contain registers location and length
|
||||
- interrupts: Should contain interrupt
|
||||
|
||||
Example:
|
||||
|
||||
uart1: serial@40014000 {
|
||||
compatible = "nxp,lpc3220-hsuart";
|
||||
reg = <0x40014000 0x1000>;
|
||||
interrupts = <26 0>;
|
||||
};
|
||||
78
Documentation/devicetree/bindings/serial/renesas,rsci.yaml
Normal file
78
Documentation/devicetree/bindings/serial/renesas,rsci.yaml
Normal file
|
|
@ -0,0 +1,78 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/renesas,rsci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas RSCI Serial Communication Interface
|
||||
|
||||
maintainers:
|
||||
- Geert Uytterhoeven <geert+renesas@glider.be>
|
||||
- Thierry Bultel <thierry.bultel.yh@bp.renesas.com>
|
||||
|
||||
allOf:
|
||||
- $ref: serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: renesas,r9a09g077-rsci # RZ/T2H
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: Error interrupt
|
||||
- description: Receive buffer full interrupt
|
||||
- description: Transmit buffer empty interrupt
|
||||
- description: Transmit end interrupt
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: eri
|
||||
- const: rxi
|
||||
- const: txi
|
||||
- const: tei
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
const: fck # UART functional clock
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
uart-has-rtscts: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- power-domains
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/renesas-cpg-mssr.h>
|
||||
|
||||
aliases {
|
||||
serial0 = &sci0;
|
||||
};
|
||||
|
||||
sci0: serial@80005000 {
|
||||
compatible = "renesas,r9a09g077-rsci";
|
||||
reg = <0x80005000 0x400>;
|
||||
interrupts = <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 591 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 592 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "eri", "rxi", "txi", "tei";
|
||||
clocks = <&cpg CPG_MOD 108>;
|
||||
clock-names = "fck";
|
||||
power-domains = <&cpg>;
|
||||
};
|
||||
51
Documentation/devicetree/bindings/serial/snps,arc-uart.yaml
Normal file
51
Documentation/devicetree/bindings/serial/snps,arc-uart.yaml
Normal file
|
|
@ -0,0 +1,51 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/snps,arc-uart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Synopsys ARC UART
|
||||
|
||||
maintainers:
|
||||
- Vineet Gupta <vgupta@kernel.org>
|
||||
|
||||
description:
|
||||
Synopsys ARC UART is a non-standard UART used in some of the ARC FPGA boards.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: snps,arc-uart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clock-frequency:
|
||||
description: the input clock frequency for the UART
|
||||
|
||||
current-speed:
|
||||
description: baud rate for UART
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clock-frequency
|
||||
- current-speed
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
serial@c0fc1000 {
|
||||
compatible = "snps,arc-uart";
|
||||
reg = <0xc0fc1000 0x100>;
|
||||
interrupts = <5>;
|
||||
clock-frequency = <80000000>;
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
|
@ -17,7 +17,7 @@ allOf:
|
|||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: renesas,r9a06g032-uart
|
||||
- {}
|
||||
- const: renesas,rzn1-uart
|
||||
- const: snps,dw-apb-uart
|
||||
then:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,56 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/serial/socionext,milbeaut-usio-uart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Socionext Milbeaut UART controller
|
||||
|
||||
maintainers:
|
||||
- Sugaya Taichi <sugaya.taichi@socionext.com>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/serial/serial.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: socionext,milbeaut-usio-uart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: RX interrupt specifier
|
||||
- description: TX interrupt specifier
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: rx
|
||||
- const: tx
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
auto-flow-control:
|
||||
description: Enable automatic flow control.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
serial@1e700010 {
|
||||
compatible = "socionext,milbeaut-usio-uart";
|
||||
reg = <0x1e700010 0x10>;
|
||||
interrupts = <0 141 0x4>, <0 149 0x4>;
|
||||
interrupt-names = "rx", "tx";
|
||||
clocks = <&clk 2>;
|
||||
auto-flow-control;
|
||||
};
|
||||
|
|
@ -193,4 +193,19 @@ examples:
|
|||
sound-dai = <&vamacro 0>;
|
||||
};
|
||||
};
|
||||
|
||||
usb-dai-link {
|
||||
link-name = "USB Playback";
|
||||
cpu {
|
||||
sound-dai = <&q6afedai USB_RX>;
|
||||
};
|
||||
|
||||
codec {
|
||||
sound-dai = <&usbdai USB_RX>;
|
||||
};
|
||||
|
||||
platform {
|
||||
sound-dai = <&q6routing>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -14,7 +14,12 @@ allOf:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
const: sophgo,sg2044-spifmc-nor
|
||||
oneOf:
|
||||
- const: sophgo,sg2044-spifmc-nor
|
||||
- items:
|
||||
- enum:
|
||||
- sophgo,sg2042-spifmc-nor
|
||||
- const: sophgo,sg2044-spifmc-nor
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
49
Documentation/devicetree/bindings/spmi/apple,spmi.yaml
Normal file
49
Documentation/devicetree/bindings/spmi/apple,spmi.yaml
Normal file
|
|
@ -0,0 +1,49 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/spmi/apple,spmi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Apple SPMI controller
|
||||
|
||||
maintainers:
|
||||
- Sasha Finkelstein <fnkl.kernel@gmail.com>
|
||||
|
||||
description: A SPMI controller present on most Apple SoCs
|
||||
|
||||
allOf:
|
||||
- $ref: spmi.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-spmi
|
||||
- apple,t6000-spmi
|
||||
- apple,t8112-spmi
|
||||
- const: apple,spmi
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/spmi/spmi.h>
|
||||
|
||||
spmi@920a1300 {
|
||||
compatible = "apple,t6000-spmi", "apple,spmi";
|
||||
reg = <0x920a1300 0x100>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pmic@f {
|
||||
reg = <0xf SPMI_USID>;
|
||||
/* PMIC-specific properties */
|
||||
};
|
||||
};
|
||||
|
|
@ -85,6 +85,8 @@ properties:
|
|||
- devantech,srf08
|
||||
# Devantech SRF10 ultrasonic ranger
|
||||
- devantech,srf10
|
||||
# DFRobot SEN0322 oxygen sensor
|
||||
- dfrobot,sen0322
|
||||
# DH electronics GmbH on-board CPLD trivial SPI device
|
||||
- dh,dhcom-board
|
||||
# DA9053: flexible system level PMIC with multicore support
|
||||
|
|
|
|||
|
|
@ -42,6 +42,9 @@ properties:
|
|||
|
||||
phy_type: true
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
itc-setting:
|
||||
description:
|
||||
interrupt threshold control register control, the setting should be
|
||||
|
|
|
|||
|
|
@ -41,6 +41,7 @@ properties:
|
|||
- fsl,imx8mm-usb
|
||||
- fsl,imx8mn-usb
|
||||
- fsl,imx93-usb
|
||||
- fsl,imx95-usb
|
||||
- const: fsl,imx7d-usb
|
||||
- const: fsl,imx27-usb
|
||||
- items:
|
||||
|
|
@ -54,7 +55,11 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
minItems: 1
|
||||
items:
|
||||
- description: USB controller interrupt or combine USB controller
|
||||
and wakeup interrupts.
|
||||
- description: Wakeup interrupt
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
|
|
@ -191,6 +196,7 @@ allOf:
|
|||
contains:
|
||||
enum:
|
||||
- fsl,imx93-usb
|
||||
- fsl,imx95-usb
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
|
|
@ -238,6 +244,22 @@ allOf:
|
|||
maxItems: 1
|
||||
clock-names: false
|
||||
|
||||
# imx95 soc use two interrupts
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx95-usb
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 2
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@ properties:
|
|||
- fsl,imx8mm-usbmisc
|
||||
- fsl,imx8mn-usbmisc
|
||||
- fsl,imx8ulp-usbmisc
|
||||
- fsl,imx95-usbmisc
|
||||
- const: fsl,imx7d-usbmisc
|
||||
- const: fsl,imx6q-usbmisc
|
||||
- items:
|
||||
|
|
@ -45,7 +46,10 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Base and length of the Wrapper module register
|
||||
- description: Base and length of the HSIO Block Control register
|
||||
|
||||
'#index-cells':
|
||||
const: 1
|
||||
|
|
@ -56,6 +60,23 @@ required:
|
|||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
# imx95 soc needs use HSIO Block Control
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- fsl,imx95-usbmisc
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 2
|
||||
else:
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -86,6 +86,7 @@ properties:
|
|||
- nuvoton,npcm845-ehci
|
||||
- ti,ehci-omap
|
||||
- usb-ehci
|
||||
- via,vt8500-ehci
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
|
|
|
|||
108
Documentation/devicetree/bindings/usb/parade,ps5511.yaml
Normal file
108
Documentation/devicetree/bindings/usb/parade,ps5511.yaml
Normal file
|
|
@ -0,0 +1,108 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/parade,ps5511.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Parade PS5511 4+1 Port USB 3.2 Gen 1 Hub Controller
|
||||
|
||||
maintainers:
|
||||
- Pin-yen Lin <treapking@chromium.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- usb1da0,5511
|
||||
- usb1da0,55a1
|
||||
|
||||
reset-gpios:
|
||||
items:
|
||||
- description: GPIO specifier for RESETB pin.
|
||||
|
||||
vddd11-supply:
|
||||
description:
|
||||
1V1 power supply to the hub
|
||||
|
||||
vdd33-supply:
|
||||
description:
|
||||
3V3 power supply to the hub
|
||||
|
||||
peer-hub: true
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
patternProperties:
|
||||
'^port@':
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
properties:
|
||||
reg:
|
||||
minimum: 1
|
||||
maximum: 5
|
||||
|
||||
additionalProperties:
|
||||
properties:
|
||||
reg:
|
||||
minimum: 1
|
||||
maximum: 5
|
||||
|
||||
required:
|
||||
- peer-hub
|
||||
|
||||
allOf:
|
||||
- $ref: usb-hub.yaml#
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- usb1da0,55a1
|
||||
then:
|
||||
properties:
|
||||
ports:
|
||||
properties:
|
||||
port@5: false
|
||||
|
||||
patternProperties:
|
||||
'^.*@5$': false
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* 2.0 hub on port 1 */
|
||||
hub_2_0: hub@1 {
|
||||
compatible = "usb1da0,55a1";
|
||||
reg = <1>;
|
||||
peer-hub = <&hub_3_0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
/* USB 2.0 device on port 5 */
|
||||
device@5 {
|
||||
reg = <5>;
|
||||
compatible = "usb123,4567";
|
||||
};
|
||||
};
|
||||
|
||||
/* 3.0 hub on port 2 */
|
||||
hub_3_0: hub@2 {
|
||||
compatible = "usb1da0,5511";
|
||||
reg = <2>;
|
||||
peer-hub = <&hub_2_0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
/* Type-A connector on port 3 */
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
endpoint {
|
||||
remote-endpoint = <&usb_a0_ss>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -11,8 +11,11 @@ maintainers:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- parade,ps8830
|
||||
oneOf:
|
||||
- items:
|
||||
- const: parade,ps8833
|
||||
- const: parade,ps8830
|
||||
- const: parade,ps8830
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -4,11 +4,22 @@
|
|||
$id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm SuperSpeed DWC3 USB SoC controller
|
||||
title: Legacy Qualcomm SuperSpeed DWC3 USB SoC controller
|
||||
|
||||
maintainers:
|
||||
- Wesley Cheng <quic_wcheng@quicinc.com>
|
||||
|
||||
# Use the combined qcom,snps-dwc3 instead
|
||||
deprecated: true
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: qcom,dwc3
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
|
|
@ -55,6 +66,7 @@ properties:
|
|||
- qcom,sm8450-dwc3
|
||||
- qcom,sm8550-dwc3
|
||||
- qcom,sm8650-dwc3
|
||||
- qcom,sm8750-dwc3
|
||||
- qcom,x1e80100-dwc3
|
||||
- qcom,x1e80100-dwc3-mp
|
||||
- const: qcom,dwc3
|
||||
|
|
@ -354,6 +366,7 @@ allOf:
|
|||
- qcom,sm8450-dwc3
|
||||
- qcom,sm8550-dwc3
|
||||
- qcom,sm8650-dwc3
|
||||
- qcom,sm8750-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
|
|
@ -497,6 +510,7 @@ allOf:
|
|||
- qcom,sm8450-dwc3
|
||||
- qcom,sm8550-dwc3
|
||||
- qcom,sm8650-dwc3
|
||||
- qcom,sm8750-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
|
|
|
|||
622
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml
Normal file
622
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml
Normal file
|
|
@ -0,0 +1,622 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm SuperSpeed DWC3 USB SoC controller
|
||||
|
||||
maintainers:
|
||||
- Wesley Cheng <quic_wcheng@quicinc.com>
|
||||
|
||||
description:
|
||||
Describes the Qualcomm USB block, based on Synopsys DWC3.
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: qcom,snps-dwc3
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,ipq4019-dwc3
|
||||
- qcom,ipq5018-dwc3
|
||||
- qcom,ipq5332-dwc3
|
||||
- qcom,ipq5424-dwc3
|
||||
- qcom,ipq6018-dwc3
|
||||
- qcom,ipq8064-dwc3
|
||||
- qcom,ipq8074-dwc3
|
||||
- qcom,ipq9574-dwc3
|
||||
- qcom,msm8953-dwc3
|
||||
- qcom,msm8994-dwc3
|
||||
- qcom,msm8996-dwc3
|
||||
- qcom,msm8998-dwc3
|
||||
- qcom,qcm2290-dwc3
|
||||
- qcom,qcs404-dwc3
|
||||
- qcom,qcs615-dwc3
|
||||
- qcom,qcs8300-dwc3
|
||||
- qcom,qdu1000-dwc3
|
||||
- qcom,sa8775p-dwc3
|
||||
- qcom,sar2130p-dwc3
|
||||
- qcom,sc7180-dwc3
|
||||
- qcom,sc7280-dwc3
|
||||
- qcom,sc8180x-dwc3
|
||||
- qcom,sc8180x-dwc3-mp
|
||||
- qcom,sc8280xp-dwc3
|
||||
- qcom,sc8280xp-dwc3-mp
|
||||
- qcom,sdm660-dwc3
|
||||
- qcom,sdm670-dwc3
|
||||
- qcom,sdm845-dwc3
|
||||
- qcom,sdx55-dwc3
|
||||
- qcom,sdx65-dwc3
|
||||
- qcom,sdx75-dwc3
|
||||
- qcom,sm4250-dwc3
|
||||
- qcom,sm6115-dwc3
|
||||
- qcom,sm6125-dwc3
|
||||
- qcom,sm6350-dwc3
|
||||
- qcom,sm6375-dwc3
|
||||
- qcom,sm8150-dwc3
|
||||
- qcom,sm8250-dwc3
|
||||
- qcom,sm8350-dwc3
|
||||
- qcom,sm8450-dwc3
|
||||
- qcom,sm8550-dwc3
|
||||
- qcom,sm8650-dwc3
|
||||
- qcom,x1e80100-dwc3
|
||||
- const: qcom,snps-dwc3
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required-opps:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description: |
|
||||
Several clocks are used, depending on the variant. Typical ones are::
|
||||
- cfg_noc:: System Config NOC clock.
|
||||
- core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
|
||||
60MHz for HS operation.
|
||||
- iface:: System bus AXI clock.
|
||||
- sleep:: Sleep clock, used for wakeup when USB3 core goes into low
|
||||
power mode (U3).
|
||||
- mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
|
||||
mode. Its frequency should be 19.2MHz.
|
||||
minItems: 1
|
||||
maxItems: 9
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 9
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
interconnects:
|
||||
maxItems: 2
|
||||
|
||||
interconnect-names:
|
||||
items:
|
||||
- const: usb-ddr
|
||||
- const: apps-usb
|
||||
|
||||
interrupts:
|
||||
description: |
|
||||
Different types of interrupts are used based on HS PHY used on target:
|
||||
- dwc_usb3: Core DWC3 interrupt
|
||||
- pwr_event: Used for wakeup based on other power events.
|
||||
- hs_phy_irq: Apart from DP/DM/QUSB2 PHY interrupts, there is
|
||||
hs_phy_irq which is not triggered by default and its
|
||||
functionality is mutually exclusive to that of
|
||||
{dp/dm}_hs_phy_irq and qusb2_phy_irq.
|
||||
- qusb2_phy: SoCs with QUSB2 PHY do not have separate DP/DM IRQs and
|
||||
expose only a single IRQ whose behavior can be modified
|
||||
by the QUSB2PHY_INTR_CTRL register. The required DPSE/
|
||||
DMSE configuration is done in QUSB2PHY_INTR_CTRL register
|
||||
of PHY address space.
|
||||
- {dp/dm}_hs_phy_irq: These IRQ's directly reflect changes on the DP/
|
||||
DM pads of the SoC. These are used for wakeup
|
||||
only on SoCs with non-QUSB2 targets with
|
||||
exception of SDM670/SDM845/SM6350.
|
||||
- ss_phy_irq: Used for remote wakeup in Super Speed mode of operation.
|
||||
minItems: 3
|
||||
maxItems: 19
|
||||
|
||||
interrupt-names:
|
||||
minItems: 3
|
||||
maxItems: 19
|
||||
|
||||
qcom,select-utmi-as-pipe-clk:
|
||||
description:
|
||||
If present, disable USB3 pipe_clk requirement.
|
||||
Used when dwc3 operates without SSPHY and only
|
||||
HS/FS/LS modes are supported.
|
||||
type: boolean
|
||||
|
||||
wakeup-source: true
|
||||
|
||||
# Required child node:
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
allOf:
|
||||
- $ref: snps,dwc3-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq4019-dwc3
|
||||
- qcom,ipq5332-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq8064-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Master/Core clock, has to be >= 125 MHz
|
||||
for SS operation and >= 60MHz for HS operation.
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq9574-dwc3
|
||||
- qcom,msm8953-dwc3
|
||||
- qcom,msm8996-dwc3
|
||||
- qcom,msm8998-dwc3
|
||||
- qcom,qcs8300-dwc3
|
||||
- qcom,sa8775p-dwc3
|
||||
- qcom,sc7180-dwc3
|
||||
- qcom,sc7280-dwc3
|
||||
- qcom,sdm670-dwc3
|
||||
- qcom,sdm845-dwc3
|
||||
- qcom,sdx55-dwc3
|
||||
- qcom,sdx65-dwc3
|
||||
- qcom,sdx75-dwc3
|
||||
- qcom,sm6350-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 5
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq6018-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: core
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq8074-dwc3
|
||||
- qcom,qdu1000-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq5018-dwc3
|
||||
- qcom,msm8994-dwc3
|
||||
- qcom,qcs404-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8280xp-dwc3
|
||||
- qcom,sc8280xp-dwc3-mp
|
||||
- qcom,x1e80100-dwc3
|
||||
- qcom,x1e80100-dwc3-mp
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 9
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- const: noc_aggr
|
||||
- const: noc_aggr_north
|
||||
- const: noc_aggr_south
|
||||
- const: noc_sys
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 4
|
||||
maxItems: 5
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,qcm2290-dwc3
|
||||
- qcom,qcs615-dwc3
|
||||
- qcom,sar2130p-dwc3
|
||||
- qcom,sc8180x-dwc3
|
||||
- qcom,sc8180x-dwc3-mp
|
||||
- qcom,sm6115-dwc3
|
||||
- qcom,sm6125-dwc3
|
||||
- qcom,sm8150-dwc3
|
||||
- qcom,sm8250-dwc3
|
||||
- qcom,sm8450-dwc3
|
||||
- qcom,sm8550-dwc3
|
||||
- qcom,sm8650-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 6
|
||||
clock-names:
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- const: xo
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8350-dwc3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 5
|
||||
maxItems: 6
|
||||
clock-names:
|
||||
minItems: 5
|
||||
items:
|
||||
- const: cfg_noc
|
||||
- const: core
|
||||
- const: iface
|
||||
- const: sleep
|
||||
- const: mock_utmi
|
||||
- const: xo
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq5018-dwc3
|
||||
- qcom,ipq6018-dwc3
|
||||
- qcom,ipq8074-dwc3
|
||||
- qcom,msm8953-dwc3
|
||||
- qcom,msm8998-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 3
|
||||
maxItems: 4
|
||||
interrupt-names:
|
||||
minItems: 3
|
||||
items:
|
||||
- const: dwc_usb3
|
||||
- const: pwr_event
|
||||
- const: qusb2_phy
|
||||
- const: ss_phy_irq
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8996-dwc3
|
||||
- qcom,qcs404-dwc3
|
||||
- qcom,sdm660-dwc3
|
||||
- qcom,sm6115-dwc3
|
||||
- qcom,sm6125-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 4
|
||||
maxItems: 5
|
||||
interrupt-names:
|
||||
minItems: 4
|
||||
items:
|
||||
- const: dwc_usb3
|
||||
- const: pwr_event
|
||||
- const: qusb2_phy
|
||||
- const: hs_phy_irq
|
||||
- const: ss_phy_irq
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq5332-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 4
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: dwc_usb3
|
||||
- const: pwr_event
|
||||
- const: dp_hs_phy_irq
|
||||
- const: dm_hs_phy_irq
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,x1e80100-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 5
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: dwc_usb3
|
||||
- const: pwr_event
|
||||
- const: dp_hs_phy_irq
|
||||
- const: dm_hs_phy_irq
|
||||
- const: ss_phy_irq
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,ipq4019-dwc3
|
||||
- qcom,ipq8064-dwc3
|
||||
- qcom,msm8994-dwc3
|
||||
- qcom,qcs615-dwc3
|
||||
- qcom,qcs8300-dwc3
|
||||
- qcom,qdu1000-dwc3
|
||||
- qcom,sa8775p-dwc3
|
||||
- qcom,sc7180-dwc3
|
||||
- qcom,sc7280-dwc3
|
||||
- qcom,sc8180x-dwc3
|
||||
- qcom,sc8280xp-dwc3
|
||||
- qcom,sdm670-dwc3
|
||||
- qcom,sdm845-dwc3
|
||||
- qcom,sdx55-dwc3
|
||||
- qcom,sdx65-dwc3
|
||||
- qcom,sdx75-dwc3
|
||||
- qcom,sm4250-dwc3
|
||||
- qcom,sm6350-dwc3
|
||||
- qcom,sm8150-dwc3
|
||||
- qcom,sm8250-dwc3
|
||||
- qcom,sm8350-dwc3
|
||||
- qcom,sm8450-dwc3
|
||||
- qcom,sm8550-dwc3
|
||||
- qcom,sm8650-dwc3
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 5
|
||||
maxItems: 6
|
||||
interrupt-names:
|
||||
minItems: 5
|
||||
items:
|
||||
- const: dwc_usb3
|
||||
- const: pwr_event
|
||||
- const: hs_phy_irq
|
||||
- const: dp_hs_phy_irq
|
||||
- const: dm_hs_phy_irq
|
||||
- const: ss_phy_irq
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8180x-dwc3-mp
|
||||
- qcom,x1e80100-dwc3-mp
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 11
|
||||
maxItems: 11
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: dwc_usb3
|
||||
- const: pwr_event_1
|
||||
- const: pwr_event_2
|
||||
- const: hs_phy_1
|
||||
- const: hs_phy_2
|
||||
- const: dp_hs_phy_1
|
||||
- const: dm_hs_phy_1
|
||||
- const: dp_hs_phy_2
|
||||
- const: dm_hs_phy_2
|
||||
- const: ss_phy_1
|
||||
- const: ss_phy_2
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8280xp-dwc3-mp
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 19
|
||||
maxItems: 19
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: dwc_usb3
|
||||
- const: pwr_event_1
|
||||
- const: pwr_event_2
|
||||
- const: pwr_event_3
|
||||
- const: pwr_event_4
|
||||
- const: hs_phy_1
|
||||
- const: hs_phy_2
|
||||
- const: hs_phy_3
|
||||
- const: hs_phy_4
|
||||
- const: dp_hs_phy_1
|
||||
- const: dm_hs_phy_1
|
||||
- const: dp_hs_phy_2
|
||||
- const: dm_hs_phy_2
|
||||
- const: dp_hs_phy_3
|
||||
- const: dm_hs_phy_3
|
||||
- const: dp_hs_phy_4
|
||||
- const: dm_hs_phy_4
|
||||
- const: ss_phy_1
|
||||
- const: ss_phy_2
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,gcc-sdm845.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usb@a600000 {
|
||||
compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3";
|
||||
reg = <0 0x0a600000 0 0x100000>;
|
||||
|
||||
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
|
||||
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
|
||||
clock-names = "cfg_noc",
|
||||
"core",
|
||||
"iface",
|
||||
"sleep",
|
||||
"mock_utmi";
|
||||
|
||||
assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
|
||||
assigned-clock-rates = <19200000>, <150000000>;
|
||||
|
||||
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>,
|
||||
<GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
|
||||
<GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "dwc_usb3", "pwr_event", "hs_phy_irq",
|
||||
"dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq";
|
||||
|
||||
power-domains = <&gcc USB30_PRIM_GDSC>;
|
||||
|
||||
resets = <&gcc GCC_USB30_PRIM_BCR>;
|
||||
|
||||
iommus = <&apps_smmu 0x740 0>;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_enblslpm_quirk;
|
||||
phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -10,7 +10,7 @@ maintainers:
|
|||
- Matthias Kaehlcke <mka@chromium.org>
|
||||
|
||||
allOf:
|
||||
- $ref: usb-device.yaml#
|
||||
- $ref: usb-hub.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -19,61 +19,35 @@ properties:
|
|||
- usbbda,5411
|
||||
- usbbda,411
|
||||
|
||||
reg: true
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
vdd-supply:
|
||||
description:
|
||||
phandle to the regulator that provides power to the hub.
|
||||
|
||||
peer-hub:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
phandle to the peer hub on the controller.
|
||||
peer-hub: true
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port@1:
|
||||
patternProperties:
|
||||
'^port@':
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
1st downstream facing USB port
|
||||
|
||||
port@2:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
2nd downstream facing USB port
|
||||
properties:
|
||||
reg:
|
||||
minimum: 1
|
||||
maximum: 4
|
||||
|
||||
port@3:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
3rd downstream facing USB port
|
||||
|
||||
port@4:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
4th downstream facing USB port
|
||||
|
||||
patternProperties:
|
||||
'^.*@[1-4]$':
|
||||
description: The hard wired USB devices
|
||||
type: object
|
||||
$ref: /schemas/usb/usb-device.yaml
|
||||
additionalProperties: true
|
||||
additionalProperties:
|
||||
properties:
|
||||
reg:
|
||||
minimum: 1
|
||||
maximum: 4
|
||||
|
||||
required:
|
||||
- peer-hub
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb {
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@ properties:
|
|||
- renesas,usbhs-r9a07g044 # RZ/G2{L,LC}
|
||||
- renesas,usbhs-r9a07g054 # RZ/V2L
|
||||
- renesas,usbhs-r9a08g045 # RZ/G3S
|
||||
- renesas,usbhs-r9a09g057 # RZ/V2H(P)
|
||||
- const: renesas,rzg2l-usbhs
|
||||
|
||||
- items:
|
||||
|
|
@ -127,11 +128,7 @@ allOf:
|
|||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,usbhs-r9a07g043
|
||||
- renesas,usbhs-r9a07g044
|
||||
- renesas,usbhs-r9a07g054
|
||||
- renesas,usbhs-r9a08g045
|
||||
const: renesas,rzg2l-usbhs
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
|
|
|
|||
|
|
@ -14,11 +14,13 @@ properties:
|
|||
oneOf:
|
||||
- enum:
|
||||
- google,gs101-dwusb3
|
||||
- samsung,exynos2200-dwusb3
|
||||
- samsung,exynos5250-dwusb3
|
||||
- samsung,exynos5433-dwusb3
|
||||
- samsung,exynos7-dwusb3
|
||||
- samsung,exynos7870-dwusb3
|
||||
- samsung,exynos850-dwusb3
|
||||
- samsung,exynosautov920-dwusb3
|
||||
- items:
|
||||
- const: samsung,exynos990-dwusb3
|
||||
- const: samsung,exynos850-dwusb3
|
||||
|
|
@ -79,6 +81,19 @@ allOf:
|
|||
required:
|
||||
- vdd10-supply
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: samsung,exynos2200-dwusb3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
clock-names:
|
||||
items:
|
||||
- const: link_aclk
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -165,6 +180,21 @@ allOf:
|
|||
required:
|
||||
- vdd10-supply
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: samsung,exynosautov920-dwusb3
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
- const: susp_clk
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -106,54 +106,54 @@ additionalProperties: false
|
|||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usb-hub@8 {
|
||||
compatible = "smsc,usb3503";
|
||||
reg = <0x08>;
|
||||
connect-gpios = <&gpx3 0 1>;
|
||||
disabled-ports = <2 3>;
|
||||
intn-gpios = <&gpx3 4 1>;
|
||||
reset-gpios = <&gpx3 5 1>;
|
||||
initial-mode = <1>;
|
||||
clocks = <&clks 80>;
|
||||
clock-names = "refclk";
|
||||
};
|
||||
};
|
||||
usb-hub@8 {
|
||||
compatible = "smsc,usb3503";
|
||||
reg = <0x08>;
|
||||
connect-gpios = <&gpx3 0 1>;
|
||||
disabled-ports = <2 3>;
|
||||
intn-gpios = <&gpx3 4 1>;
|
||||
reset-gpios = <&gpx3 5 1>;
|
||||
initial-mode = <1>;
|
||||
clocks = <&clks 80>;
|
||||
clock-names = "refclk";
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usb-hub@8 {
|
||||
compatible = "smsc,usb3803";
|
||||
reg = <0x08>;
|
||||
connect-gpios = <&gpx3 0 1>;
|
||||
disabled-ports = <2 3>;
|
||||
intn-gpios = <&gpx3 4 1>;
|
||||
reset-gpios = <&gpx3 5 1>;
|
||||
bypass-gpios = <&gpx3 6 1>;
|
||||
initial-mode = <3>;
|
||||
clocks = <&clks 80>;
|
||||
clock-names = "refclk";
|
||||
};
|
||||
};
|
||||
usb-hub@8 {
|
||||
compatible = "smsc,usb3803";
|
||||
reg = <0x08>;
|
||||
connect-gpios = <&gpx3 0 1>;
|
||||
disabled-ports = <2 3>;
|
||||
intn-gpios = <&gpx3 4 1>;
|
||||
reset-gpios = <&gpx3 5 1>;
|
||||
bypass-gpios = <&gpx3 6 1>;
|
||||
initial-mode = <3>;
|
||||
clocks = <&clks 80>;
|
||||
clock-names = "refclk";
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
usb-hub {
|
||||
/* I2C is not connected */
|
||||
compatible = "smsc,usb3503";
|
||||
initial-mode = <1>; /* initialize in HUB mode */
|
||||
disabled-ports = <1>;
|
||||
intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
|
||||
reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
|
||||
connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
|
||||
refclk-frequency = <19200000>;
|
||||
};
|
||||
usb-hub {
|
||||
/* I2C is not connected */
|
||||
compatible = "smsc,usb3503";
|
||||
initial-mode = <1>; /* initialize in HUB mode */
|
||||
disabled-ports = <1>;
|
||||
intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
|
||||
reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
|
||||
connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
|
||||
refclk-frequency = <19200000>;
|
||||
};
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -390,6 +390,12 @@ properties:
|
|||
maximum: 8
|
||||
default: 1
|
||||
|
||||
connector:
|
||||
$ref: /schemas/connector/usb-connector.yaml#
|
||||
description: Connector for dual role switch
|
||||
type: object
|
||||
unevaluatedProperties: false
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/usb/ti,usb8041.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI USB8041 USB 3.0 hub controller
|
||||
title: TI USB8041 and USB8044 USB 3.0 hub controllers
|
||||
|
||||
maintainers:
|
||||
- Alexander Stein <alexander.stein@ew.tq-group.com>
|
||||
|
|
@ -17,6 +17,8 @@ properties:
|
|||
enum:
|
||||
- usb451,8140
|
||||
- usb451,8142
|
||||
- usb451,8440
|
||||
- usb451,8442
|
||||
|
||||
reg: true
|
||||
|
||||
|
|
|
|||
|
|
@ -28,7 +28,8 @@ description: |
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
pattern: "^usb[0-9a-f]{1,4},[0-9a-f]{1,4}$"
|
||||
contains:
|
||||
pattern: "^usb[0-9a-f]{1,4},[0-9a-f]{1,4}$"
|
||||
description: Device nodes or combined nodes.
|
||||
"usbVID,PID", where VID is the vendor id and PID the product id.
|
||||
The textual representation of VID and PID shall be in lower case
|
||||
|
|
|
|||
84
Documentation/devicetree/bindings/usb/usb-hub.yaml
Normal file
84
Documentation/devicetree/bindings/usb/usb-hub.yaml
Normal file
|
|
@ -0,0 +1,84 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/usb/usb-hub.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Generic USB Hub
|
||||
|
||||
maintainers:
|
||||
- Pin-yen Lin <treapking@chromium.org>
|
||||
|
||||
allOf:
|
||||
- $ref: usb-device.yaml#
|
||||
|
||||
properties:
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
peer-hub:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
phandle to the peer hub on the controller.
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
description:
|
||||
The downstream facing USB ports
|
||||
|
||||
patternProperties:
|
||||
"^port@[1-9a-f][0-9a-f]*$":
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
patternProperties:
|
||||
'^.*@[1-9a-f][0-9a-f]*$':
|
||||
description: The hard wired USB devices
|
||||
type: object
|
||||
$ref: /schemas/usb/usb-device.yaml
|
||||
additionalProperties: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
- |
|
||||
usb {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* 2.0 hub on port 1 */
|
||||
hub_2_0: hub@1 {
|
||||
compatible = "usb123,4567";
|
||||
reg = <1>;
|
||||
peer-hub = <&hub_3_0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
/* USB 2.0 device on port 5 */
|
||||
device@5 {
|
||||
reg = <5>;
|
||||
compatible = "usb765,4321";
|
||||
};
|
||||
};
|
||||
|
||||
/* 3.0 hub on port 2 */
|
||||
hub_3_0: hub@2 {
|
||||
compatible = "usb123,abcd";
|
||||
reg = <2>;
|
||||
peer-hub = <&hub_2_0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
/* Type-A connector on port 3 */
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
endpoint {
|
||||
remote-endpoint = <&usb_a0_ss>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -26,11 +26,24 @@ properties:
|
|||
type: boolean
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
description:
|
||||
A port node to link the device to a TypeC controller for the purpose of
|
||||
handling altmode muxing and orientation switching.
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/graph.yaml#/$defs/endpoint-base
|
||||
unevaluatedProperties: false
|
||||
properties:
|
||||
data-lanes:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
uniqueItems: true
|
||||
items:
|
||||
maximum: 8
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -1406,6 +1406,8 @@ patternProperties:
|
|||
description: SKOV A/S
|
||||
"^skyworks,.*":
|
||||
description: Skyworks Solutions, Inc.
|
||||
"^smartfiber,.*":
|
||||
description: ShenZhen Smartfiber Technology Co, Ltd.
|
||||
"^smartlabs,.*":
|
||||
description: SmartLabs LLC
|
||||
"^smartrg,.*":
|
||||
|
|
@ -1703,6 +1705,8 @@ patternProperties:
|
|||
description: Wingtech Technology Co., Ltd.
|
||||
"^winlink,.*":
|
||||
description: WinLink Co., Ltd
|
||||
"^winsen,.*":
|
||||
description: Winsen Corp.
|
||||
"^winstar,.*":
|
||||
description: Winstar Display Corp.
|
||||
"^wirelesstag,.*":
|
||||
|
|
|
|||
|
|
@ -59,10 +59,10 @@ For example, a simple nvram case::
|
|||
devm_nvmem_register(&config);
|
||||
}
|
||||
|
||||
Users of board files can define and register nvmem cells using the
|
||||
nvmem_cell_table struct::
|
||||
Device drivers can define and register an nvmem cell using the nvmem_cell_info
|
||||
struct::
|
||||
|
||||
static struct nvmem_cell_info foo_nvmem_cells[] = {
|
||||
static const struct nvmem_cell_info foo_nvmem_cell = {
|
||||
{
|
||||
.name = "macaddr",
|
||||
.offset = 0x7f00,
|
||||
|
|
@ -70,13 +70,7 @@ nvmem_cell_table struct::
|
|||
}
|
||||
};
|
||||
|
||||
static struct nvmem_cell_table foo_nvmem_cell_table = {
|
||||
.nvmem_name = "i2c-eeprom",
|
||||
.cells = foo_nvmem_cells,
|
||||
.ncells = ARRAY_SIZE(foo_nvmem_cells),
|
||||
};
|
||||
|
||||
nvmem_add_cell_table(&foo_nvmem_cell_table);
|
||||
int nvmem_add_one_cell(nvmem, &foo_nvmem_cell);
|
||||
|
||||
Additionally it is possible to create nvmem cell lookup entries and register
|
||||
them with the nvmem framework from machine code as shown in the example below::
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Add a link
Reference in a new issue