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riscv: dts: thead: Add TH1520 ethernet nodes
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on
the BeagleV Ahead and Sipeed Lichee Pi 4a boards.
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
[drew: change apb registers from syscon to second reg of gmac node,
add phy reset delay properties for beaglev ahead]
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
This commit is contained in:
Emil Renner Berthing
Drew Fustini
parent
2a3bf75a94
commit
7e756671a6
3 changed files with 260 additions and 0 deletions
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@ -15,6 +15,7 @@
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compatible = "beagle,beaglev-ahead", "thead,th1520";
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aliases {
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ethernet0 = &gmac0;
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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@ -98,6 +99,25 @@
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status = "okay";
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};
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&gmac0 {
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_pins>;
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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status = "okay";
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};
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&mdio0 {
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phy0: ethernet-phy@1 {
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reg = <1>;
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interrupt-parent = <&gpio3>;
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interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
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reset-delay-us = <10000>;
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reset-post-delay-us = <50000>;
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};
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};
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&padctrl_aosys {
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led_pins: led-0 {
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led-pins {
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@ -116,6 +136,77 @@
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};
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&padctrl0_apsys {
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gmac0_pins: gmac0-0 {
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tx-pins {
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pins = "GMAC0_TX_CLK",
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"GMAC0_TXEN",
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"GMAC0_TXD0",
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"GMAC0_TXD1",
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"GMAC0_TXD2",
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"GMAC0_TXD3";
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function = "gmac0";
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bias-disable;
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drive-strength = <25>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = "GMAC0_RX_CLK",
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"GMAC0_RXDV",
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"GMAC0_RXD0",
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"GMAC0_RXD1",
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"GMAC0_RXD2",
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"GMAC0_RXD3";
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function = "gmac0";
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bias-disable;
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drive-strength = <1>;
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input-enable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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mdc-pins {
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pins = "GMAC0_MDC";
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function = "gmac0";
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bias-disable;
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drive-strength = <13>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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mdio-pins {
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pins = "GMAC0_MDIO";
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function = "gmac0";
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bias-disable;
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drive-strength = <13>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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phy-reset-pins {
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pins = "GMAC0_COL"; /* GPIO3_21 */
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bias-disable;
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drive-strength = <3>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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phy-interrupt-pins {
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pins = "GMAC0_CRS"; /* GPIO3_22 */
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function = "gpio";
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bias-pull-up;
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drive-strength = <1>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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uart0_pins: uart0-0 {
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tx-pins {
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pins = "UART0_TXD";
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@ -11,6 +11,11 @@
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model = "Sipeed Lichee Module 4A";
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compatible = "sipeed,lichee-module-4a", "thead,th1520";
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aliases {
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x00000000 0x2 0x00000000>;
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@ -45,6 +50,22 @@
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status = "okay";
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};
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&gmac0 {
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_pins>, <&mdio0_pins>;
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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status = "okay";
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};
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&gmac1 {
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1_pins>;
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phy-handle = <&phy1>;
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phy-mode = "rgmii-id";
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status = "okay";
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};
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&gpio0 {
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gpio-line-names = "", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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@ -78,6 +99,104 @@
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"GPIO10";
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};
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&mdio0 {
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phy0: ethernet-phy@1 {
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reg = <1>;
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};
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phy1: ethernet-phy@2 {
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reg = <2>;
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};
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};
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&padctrl0_apsys {
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gmac0_pins: gmac0-0 {
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tx-pins {
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pins = "GMAC0_TX_CLK",
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"GMAC0_TXEN",
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"GMAC0_TXD0",
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"GMAC0_TXD1",
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"GMAC0_TXD2",
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"GMAC0_TXD3";
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function = "gmac0";
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bias-disable;
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drive-strength = <25>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = "GMAC0_RX_CLK",
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"GMAC0_RXDV",
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"GMAC0_RXD0",
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"GMAC0_RXD1",
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"GMAC0_RXD2",
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"GMAC0_RXD3";
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function = "gmac0";
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bias-disable;
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drive-strength = <1>;
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input-enable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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};
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gmac1_pins: gmac1-0 {
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tx-pins {
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pins = "GPIO2_18", /* GMAC1_TX_CLK */
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"GPIO2_20", /* GMAC1_TXEN */
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"GPIO2_21", /* GMAC1_TXD0 */
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"GPIO2_22", /* GMAC1_TXD1 */
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"GPIO2_23", /* GMAC1_TXD2 */
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"GPIO2_24"; /* GMAC1_TXD3 */
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function = "gmac1";
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bias-disable;
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drive-strength = <25>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = "GPIO2_19", /* GMAC1_RX_CLK */
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"GPIO2_25", /* GMAC1_RXDV */
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"GPIO2_30", /* GMAC1_RXD0 */
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"GPIO2_31", /* GMAC1_RXD1 */
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"GPIO3_0", /* GMAC1_RXD2 */
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"GPIO3_1"; /* GMAC1_RXD3 */
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function = "gmac1";
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bias-disable;
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drive-strength = <1>;
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input-enable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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};
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mdio0_pins: mdio0-0 {
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mdc-pins {
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pins = "GMAC0_MDC";
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function = "gmac0";
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bias-disable;
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drive-strength = <13>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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mdio-pins {
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pins = "GMAC0_MDIO";
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function = "gmac0";
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bias-disable;
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drive-strength = <13>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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};
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&sdio0 {
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bus-width = <4>;
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max-frequency = <198000000>;
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@ -223,6 +223,12 @@
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#clock-cells = <0>;
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};
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stmmac_axi_config: stmmac-axi-config {
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snps,wr_osr_lmt = <15>;
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snps,rd_osr_lmt = <15>;
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snps,blen = <0 0 64 32 0 0 0>;
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};
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soc {
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compatible = "simple-bus";
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interrupt-parent = <&plic>;
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@ -274,6 +280,50 @@
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status = "disabled";
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};
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gmac1: ethernet@ffe7060000 {
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compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
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reg = <0xff 0xe7060000 0x0 0x2000>, <0xff 0xec004000 0x0 0x1000>;
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reg-names = "dwmac", "apb";
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interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC1>;
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clock-names = "stmmaceth", "pclk";
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snps,pbl = <32>;
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snps,fixed-burst;
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snps,multicast-filter-bins = <64>;
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snps,perfect-filter-entries = <32>;
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snps,axi-config = <&stmmac_axi_config>;
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status = "disabled";
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mdio1: mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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gmac0: ethernet@ffe7070000 {
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compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
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reg = <0xff 0xe7070000 0x0 0x2000>, <0xff 0xec003000 0x0 0x1000>;
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reg-names = "dwmac", "apb";
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interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC0>;
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clock-names = "stmmaceth", "pclk";
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snps,pbl = <32>;
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snps,fixed-burst;
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snps,multicast-filter-bins = <64>;
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snps,perfect-filter-entries = <32>;
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snps,axi-config = <&stmmac_axi_config>;
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status = "disabled";
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mdio0: mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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emmc: mmc@ffe7080000 {
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compatible = "thead,th1520-dwcmshc";
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reg = <0xff 0xe7080000 0x0 0x10000>;
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