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x86/cpufeatures: Rename X86_CMPXCHG64 to X86_CX8
Replace X86_CMPXCHG64 with X86_CX8, as CX8 is the name of the CPUID flag, thus to make it consistent with X86_FEATURE_CX8 defined in <asm/cpufeatures.h>. No functional change intended. Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com> Signed-off-by: Xin Li (Intel) <xin@zytor.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20250228082338.73859-2-xin@zytor.com
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10 changed files with 11 additions and 11 deletions
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@ -133,7 +133,7 @@ config X86
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select ARCH_SUPPORTS_AUTOFDO_CLANG
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select ARCH_SUPPORTS_PROPELLER_CLANG if X86_64
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select ARCH_USE_BUILTIN_BSWAP
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select ARCH_USE_CMPXCHG_LOCKREF if X86_CMPXCHG64
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select ARCH_USE_CMPXCHG_LOCKREF if X86_CX8
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select ARCH_USE_MEMTEST
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_USE_QUEUED_SPINLOCKS
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@ -299,7 +299,7 @@ config X86_HAVE_PAE
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def_bool y
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depends on MCRUSOE || MEFFICEON || MCYRIXIII || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC7 || MATOM || X86_64
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config X86_CMPXCHG64
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config X86_CX8
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def_bool y
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depends on X86_HAVE_PAE || M586TSC || M586MMX || MK6 || MK7 || MGEODEGX1 || MGEODE_LX
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@ -313,7 +313,7 @@ config X86_MINIMUM_CPU_FAMILY
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int
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default "64" if X86_64
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default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MK7)
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default "5" if X86_32 && X86_CMPXCHG64
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default "5" if X86_32 && X86_CX8
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default "4"
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config X86_DEBUGCTLMSR
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@ -16,7 +16,7 @@
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#include <asm/gsseg.h>
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#include <asm/nospec-branch.h>
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#ifndef CONFIG_X86_CMPXCHG64
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#ifndef CONFIG_X86_CX8
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extern void cmpxchg8b_emu(void);
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#endif
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@ -48,7 +48,7 @@ static __always_inline s64 arch_atomic64_read_nonatomic(const atomic64_t *v)
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ATOMIC64_EXPORT(atomic64_##sym)
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#endif
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#ifdef CONFIG_X86_CMPXCHG64
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#ifdef CONFIG_X86_CX8
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#define __alternative_atomic64(f, g, out, in...) \
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asm volatile("call %c[func]" \
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: ALT_OUTPUT_SP(out) \
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@ -69,7 +69,7 @@ static __always_inline bool __try_cmpxchg64_local(volatile u64 *ptr, u64 *oldp,
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return __arch_try_cmpxchg64(ptr, oldp, new,);
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}
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#ifdef CONFIG_X86_CMPXCHG64
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#ifdef CONFIG_X86_CX8
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#define arch_cmpxchg64 __cmpxchg64
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@ -23,7 +23,7 @@
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# define NEED_PAE 0
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#endif
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#ifdef CONFIG_X86_CMPXCHG64
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#ifdef CONFIG_X86_CX8
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# define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
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#else
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# define NEED_CX8 0
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@ -56,7 +56,7 @@ ifeq ($(CONFIG_X86_32),y)
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lib-y += string_32.o
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lib-y += memmove_32.o
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lib-y += cmpxchg8b_emu.o
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ifneq ($(CONFIG_X86_CMPXCHG64),y)
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ifneq ($(CONFIG_X86_CX8),y)
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lib-y += atomic64_386_32.o
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endif
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else
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@ -7,7 +7,7 @@
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.text
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#ifndef CONFIG_X86_CMPXCHG64
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#ifndef CONFIG_X86_CX8
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/*
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* Emulate 'cmpxchg8b (%esi)' on UP
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@ -254,7 +254,7 @@ static __init int test_atomics_init(void)
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pr_info("passed for %s platform %s CX8 and %s SSE\n",
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#ifdef CONFIG_X86_64
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"x86-64",
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#elif defined(CONFIG_X86_CMPXCHG64)
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#elif defined(CONFIG_X86_CX8)
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"i586+",
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#else
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"i386+",
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@ -23,7 +23,7 @@
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# define NEED_PAE 0
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#endif
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#ifdef CONFIG_X86_CMPXCHG64
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#ifdef CONFIG_X86_CX8
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# define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
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#else
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# define NEED_CX8 0
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