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- Host driver for GICv5, the next generation interrupt controller for arm64, including support for interrupt routing, MSIs, interrupt translation and wired interrupts. - Use FEAT_GCIE_LEGACY on GICv5 systems to virtualize GICv3 VMs on GICv5 hardware, leveraging the legacy VGIC interface. - Userspace control of the 'nASSGIcap' GICv3 feature, allowing userspace to disable support for SGIs w/o an active state on hardware that previously advertised it unconditionally. - Map supporting endpoints with cacheable memory attributes on systems with FEAT_S2FWB and DIC where KVM no longer needs to perform cache maintenance on the address range. - Nested support for FEAT_RAS and FEAT_DoubleFault2, allowing the guest hypervisor to inject external aborts into an L2 VM and take traps of masked external aborts to the hypervisor. - Convert more system register sanitization to the config-driven implementation. - Fixes to the visibility of EL2 registers, namely making VGICv3 system registers accessible through the VGIC device instead of the ONE_REG vCPU ioctls. - Various cleanups and minor fixes. LoongArch: - Add stat information for in-kernel irqchip - Add tracepoints for CPUCFG and CSR emulation exits - Enhance in-kernel irqchip emulation - Various cleanups. RISC-V: - Enable ring-based dirty memory tracking - Improve perf kvm stat to report interrupt events - Delegate illegal instruction trap to VS-mode - MMU improvements related to upcoming nested virtualization s390x - Fixes x86: - Add CONFIG_KVM_IOAPIC for x86 to allow disabling support for I/O APIC, PIC, and PIT emulation at compile time. - Share device posted IRQ code between SVM and VMX and harden it against bugs and runtime errors. - Use vcpu_idx, not vcpu_id, for GA log tag/metadata, to make lookups O(1) instead of O(n). - For MMIO stale data mitigation, track whether or not a vCPU has access to (host) MMIO based on whether the page tables have MMIO pfns mapped; using VFIO is prone to false negatives - Rework the MSR interception code so that the SVM and VMX APIs are more or less identical. - Recalculate all MSR intercepts from scratch on MSR filter changes, instead of maintaining shadow bitmaps. - Advertise support for LKGS (Load Kernel GS base), a new instruction that's loosely related to FRED, but is supported and enumerated independently. - Fix a user-triggerable WARN that syzkaller found by setting the vCPU in INIT_RECEIVED state (aka wait-for-SIPI), and then putting the vCPU into VMX Root Mode (post-VMXON). Trying to detect every possible path leading to architecturally forbidden states is hard and even risks breaking userspace (if it goes from valid to valid state but passes through invalid states), so just wait until KVM_RUN to detect that the vCPU state isn't allowed. - Add KVM_X86_DISABLE_EXITS_APERFMPERF to allow disabling interception of APERF/MPERF reads, so that a "properly" configured VM can access APERF/MPERF. This has many caveats (APERF/MPERF cannot be zeroed on vCPU creation or saved/restored on suspend and resume, or preserved over thread migration let alone VM migration) but can be useful whenever you're interested in letting Linux guests see the effective physical CPU frequency in /proc/cpuinfo. - Reject KVM_SET_TSC_KHZ for vm file descriptors if vCPUs have been created, as there's no known use case for changing the default frequency for other VM types and it goes counter to the very reason why the ioctl was added to the vm file descriptor. And also, there would be no way to make it work for confidential VMs with a "secure" TSC, so kill two birds with one stone. - Dynamically allocation the shadow MMU's hashed page list, and defer allocating the hashed list until it's actually needed (the TDP MMU doesn't use the list). - Extract many of KVM's helpers for accessing architectural local APIC state to common x86 so that they can be shared by guest-side code for Secure AVIC. - Various cleanups and fixes. x86 (Intel): - Preserve the host's DEBUGCTL.FREEZE_IN_SMM when running the guest. Failure to honor FREEZE_IN_SMM can leak host state into guests. - Explicitly check vmcs12.GUEST_DEBUGCTL on nested VM-Enter to prevent L1 from running L2 with features that KVM doesn't support, e.g. BTF. x86 (AMD): - WARN and reject loading kvm-amd.ko instead of panicking the kernel if the nested SVM MSRPM offsets tracker can't handle an MSR (which is pretty much a static condition and therefore should never happen, but still). - Fix a variety of flaws and bugs in the AVIC device posted IRQ code. - Inhibit AVIC if a vCPU's ID is too big (relative to what hardware supports) instead of rejecting vCPU creation. - Extend enable_ipiv module param support to SVM, by simply leaving IsRunning clear in the vCPU's physical ID table entry. - Disable IPI virtualization, via enable_ipiv, if the CPU is affected by erratum #1235, to allow (safely) enabling AVIC on such CPUs. - Request GA Log interrupts if and only if the target vCPU is blocking, i.e. only if KVM needs a notification in order to wake the vCPU. - Intercept SPEC_CTRL on AMD if the MSR shouldn't exist according to the vCPU's CPUID model. - Accept any SNP policy that is accepted by the firmware with respect to SMT and single-socket restrictions. An incompatible policy doesn't put the kernel at risk in any way, so there's no reason for KVM to care. - Drop a superfluous WBINVD (on all CPUs!) when destroying a VM and use WBNOINVD instead of WBINVD when possible for SEV cache maintenance. - When reclaiming memory from an SEV guest, only do cache flushes on CPUs that have ever run a vCPU for the guest, i.e. don't flush the caches for CPUs that can't possibly have cache lines with dirty, encrypted data. Generic: - Rework irqbypass to track/match producers and consumers via an xarray instead of a linked list. Using a linked list leads to O(n^2) insertion times, which is hugely problematic for use cases that create large numbers of VMs. Such use cases typically don't actually use irqbypass, but eliminating the pointless registration is a future problem to solve as it likely requires new uAPI. - Track irqbypass's "token" as "struct eventfd_ctx *" instead of a "void *", to avoid making a simple concept unnecessarily difficult to understand. - Decouple device posted IRQs from VFIO device assignment, as binding a VM to a VFIO group is not a requirement for enabling device posted IRQs. - Clean up and document/comment the irqfd assignment code. - Disallow binding multiple irqfds to an eventfd with a priority waiter, i.e. ensure an eventfd is bound to at most one irqfd through the entire host, and add a selftest to verify eventfd:irqfd bindings are globally unique. - Add a tracepoint for KVM_SET_MEMORY_ATTRIBUTES to help debug issues related to private <=> shared memory conversions. - Drop guest_memfd's .getattr() implementation as the VFS layer will call generic_fillattr() if inode_operations.getattr is NULL. - Fix issues with dirty ring harvesting where KVM doesn't bound the processing of entries in any way, which allows userspace to keep KVM in a tight loop indefinitely. - Kill off kvm_arch_{start,end}_assignment() and x86's associated tracking, now that KVM no longer uses assigned_device_count as a heuristic for either irqbypass usage or MDS mitigation. Selftests: - Fix a comment typo. - Verify KVM is loaded when getting any KVM module param so that attempting to run a selftest without kvm.ko loaded results in a SKIP message about KVM not being loaded/enabled (versus some random parameter not existing). - Skip tests that hit EACCES when attempting to access a file, and rpint a "Root required?" help message. In most cases, the test just needs to be run with elevated permissions. -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmiKXMgUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroMhMQf/QDhC/CP1aGXph2whuyeD2NMqPKiU 9KdnDNST+ftPwjg9QxZ9mTaa8zeVz/wly6XlxD9OQHy+opM1wcys3k0GZAFFEEQm YrThgURdzEZ3nwJZgb+m0t4wjJQtpiFIBwAf7qq6z1VrqQBEmHXJ/8QxGuqO+BNC j5q/X+q6KZwehKI6lgFBrrOKWFaxqhnRAYfW6rGBxRXxzTJuna37fvDpodQnNceN zOiq+avfriUMArTXTqOteJNKU0229HjiPSnjILLnFQ+B3akBlwNG0jk7TMaAKR6q IZWG1EIS9q1BAkGXaw6DE1y6d/YwtXCR5qgAIkiGwaPt5yj9Oj6kRN2Ytw== =j2At -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm updates from Paolo Bonzini: "ARM: - Host driver for GICv5, the next generation interrupt controller for arm64, including support for interrupt routing, MSIs, interrupt translation and wired interrupts - Use FEAT_GCIE_LEGACY on GICv5 systems to virtualize GICv3 VMs on GICv5 hardware, leveraging the legacy VGIC interface - Userspace control of the 'nASSGIcap' GICv3 feature, allowing userspace to disable support for SGIs w/o an active state on hardware that previously advertised it unconditionally - Map supporting endpoints with cacheable memory attributes on systems with FEAT_S2FWB and DIC where KVM no longer needs to perform cache maintenance on the address range - Nested support for FEAT_RAS and FEAT_DoubleFault2, allowing the guest hypervisor to inject external aborts into an L2 VM and take traps of masked external aborts to the hypervisor - Convert more system register sanitization to the config-driven implementation - Fixes to the visibility of EL2 registers, namely making VGICv3 system registers accessible through the VGIC device instead of the ONE_REG vCPU ioctls - Various cleanups and minor fixes LoongArch: - Add stat information for in-kernel irqchip - Add tracepoints for CPUCFG and CSR emulation exits - Enhance in-kernel irqchip emulation - Various cleanups RISC-V: - Enable ring-based dirty memory tracking - Improve perf kvm stat to report interrupt events - Delegate illegal instruction trap to VS-mode - MMU improvements related to upcoming nested virtualization s390x - Fixes x86: - Add CONFIG_KVM_IOAPIC for x86 to allow disabling support for I/O APIC, PIC, and PIT emulation at compile time - Share device posted IRQ code between SVM and VMX and harden it against bugs and runtime errors - Use vcpu_idx, not vcpu_id, for GA log tag/metadata, to make lookups O(1) instead of O(n) - For MMIO stale data mitigation, track whether or not a vCPU has access to (host) MMIO based on whether the page tables have MMIO pfns mapped; using VFIO is prone to false negatives - Rework the MSR interception code so that the SVM and VMX APIs are more or less identical - Recalculate all MSR intercepts from scratch on MSR filter changes, instead of maintaining shadow bitmaps - Advertise support for LKGS (Load Kernel GS base), a new instruction that's loosely related to FRED, but is supported and enumerated independently - Fix a user-triggerable WARN that syzkaller found by setting the vCPU in INIT_RECEIVED state (aka wait-for-SIPI), and then putting the vCPU into VMX Root Mode (post-VMXON). Trying to detect every possible path leading to architecturally forbidden states is hard and even risks breaking userspace (if it goes from valid to valid state but passes through invalid states), so just wait until KVM_RUN to detect that the vCPU state isn't allowed - Add KVM_X86_DISABLE_EXITS_APERFMPERF to allow disabling interception of APERF/MPERF reads, so that a "properly" configured VM can access APERF/MPERF. This has many caveats (APERF/MPERF cannot be zeroed on vCPU creation or saved/restored on suspend and resume, or preserved over thread migration let alone VM migration) but can be useful whenever you're interested in letting Linux guests see the effective physical CPU frequency in /proc/cpuinfo - Reject KVM_SET_TSC_KHZ for vm file descriptors if vCPUs have been created, as there's no known use case for changing the default frequency for other VM types and it goes counter to the very reason why the ioctl was added to the vm file descriptor. And also, there would be no way to make it work for confidential VMs with a "secure" TSC, so kill two birds with one stone - Dynamically allocation the shadow MMU's hashed page list, and defer allocating the hashed list until it's actually needed (the TDP MMU doesn't use the list) - Extract many of KVM's helpers for accessing architectural local APIC state to common x86 so that they can be shared by guest-side code for Secure AVIC - Various cleanups and fixes x86 (Intel): - Preserve the host's DEBUGCTL.FREEZE_IN_SMM when running the guest. Failure to honor FREEZE_IN_SMM can leak host state into guests - Explicitly check vmcs12.GUEST_DEBUGCTL on nested VM-Enter to prevent L1 from running L2 with features that KVM doesn't support, e.g. BTF x86 (AMD): - WARN and reject loading kvm-amd.ko instead of panicking the kernel if the nested SVM MSRPM offsets tracker can't handle an MSR (which is pretty much a static condition and therefore should never happen, but still) - Fix a variety of flaws and bugs in the AVIC device posted IRQ code - Inhibit AVIC if a vCPU's ID is too big (relative to what hardware supports) instead of rejecting vCPU creation - Extend enable_ipiv module param support to SVM, by simply leaving IsRunning clear in the vCPU's physical ID table entry - Disable IPI virtualization, via enable_ipiv, if the CPU is affected by erratum #1235, to allow (safely) enabling AVIC on such CPUs - Request GA Log interrupts if and only if the target vCPU is blocking, i.e. only if KVM needs a notification in order to wake the vCPU - Intercept SPEC_CTRL on AMD if the MSR shouldn't exist according to the vCPU's CPUID model - Accept any SNP policy that is accepted by the firmware with respect to SMT and single-socket restrictions. An incompatible policy doesn't put the kernel at risk in any way, so there's no reason for KVM to care - Drop a superfluous WBINVD (on all CPUs!) when destroying a VM and use WBNOINVD instead of WBINVD when possible for SEV cache maintenance - When reclaiming memory from an SEV guest, only do cache flushes on CPUs that have ever run a vCPU for the guest, i.e. don't flush the caches for CPUs that can't possibly have cache lines with dirty, encrypted data Generic: - Rework irqbypass to track/match producers and consumers via an xarray instead of a linked list. Using a linked list leads to O(n^2) insertion times, which is hugely problematic for use cases that create large numbers of VMs. Such use cases typically don't actually use irqbypass, but eliminating the pointless registration is a future problem to solve as it likely requires new uAPI - Track irqbypass's "token" as "struct eventfd_ctx *" instead of a "void *", to avoid making a simple concept unnecessarily difficult to understand - Decouple device posted IRQs from VFIO device assignment, as binding a VM to a VFIO group is not a requirement for enabling device posted IRQs - Clean up and document/comment the irqfd assignment code - Disallow binding multiple irqfds to an eventfd with a priority waiter, i.e. ensure an eventfd is bound to at most one irqfd through the entire host, and add a selftest to verify eventfd:irqfd bindings are globally unique - Add a tracepoint for KVM_SET_MEMORY_ATTRIBUTES to help debug issues related to private <=> shared memory conversions - Drop guest_memfd's .getattr() implementation as the VFS layer will call generic_fillattr() if inode_operations.getattr is NULL - Fix issues with dirty ring harvesting where KVM doesn't bound the processing of entries in any way, which allows userspace to keep KVM in a tight loop indefinitely - Kill off kvm_arch_{start,end}_assignment() and x86's associated tracking, now that KVM no longer uses assigned_device_count as a heuristic for either irqbypass usage or MDS mitigation Selftests: - Fix a comment typo - Verify KVM is loaded when getting any KVM module param so that attempting to run a selftest without kvm.ko loaded results in a SKIP message about KVM not being loaded/enabled (versus some random parameter not existing) - Skip tests that hit EACCES when attempting to access a file, and print a "Root required?" help message. In most cases, the test just needs to be run with elevated permissions" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (340 commits) Documentation: KVM: Use unordered list for pre-init VGIC registers RISC-V: KVM: Avoid re-acquiring memslot in kvm_riscv_gstage_map() RISC-V: KVM: Use find_vma_intersection() to search for intersecting VMAs RISC-V: perf/kvm: Add reporting of interrupt events RISC-V: KVM: Enable ring-based dirty memory tracking RISC-V: KVM: Fix inclusion of Smnpm in the guest ISA bitmap RISC-V: KVM: Delegate illegal instruction fault to VS mode RISC-V: KVM: Pass VMID as parameter to kvm_riscv_hfence_xyz() APIs RISC-V: KVM: Factor-out g-stage page table management RISC-V: KVM: Add vmid field to struct kvm_riscv_hfence RISC-V: KVM: Introduce struct kvm_gstage_mapping RISC-V: KVM: Factor-out MMU related declarations into separate headers RISC-V: KVM: Use ncsr_xyz() in kvm_riscv_vcpu_trap_redirect() RISC-V: KVM: Implement kvm_arch_flush_remote_tlbs_range() RISC-V: KVM: Don't flush TLB when PTE is unchanged RISC-V: KVM: Replace KVM_REQ_HFENCE_GVMA_VMID_ALL with KVM_REQ_TLB_FLUSH RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize() RISC-V: KVM: Drop the return value of kvm_riscv_vcpu_aia_init() RISC-V: KVM: Check kvm_riscv_vcpu_alloc_vector_context() return value KVM: arm64: selftests: Add FEAT_RAS EL2 registers to get-reg-list ...
465 lines
14 KiB
C
465 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Generic waiting primitives.
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*
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* (C) 2004 Nadia Yvette Chambers, Oracle
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*/
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#include "sched.h"
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void __init_waitqueue_head(struct wait_queue_head *wq_head, const char *name, struct lock_class_key *key)
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{
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spin_lock_init(&wq_head->lock);
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lockdep_set_class_and_name(&wq_head->lock, key, name);
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INIT_LIST_HEAD(&wq_head->head);
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}
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EXPORT_SYMBOL(__init_waitqueue_head);
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void add_wait_queue(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry)
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{
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unsigned long flags;
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wq_entry->flags &= ~WQ_FLAG_EXCLUSIVE;
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spin_lock_irqsave(&wq_head->lock, flags);
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__add_wait_queue(wq_head, wq_entry);
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spin_unlock_irqrestore(&wq_head->lock, flags);
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}
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EXPORT_SYMBOL(add_wait_queue);
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void add_wait_queue_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry)
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{
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unsigned long flags;
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wq_entry->flags |= WQ_FLAG_EXCLUSIVE;
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spin_lock_irqsave(&wq_head->lock, flags);
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__add_wait_queue_entry_tail(wq_head, wq_entry);
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spin_unlock_irqrestore(&wq_head->lock, flags);
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}
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EXPORT_SYMBOL(add_wait_queue_exclusive);
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void add_wait_queue_priority(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry)
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{
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unsigned long flags;
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wq_entry->flags |= WQ_FLAG_PRIORITY;
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spin_lock_irqsave(&wq_head->lock, flags);
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__add_wait_queue(wq_head, wq_entry);
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spin_unlock_irqrestore(&wq_head->lock, flags);
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}
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EXPORT_SYMBOL_GPL(add_wait_queue_priority);
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int add_wait_queue_priority_exclusive(struct wait_queue_head *wq_head,
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struct wait_queue_entry *wq_entry)
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{
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struct list_head *head = &wq_head->head;
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wq_entry->flags |= WQ_FLAG_EXCLUSIVE | WQ_FLAG_PRIORITY;
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guard(spinlock_irqsave)(&wq_head->lock);
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if (!list_empty(head) &&
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(list_first_entry(head, typeof(*wq_entry), entry)->flags & WQ_FLAG_PRIORITY))
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return -EBUSY;
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list_add(&wq_entry->entry, head);
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return 0;
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}
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EXPORT_SYMBOL_GPL(add_wait_queue_priority_exclusive);
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void remove_wait_queue(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry)
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{
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unsigned long flags;
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spin_lock_irqsave(&wq_head->lock, flags);
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__remove_wait_queue(wq_head, wq_entry);
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spin_unlock_irqrestore(&wq_head->lock, flags);
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}
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EXPORT_SYMBOL(remove_wait_queue);
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/*
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* The core wakeup function. Non-exclusive wakeups (nr_exclusive == 0) just
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* wake everything up. If it's an exclusive wakeup (nr_exclusive == small +ve
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* number) then we wake that number of exclusive tasks, and potentially all
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* the non-exclusive tasks. Normally, exclusive tasks will be at the end of
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* the list and any non-exclusive tasks will be woken first. A priority task
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* may be at the head of the list, and can consume the event without any other
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* tasks being woken if it's also an exclusive task.
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*
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* There are circumstances in which we can try to wake a task which has already
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* started to run but is not in state TASK_RUNNING. try_to_wake_up() returns
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* zero in this (rare) case, and we handle it by continuing to scan the queue.
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*/
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static int __wake_up_common(struct wait_queue_head *wq_head, unsigned int mode,
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int nr_exclusive, int wake_flags, void *key)
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{
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wait_queue_entry_t *curr, *next;
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lockdep_assert_held(&wq_head->lock);
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curr = list_first_entry(&wq_head->head, wait_queue_entry_t, entry);
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if (&curr->entry == &wq_head->head)
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return nr_exclusive;
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list_for_each_entry_safe_from(curr, next, &wq_head->head, entry) {
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unsigned flags = curr->flags;
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int ret;
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ret = curr->func(curr, mode, wake_flags, key);
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if (ret < 0)
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break;
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if (ret && (flags & WQ_FLAG_EXCLUSIVE) && !--nr_exclusive)
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break;
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}
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return nr_exclusive;
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}
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static int __wake_up_common_lock(struct wait_queue_head *wq_head, unsigned int mode,
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int nr_exclusive, int wake_flags, void *key)
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{
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unsigned long flags;
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int remaining;
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spin_lock_irqsave(&wq_head->lock, flags);
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remaining = __wake_up_common(wq_head, mode, nr_exclusive, wake_flags,
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key);
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spin_unlock_irqrestore(&wq_head->lock, flags);
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return nr_exclusive - remaining;
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}
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/**
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* __wake_up - wake up threads blocked on a waitqueue.
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* @wq_head: the waitqueue
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* @mode: which threads
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* @nr_exclusive: how many wake-one or wake-many threads to wake up
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* @key: is directly passed to the wakeup function
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*
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* If this function wakes up a task, it executes a full memory barrier
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* before accessing the task state. Returns the number of exclusive
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* tasks that were awaken.
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*/
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int __wake_up(struct wait_queue_head *wq_head, unsigned int mode,
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int nr_exclusive, void *key)
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{
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return __wake_up_common_lock(wq_head, mode, nr_exclusive, 0, key);
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}
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EXPORT_SYMBOL(__wake_up);
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void __wake_up_on_current_cpu(struct wait_queue_head *wq_head, unsigned int mode, void *key)
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{
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__wake_up_common_lock(wq_head, mode, 1, WF_CURRENT_CPU, key);
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}
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/*
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* Same as __wake_up but called with the spinlock in wait_queue_head_t held.
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*/
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void __wake_up_locked(struct wait_queue_head *wq_head, unsigned int mode, int nr)
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{
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__wake_up_common(wq_head, mode, nr, 0, NULL);
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}
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EXPORT_SYMBOL_GPL(__wake_up_locked);
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void __wake_up_locked_key(struct wait_queue_head *wq_head, unsigned int mode, void *key)
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{
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__wake_up_common(wq_head, mode, 1, 0, key);
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}
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EXPORT_SYMBOL_GPL(__wake_up_locked_key);
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/**
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* __wake_up_sync_key - wake up threads blocked on a waitqueue.
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* @wq_head: the waitqueue
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* @mode: which threads
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* @key: opaque value to be passed to wakeup targets
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*
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* The sync wakeup differs that the waker knows that it will schedule
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* away soon, so while the target thread will be woken up, it will not
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* be migrated to another CPU - ie. the two threads are 'synchronized'
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* with each other. This can prevent needless bouncing between CPUs.
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*
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* On UP it can prevent extra preemption.
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*
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* If this function wakes up a task, it executes a full memory barrier before
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* accessing the task state.
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*/
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void __wake_up_sync_key(struct wait_queue_head *wq_head, unsigned int mode,
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void *key)
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{
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if (unlikely(!wq_head))
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return;
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__wake_up_common_lock(wq_head, mode, 1, WF_SYNC, key);
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|
}
|
|
EXPORT_SYMBOL_GPL(__wake_up_sync_key);
|
|
|
|
/**
|
|
* __wake_up_locked_sync_key - wake up a thread blocked on a locked waitqueue.
|
|
* @wq_head: the waitqueue
|
|
* @mode: which threads
|
|
* @key: opaque value to be passed to wakeup targets
|
|
*
|
|
* The sync wakeup differs in that the waker knows that it will schedule
|
|
* away soon, so while the target thread will be woken up, it will not
|
|
* be migrated to another CPU - ie. the two threads are 'synchronized'
|
|
* with each other. This can prevent needless bouncing between CPUs.
|
|
*
|
|
* On UP it can prevent extra preemption.
|
|
*
|
|
* If this function wakes up a task, it executes a full memory barrier before
|
|
* accessing the task state.
|
|
*/
|
|
void __wake_up_locked_sync_key(struct wait_queue_head *wq_head,
|
|
unsigned int mode, void *key)
|
|
{
|
|
__wake_up_common(wq_head, mode, 1, WF_SYNC, key);
|
|
}
|
|
EXPORT_SYMBOL_GPL(__wake_up_locked_sync_key);
|
|
|
|
/*
|
|
* __wake_up_sync - see __wake_up_sync_key()
|
|
*/
|
|
void __wake_up_sync(struct wait_queue_head *wq_head, unsigned int mode)
|
|
{
|
|
__wake_up_sync_key(wq_head, mode, NULL);
|
|
}
|
|
EXPORT_SYMBOL_GPL(__wake_up_sync); /* For internal use only */
|
|
|
|
void __wake_up_pollfree(struct wait_queue_head *wq_head)
|
|
{
|
|
__wake_up(wq_head, TASK_NORMAL, 0, poll_to_key(EPOLLHUP | POLLFREE));
|
|
/* POLLFREE must have cleared the queue. */
|
|
WARN_ON_ONCE(waitqueue_active(wq_head));
|
|
}
|
|
|
|
/*
|
|
* Note: we use "set_current_state()" _after_ the wait-queue add,
|
|
* because we need a memory barrier there on SMP, so that any
|
|
* wake-function that tests for the wait-queue being active
|
|
* will be guaranteed to see waitqueue addition _or_ subsequent
|
|
* tests in this thread will see the wakeup having taken place.
|
|
*
|
|
* The spin_unlock() itself is semi-permeable and only protects
|
|
* one way (it only protects stuff inside the critical region and
|
|
* stops them from bleeding out - it would still allow subsequent
|
|
* loads to move into the critical region).
|
|
*/
|
|
void
|
|
prepare_to_wait(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state)
|
|
{
|
|
unsigned long flags;
|
|
|
|
wq_entry->flags &= ~WQ_FLAG_EXCLUSIVE;
|
|
spin_lock_irqsave(&wq_head->lock, flags);
|
|
if (list_empty(&wq_entry->entry))
|
|
__add_wait_queue(wq_head, wq_entry);
|
|
set_current_state(state);
|
|
spin_unlock_irqrestore(&wq_head->lock, flags);
|
|
}
|
|
EXPORT_SYMBOL(prepare_to_wait);
|
|
|
|
/* Returns true if we are the first waiter in the queue, false otherwise. */
|
|
bool
|
|
prepare_to_wait_exclusive(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state)
|
|
{
|
|
unsigned long flags;
|
|
bool was_empty = false;
|
|
|
|
wq_entry->flags |= WQ_FLAG_EXCLUSIVE;
|
|
spin_lock_irqsave(&wq_head->lock, flags);
|
|
if (list_empty(&wq_entry->entry)) {
|
|
was_empty = list_empty(&wq_head->head);
|
|
__add_wait_queue_entry_tail(wq_head, wq_entry);
|
|
}
|
|
set_current_state(state);
|
|
spin_unlock_irqrestore(&wq_head->lock, flags);
|
|
return was_empty;
|
|
}
|
|
EXPORT_SYMBOL(prepare_to_wait_exclusive);
|
|
|
|
void init_wait_entry(struct wait_queue_entry *wq_entry, int flags)
|
|
{
|
|
wq_entry->flags = flags;
|
|
wq_entry->private = current;
|
|
wq_entry->func = autoremove_wake_function;
|
|
INIT_LIST_HEAD(&wq_entry->entry);
|
|
}
|
|
EXPORT_SYMBOL(init_wait_entry);
|
|
|
|
long prepare_to_wait_event(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry, int state)
|
|
{
|
|
unsigned long flags;
|
|
long ret = 0;
|
|
|
|
spin_lock_irqsave(&wq_head->lock, flags);
|
|
if (signal_pending_state(state, current)) {
|
|
/*
|
|
* Exclusive waiter must not fail if it was selected by wakeup,
|
|
* it should "consume" the condition we were waiting for.
|
|
*
|
|
* The caller will recheck the condition and return success if
|
|
* we were already woken up, we can not miss the event because
|
|
* wakeup locks/unlocks the same wq_head->lock.
|
|
*
|
|
* But we need to ensure that set-condition + wakeup after that
|
|
* can't see us, it should wake up another exclusive waiter if
|
|
* we fail.
|
|
*/
|
|
list_del_init(&wq_entry->entry);
|
|
ret = -ERESTARTSYS;
|
|
} else {
|
|
if (list_empty(&wq_entry->entry)) {
|
|
if (wq_entry->flags & WQ_FLAG_EXCLUSIVE)
|
|
__add_wait_queue_entry_tail(wq_head, wq_entry);
|
|
else
|
|
__add_wait_queue(wq_head, wq_entry);
|
|
}
|
|
set_current_state(state);
|
|
}
|
|
spin_unlock_irqrestore(&wq_head->lock, flags);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(prepare_to_wait_event);
|
|
|
|
/*
|
|
* Note! These two wait functions are entered with the
|
|
* wait-queue lock held (and interrupts off in the _irq
|
|
* case), so there is no race with testing the wakeup
|
|
* condition in the caller before they add the wait
|
|
* entry to the wake queue.
|
|
*/
|
|
int do_wait_intr(wait_queue_head_t *wq, wait_queue_entry_t *wait)
|
|
{
|
|
if (likely(list_empty(&wait->entry)))
|
|
__add_wait_queue_entry_tail(wq, wait);
|
|
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
|
if (signal_pending(current))
|
|
return -ERESTARTSYS;
|
|
|
|
spin_unlock(&wq->lock);
|
|
schedule();
|
|
spin_lock(&wq->lock);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(do_wait_intr);
|
|
|
|
int do_wait_intr_irq(wait_queue_head_t *wq, wait_queue_entry_t *wait)
|
|
{
|
|
if (likely(list_empty(&wait->entry)))
|
|
__add_wait_queue_entry_tail(wq, wait);
|
|
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
|
if (signal_pending(current))
|
|
return -ERESTARTSYS;
|
|
|
|
spin_unlock_irq(&wq->lock);
|
|
schedule();
|
|
spin_lock_irq(&wq->lock);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(do_wait_intr_irq);
|
|
|
|
/**
|
|
* finish_wait - clean up after waiting in a queue
|
|
* @wq_head: waitqueue waited on
|
|
* @wq_entry: wait descriptor
|
|
*
|
|
* Sets current thread back to running state and removes
|
|
* the wait descriptor from the given waitqueue if still
|
|
* queued.
|
|
*/
|
|
void finish_wait(struct wait_queue_head *wq_head, struct wait_queue_entry *wq_entry)
|
|
{
|
|
unsigned long flags;
|
|
|
|
__set_current_state(TASK_RUNNING);
|
|
/*
|
|
* We can check for list emptiness outside the lock
|
|
* IFF:
|
|
* - we use the "careful" check that verifies both
|
|
* the next and prev pointers, so that there cannot
|
|
* be any half-pending updates in progress on other
|
|
* CPU's that we haven't seen yet (and that might
|
|
* still change the stack area.
|
|
* and
|
|
* - all other users take the lock (ie we can only
|
|
* have _one_ other CPU that looks at or modifies
|
|
* the list).
|
|
*/
|
|
if (!list_empty_careful(&wq_entry->entry)) {
|
|
spin_lock_irqsave(&wq_head->lock, flags);
|
|
list_del_init(&wq_entry->entry);
|
|
spin_unlock_irqrestore(&wq_head->lock, flags);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(finish_wait);
|
|
|
|
int autoremove_wake_function(struct wait_queue_entry *wq_entry, unsigned mode, int sync, void *key)
|
|
{
|
|
int ret = default_wake_function(wq_entry, mode, sync, key);
|
|
|
|
if (ret)
|
|
list_del_init_careful(&wq_entry->entry);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(autoremove_wake_function);
|
|
|
|
/*
|
|
* DEFINE_WAIT_FUNC(wait, woken_wake_func);
|
|
*
|
|
* add_wait_queue(&wq_head, &wait);
|
|
* for (;;) {
|
|
* if (condition)
|
|
* break;
|
|
*
|
|
* // in wait_woken() // in woken_wake_function()
|
|
*
|
|
* p->state = mode; wq_entry->flags |= WQ_FLAG_WOKEN;
|
|
* smp_mb(); // A try_to_wake_up():
|
|
* if (!(wq_entry->flags & WQ_FLAG_WOKEN)) <full barrier>
|
|
* schedule() if (p->state & mode)
|
|
* p->state = TASK_RUNNING; p->state = TASK_RUNNING;
|
|
* wq_entry->flags &= ~WQ_FLAG_WOKEN; ~~~~~~~~~~~~~~~~~~
|
|
* smp_mb(); // B condition = true;
|
|
* } smp_mb(); // C
|
|
* remove_wait_queue(&wq_head, &wait); wq_entry->flags |= WQ_FLAG_WOKEN;
|
|
*/
|
|
long wait_woken(struct wait_queue_entry *wq_entry, unsigned mode, long timeout)
|
|
{
|
|
/*
|
|
* The below executes an smp_mb(), which matches with the full barrier
|
|
* executed by the try_to_wake_up() in woken_wake_function() such that
|
|
* either we see the store to wq_entry->flags in woken_wake_function()
|
|
* or woken_wake_function() sees our store to current->state.
|
|
*/
|
|
set_current_state(mode); /* A */
|
|
if (!(wq_entry->flags & WQ_FLAG_WOKEN) && !kthread_should_stop_or_park())
|
|
timeout = schedule_timeout(timeout);
|
|
__set_current_state(TASK_RUNNING);
|
|
|
|
/*
|
|
* The below executes an smp_mb(), which matches with the smp_mb() (C)
|
|
* in woken_wake_function() such that either we see the wait condition
|
|
* being true or the store to wq_entry->flags in woken_wake_function()
|
|
* follows ours in the coherence order.
|
|
*/
|
|
smp_store_mb(wq_entry->flags, wq_entry->flags & ~WQ_FLAG_WOKEN); /* B */
|
|
|
|
return timeout;
|
|
}
|
|
EXPORT_SYMBOL(wait_woken);
|
|
|
|
int woken_wake_function(struct wait_queue_entry *wq_entry, unsigned mode, int sync, void *key)
|
|
{
|
|
/* Pairs with the smp_store_mb() in wait_woken(). */
|
|
smp_mb(); /* C */
|
|
wq_entry->flags |= WQ_FLAG_WOKEN;
|
|
|
|
return default_wake_function(wq_entry, mode, sync, key);
|
|
}
|
|
EXPORT_SYMBOL(woken_wake_function);
|