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As I am leaving AMD and will no longer be maintaining these platform drivers, so removing myself from maintainership. Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com> Acked-by: Damien Le Moal <dlemoal@kernel.org> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20250403060836.2602361-1-mubin.sayyed@amd.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
46 lines
971 B
YAML
46 lines
971 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ZynqMP Mode Pin GPIO controller
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description:
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PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin
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GPIO controller with configurable from numbers of pins (from 0 to 3 per
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PS_MODE). Every pin can be configured as input/output.
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maintainers:
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- Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
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properties:
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compatible:
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const: xlnx,zynqmp-gpio-modepin
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gpio-controller: true
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"#gpio-cells":
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const: 2
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label: true
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required:
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- compatible
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- gpio-controller
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- "#gpio-cells"
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additionalProperties: false
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examples:
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- |
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zynqmp-firmware {
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gpio {
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compatible = "xlnx,zynqmp-gpio-modepin";
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gpio-controller;
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#gpio-cells = <2>;
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label = "modepin";
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};
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};
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...
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