linux/Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml
Mubin Sayyed 1296dcbad2 dt-bindings: xilinx: Remove myself from maintainership
As I am leaving AMD and will no longer be maintaining
these platform drivers, so removing myself from maintainership.

Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com>
Acked-by: Damien Le Moal <dlemoal@kernel.org>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20250403060836.2602361-1-mubin.sayyed@amd.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-07 09:34:35 -05:00

46 lines
971 B
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ZynqMP Mode Pin GPIO controller
description:
PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin
GPIO controller with configurable from numbers of pins (from 0 to 3 per
PS_MODE). Every pin can be configured as input/output.
maintainers:
- Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
properties:
compatible:
const: xlnx,zynqmp-gpio-modepin
gpio-controller: true
"#gpio-cells":
const: 2
label: true
required:
- compatible
- gpio-controller
- "#gpio-cells"
additionalProperties: false
examples:
- |
zynqmp-firmware {
gpio {
compatible = "xlnx,zynqmp-gpio-modepin";
gpio-controller;
#gpio-cells = <2>;
label = "modepin";
};
};
...