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9165960606
Document the OTP memory found on Rockchip RK3576 SoC. The RK3576 uses the same set of clocks as the px30/rk3308 but has one reset more, so adapt the binding to handle this variant as well. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20250411112251.68002-4-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
148 lines
2.8 KiB
YAML
148 lines
2.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/nvmem/rockchip,otp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip internal OTP (One Time Programmable) memory
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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properties:
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compatible:
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enum:
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- rockchip,px30-otp
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- rockchip,rk3308-otp
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- rockchip,rk3576-otp
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- rockchip,rk3588-otp
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reg:
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maxItems: 1
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clocks:
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minItems: 3
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maxItems: 4
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clock-names:
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minItems: 3
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items:
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- const: otp
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- const: apb_pclk
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- const: phy
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- const: arb
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resets:
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minItems: 1
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maxItems: 3
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reset-names:
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minItems: 1
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maxItems: 3
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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- reset-names
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allOf:
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- $ref: nvmem.yaml#
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- $ref: nvmem-deprecated-cells.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,px30-otp
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- rockchip,rk3308-otp
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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maxItems: 3
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: phy
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- if:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,rk3576-otp
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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maxItems: 3
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resets:
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minItems: 2
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maxItems: 2
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reset-names:
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items:
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- const: otp
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- const: apb
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- if:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,rk3588-otp
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then:
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properties:
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clocks:
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minItems: 4
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clock-names:
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minItems: 4
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resets:
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minItems: 3
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reset-names:
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items:
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- const: otp
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- const: apb
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- const: arb
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/px30-cru.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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otp: efuse@ff290000 {
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compatible = "rockchip,px30-otp";
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reg = <0x0 0xff290000 0x0 0x4000>;
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clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
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<&cru PCLK_OTP_PHY>;
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clock-names = "otp", "apb_pclk", "phy";
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resets = <&cru SRST_OTP_PHY>;
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reset-names = "phy";
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#address-cells = <1>;
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#size-cells = <1>;
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cpu_id: id@7 {
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reg = <0x07 0x10>;
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};
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cpu_leakage: cpu-leakage@17 {
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reg = <0x17 0x1>;
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};
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performance: performance@1e {
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reg = <0x1e 0x1>;
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bits = <4 3>;
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};
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};
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};
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