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3940f5349b
There's a lockdep false positive warning related to i8253_lock:
WARNING: HARDIRQ-safe -> HARDIRQ-unsafe lock order detected
...
systemd-sleep/3324 [HC0[0]:SC0[0]:HE0:SE1] is trying to acquire:
ffffffffb2c23398 (i8253_lock){+.+.}-{2:2}, at: pcspkr_event+0x3f/0xe0 [pcspkr]
...
... which became HARDIRQ-irq-unsafe at:
...
lock_acquire+0xd0/0x2f0
_raw_spin_lock+0x30/0x40
clockevent_i8253_disable+0x1c/0x60
pit_timer_init+0x25/0x50
hpet_time_init+0x46/0x50
x86_late_time_init+0x1b/0x40
start_kernel+0x962/0xa00
x86_64_start_reservations+0x24/0x30
x86_64_start_kernel+0xed/0xf0
common_startup_64+0x13e/0x141
...
Lockdep complains due pit_timer_init() using the lock in an IRQ-unsafe
fashion, but it's a false positive, because there is no deadlock
possible at that point due to init ordering: at the point where
pit_timer_init() is called there is no other possible usage of
i8253_lock because the system is still in the very early boot stage
with no interrupts.
But in any case, pit_timer_init() should disable interrupts before
calling clockevent_i8253_disable() out of general principle, and to
keep lockdep working even in this scenario.
Use scoped_guard() for that, as suggested by Thomas Gleixner.
[ mingo: Cleaned up the changelog. ]
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Fernando Fernandez Mancera <ffmancera@riseup.net>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/Z-uwd4Bnn7FcCShX@gmail.com
75 lines
1.9 KiB
C
75 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* 8253/PIT functions
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*
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*/
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#include <linux/clockchips.h>
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#include <linux/init.h>
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#include <linux/timex.h>
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#include <linux/i8253.h>
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#include <asm/hypervisor.h>
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#include <asm/apic.h>
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#include <asm/hpet.h>
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#include <asm/time.h>
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#include <asm/smp.h>
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/*
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* HPET replaces the PIT, when enabled. So we need to know, which of
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* the two timers is used
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*/
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struct clock_event_device *global_clock_event;
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/*
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* Modern chipsets can disable the PIT clock which makes it unusable. It
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* would be possible to enable the clock but the registers are chipset
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* specific and not discoverable. Avoid the whack a mole game.
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*
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* These platforms have discoverable TSC/CPU frequencies but this also
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* requires to know the local APIC timer frequency as it normally is
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* calibrated against the PIT interrupt.
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*/
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static bool __init use_pit(void)
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{
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if (!IS_ENABLED(CONFIG_X86_TSC) || !boot_cpu_has(X86_FEATURE_TSC))
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return true;
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/* This also returns true when APIC is disabled */
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return apic_needs_pit();
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}
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bool __init pit_timer_init(void)
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{
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if (!use_pit()) {
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/*
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* Don't just ignore the PIT. Ensure it's stopped, because
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* VMMs otherwise steal CPU time just to pointlessly waggle
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* the (masked) IRQ.
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*/
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scoped_guard(irq)
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clockevent_i8253_disable();
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return false;
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}
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clockevent_i8253_init(true);
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global_clock_event = &i8253_clockevent;
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return true;
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}
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#ifndef CONFIG_X86_64
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static int __init init_pit_clocksource(void)
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{
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/*
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* Several reasons not to register PIT as a clocksource:
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*
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* - On SMP PIT does not scale due to i8253_lock
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* - when HPET is enabled
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* - when local APIC timer is active (PIT is switched off)
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*/
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if (num_possible_cpus() > 1 || is_hpet_enabled() ||
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!clockevent_state_periodic(&i8253_clockevent))
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return 0;
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return clocksource_i8253_init();
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}
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arch_initcall(init_pit_clocksource);
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#endif /* !CONFIG_X86_64 */
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