archive/ruby
1
0
Fork 0
mirror of https://github.com/ruby/ruby.git synced 2025-08-15 13:39:04 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 4

Interpret DW_RLE_start_length

Browse source 
Fixes [Bug #17823]
This commit is contained in:
xtkoba 2021-04-30 23:29:57 +09:00 • committed by Aaron Patterson
parent f140965b97
commit 77e6715d67
Notes: git 2021-09-24 04:29:30 +09:00
1 changed files with 15 additions and 12 deletions
Download patch file Download diff file Expand all files Collapse all files

27
addr2line.c
View file

@ -1436,16 +1436,17 @@ ranges_include(DebugInfoReader *reader, ranges_t *ptr, uint64_t addr)
/* TODO: support base address selection entry */ /* TODO: support base address selection entry */
const char *p; const char *p;
uint64_t base = ptr->low_pc_set ? ptr->low_pc : reader->current_low_pc; uint64_t base = ptr->low_pc_set ? ptr->low_pc : reader->current_low_pc;
bool base_valid = true;
if (reader->obj->debug_rnglists.ptr) { if (reader->obj->debug_rnglists.ptr) {
p = reader->obj->debug_rnglists.ptr + ptr->ranges; p = reader->obj->debug_rnglists.ptr + ptr->ranges;
for (;;) { for (;;) {
uint8_t rle = read_uint8(&p); uint8_t rle = read_uint8(&p);
uintptr_t base_address = 0; uintptr_t from = 0, to = 0;
uintptr_t from, to;
if (rle == DW_RLE_end_of_list) break; if (rle == DW_RLE_end_of_list) break;
switch (rle) { switch (rle) {
case DW_RLE_base_addressx: case DW_RLE_base_addressx:
uleb128(&p); uleb128(&p);
base_valid = false; /* not supported yet */
break; break;
case DW_RLE_startx_endx: case DW_RLE_startx_endx:
uleb128(&p); uleb128(&p);
@ -1456,24 +1457,26 @@ ranges_include(DebugInfoReader *reader, ranges_t *ptr, uint64_t addr)
uleb128(&p); uleb128(&p);
break; break;
case DW_RLE_offset_pair: case DW_RLE_offset_pair:
from = base_address + uleb128(&p); if (!base_valid) break;
to = base_address + uleb128(&p); from = (uintptr_t)base + uleb128(&p);
if (base + from <= addr && addr < base + to) { to = (uintptr_t)base + uleb128(&p);
return from;
}
break; break;
case DW_RLE_base_address: case DW_RLE_base_address:
base_address = (uintptr_t)read_dw_form_addr(reader, &p); base = read_dw_form_addr(reader, &p);
base_valid = true;
break; break;
case DW_RLE_start_end: case DW_RLE_start_end:
read_dw_form_addr(reader, &p); from = (uintptr_t)read_dw_form_addr(reader, &p);
read_dw_form_addr(reader, &p); to = (uintptr_t)read_dw_form_addr(reader, &p);
break; break;
case DW_RLE_start_length: case DW_RLE_start_length:
read_dw_form_addr(reader, &p); from = (uintptr_t)read_dw_form_addr(reader, &p);
uleb128(&p); to = from + uleb128(&p);
break; break;
} }
if (from <= addr && addr < to) {
return from;
}
} }
return false; return false;
} }